/** ****************************************************************************** * @file fm33a0xxev_adc.c * @author FM33A0XXEV Application Team * @version V1.0.0 * @date 16-April-2020 * @brief This file provides firmware functions to manage the following * functionalities of....: * */ /* Includes ------------------------------------------------------------------*/ #include "fm33a0xxev_adc.h" /** @addtogroup fm33a0xxev_StdPeriph_Driver * @{ */ /** @defgroup ADC * @brief ADC driver modules * @{ */ /* ADCÄÚ²¿ÀÛ¼ÓģʽÖжÏʹÄÜ Ïà¹Øº¯Êý */ void ADC_CR_ADC_IE_Setable(FunState NewState) { if (NewState == ENABLE) { ADC->CR |= (ADC_CR_ADC_IE_Msk); } else { ADC->CR &= ~(ADC_CR_ADC_IE_Msk); } } FunState ADC_CR_ADC_IE_Getable(void) { if (ADC->CR & (ADC_CR_ADC_IE_Msk)) { return ENABLE; } else { return DISABLE; } } /* ADCÍⲿÀÛ¼ÓģʽÖжÏʹÄÜ Ïà¹Øº¯Êý */ void ADC_CR_ACC_IE_Setable(FunState NewState) { if (NewState == ENABLE) { ADC->CR |= (ADC_CR_ACC_IE_Msk); } else { ADC->CR &= ~(ADC_CR_ACC_IE_Msk); } } FunState ADC_CR_ACC_IE_Getable(void) { if (ADC->CR & (ADC_CR_ACC_IE_Msk)) { return ENABLE; } else { return DISABLE; } } /* ADC¹¦ºÄģʽ 0£ºµÍ¹¦ºÄģʽ£¬¹¤×÷ʱÖÓ×î¸ß1MHz 1£º¸ß¹¦ºÄģʽ£¬¹¤×÷ʱÖÓ×î¸ß2MHz Ïà¹Øº¯Êý */ void ADC_CR_HPEN_Set(uint32_t SetValue) { uint32_t tmpreg; tmpreg = ADC->CR; tmpreg &= ~(ADC_CR_HPEN_Msk); tmpreg |= (SetValue & ADC_CR_HPEN_Msk); ADC->CR = tmpreg; } uint32_t ADC_CR_HPEN_Get(void) { return (ADC->CR & ADC_CR_HPEN_Msk); } /* ADC¹¤×÷ģʽ 0£ºÄÚ²¿ÀÛ¼ÓÆ÷ģʽ 1£ºÍⲿÀÛ¼ÓÆ÷»òCICģʽ Ïà¹Øº¯Êý */ void ADC_CR_MODE_Set(uint32_t SetValue) { uint32_t tmpreg; tmpreg = ADC->CR; tmpreg &= ~(ADC_CR_MODE_Msk); tmpreg |= (SetValue & ADC_CR_MODE_Msk); ADC->CR = tmpreg; } uint32_t ADC_CR_MODE_Get(void) { return (ADC->CR & ADC_CR_MODE_Msk); } /* »ý·ÖÆ÷¸´Î»Ê¹ÄÜ£¬ÔÚMODE=1²¢ÇÒʹÓÃÍⲿÀÛ¼ÓÆ÷ʱ£¬±ØÐëÖÃ룬ÆäËûÌõ¼þϱØÐë±£³ÖΪ0 0£º½ûÖ¹»ý·ÖÆ÷Íⲿ¸´Î» 1£ºÔÊÐí»ý·ÖÆ÷Íⲿ¸´Î» Ïà¹Øº¯Êý */ void ADC_CR_RSTCTRL_EN_Setable(FunState NewState) { if (NewState == ENABLE) { ADC->CR |= (ADC_CR_RSTCTRL_EN_Msk); } else { ADC->CR &= ~(ADC_CR_RSTCTRL_EN_Msk); } } FunState ADC_CR_RSTCTRL_EN_Getable(void) { if (ADC->CR & (ADC_CR_RSTCTRL_EN_Msk)) { return ENABLE; } else { return DISABLE; } } /* ADCʹÄÜÐźŠ0£ºADC²»Ê¹ÄÜ 1£ºADCʹÄÜ ×¢Ò⣺RTCÖ´ÐÐ×Ô¶¯Î²¹Ê±£¬Ó²¼þ»áÖÜÆÚÐÔ×Ô¶¯Ê¹ÄÜADC Ïà¹Øº¯Êý */ void ADC_CR_EN_Setable(FunState NewState) { if (NewState == ENABLE) { ADC->CR |= (ADC_CR_EN_Msk); } else { ADC->CR &= ~(ADC_CR_EN_Msk); } } FunState ADC_CR_EN_Getable(void) { if (ADC->CR & (ADC_CR_EN_Msk)) { return ENABLE; } else { return DISABLE; } } /* ADC TRIMÖµ£¬½öÕë¶ÔÄÚ²¿ÀÛ¼ÓÆ÷ģʽÊä³ö ÄÚ²¿ÀÛ¼ÓÆ÷ÀÛ¼ÓÖÜÆÚ£ºPeriod = TRIM*2*TADC_CLK ÀÛ¼ÓÖÜÆÚ¾ö¶¨ÁËÊä³öÊý¾Ýλ¿í£¬µ±TRIM=0x7FF×î´óֵʱ£¬Êµ¼ÊÀÛ¼ÓÖÜÆÚΪ4095 cycle£¬¼´ADCÊä³öÊý¾Ý×î´óÓÐЧλ¿íÊÇ12bit Ïà¹Øº¯Êý */ void ADC_TRIM_Write(uint32_t SetValue) { ADC->TRIM = (SetValue & ADC_TRIM_ADC_TRIM_Msk); } uint32_t ADC_TRIM_Read(void) { return (ADC->TRIM & ADC_TRIM_ADC_TRIM_Msk); } /* ADCÊä³öÊý¾Ý£¬ÎªÂëÁ÷ÀÛ¼Ó½á¹û£¬Î´¾­½µ²ÉÑùÂ˲¨Æ÷´¦Àí µ±MODE=0ʱ£¬Êä³öΪADCÄÚ²¿ÀÛ¼Ó½á¹û£¬×î¸ß12bit£¬Î»ÊýÓÉADC_TRIM¾ö¶¨ µ±MODE=1ʱ£¬Êä³öλADCÍⲿÀÛ¼Ó½á¹û£¬×î¸ß14bit£¬Î»ÊýÓÉACC_PERIOD¾ö¶¨ Ïà¹Øº¯Êý */ uint32_t ADC_DR_Read(void) { return (ADC->DR & ADC_DR_ADC_DATA_Msk); } /* ADC³õʼ»¯Íê³É±êÖ¾£¬½öMODE=1ʱÓÐЧ£¨²»²úÉúÖжϣ© 0£ºADC»¹Î´Íê³É³õʼ»¯ 1£ºADCÍê³É³õʼ»¯ ×¢£ºMODE=1£¬ADC_ENÖÃλºó£¬µÈ´ýMODE_CTRL_DELAYʱ¼äÖ®ºó£¬´Ë±êÖ¾ÖÃ룬±íʾADCÄÚ²¿»ý·ÖÆ÷½¨Á¢Íê³É¡£MODE=0ʱ£¬¹¤×÷ʱÐòÓÉADCÄÚ²¿×ÔÐпØÖÆ£¬´Ë±êÖ¾ÎÞЧ¡£ Ïà¹Øº¯Êý */ FlagStatus ADC_ISR_INIT_RDY_Chk(void) { if (ADC->ISR & ADC_ISR_INIT_RDY_Msk) { return SET; } else { return RESET; } } /* ÀÛ¼ÓÆ÷Íê³ÉÖжϱêÖ¾£¬Ó²¼þÖÃ룬Èí¼þд1ÇåÁ㣬д0ÎÞЧ Ïà¹Øº¯Êý */ void ADC_ISR_ACC_IF_Clr(void) { ADC->ISR = ADC_ISR_ACC_IF_Msk; } FlagStatus ADC_ISR_ACC_IF_Chk(void) { if (ADC->ISR & ADC_ISR_ACC_IF_Msk) { return SET; } else { return RESET; } } /* ADCת»»Íê³ÉÊä³ö£¬Èí¼þÖ»¶Á£¨²»²úÉúÖжϣ© ת»»Íê³Éºó´ËÐźű£³ÖΪ¸ßµçƽ£¬Ö»ÓйرÕADC²Å»áÇå0 Ïà¹Øº¯Êý */ FlagStatus ADC_ISR_ADC_DONE_Chk(void) { if (ADC->ISR & ADC_ISR_ADC_DONE_Msk) { return SET; } else { return RESET; } } /* ADCת»»Íê³ÉÖжϱêÖ¾£¬Ó²¼þÖÃ룬Èí¼þд1ÇåÁ㣬д0ÎÞЧ Ïà¹Øº¯Êý */ void ADC_ISR_ADC_IF_Clr(void) { ADC->ISR = ADC_ISR_ADC_IF_Msk; } FlagStatus ADC_ISR_ADC_IF_Chk(void) { if (ADC->ISR & ADC_ISR_ADC_IF_Msk) { return SET; } else { return RESET; } } /* ÍⲿÀÛ¼ÓÆ÷ÀÛ¼ÓÖÜÆÚÅäÖ㬵¥Î»ADC_CLK 000£º1023£¨¶ÔÓ¦½á¹û10bit£© 001£º2047£¨¶ÔÓ¦½á¹û11bit£© 010£º4095£¨¶ÔÓ¦½á¹û12bit£© 011£º8191£¨¶ÔÓ¦½á¹û13bit£© 100£º16383£¨¶ÔÓ¦½á¹û14bit£© Others£º4095 Ïà¹Øº¯Êý */ void ADC_CFGR_ACC_PERIOD_Set(uint32_t SetValue) { uint32_t tmpreg; tmpreg = ADC->CFGR; tmpreg &= ~(ADC_CFGR_ACC_PERIOD_Msk); tmpreg |= (SetValue & ADC_CFGR_ACC_PERIOD_Msk); ADC->CFGR = tmpreg; } uint32_t ADC_CFGR_ACC_PERIOD_Get(void) { return (ADC->CFGR & ADC_CFGR_ACC_PERIOD_Msk); } /* SDADCʹÄܺómode_ctrlÑÓ³Ù³¤¶ÈÅäÖ㬵¥Î»ÊÇADC_CLKÖÜÆÚ 0x00£º²»ÑÓ³Ù 0xFF£ºÑÓ³Ù255¸öADC_CLK ×¢Ò⣺¸´Î»ÖµÎª16¸öʱÖÓÖÜÆÚ£¬²»µÃÐÞ¸ÄΪСÓÚ16µÄÊýÖµ Ïà¹Øº¯Êý */ void ADC_CFGR_RST_CTRL_DELAY_Set(uint32_t SetValue) { uint32_t tmpreg; tmpreg = ADC->CFGR; tmpreg &= ~(ADC_CFGR_RST_CTRL_DELAY_Msk); tmpreg |= (SetValue & ADC_CFGR_RST_CTRL_DELAY_Msk); ADC->CFGR = tmpreg; } uint32_t ADC_CFGR_RST_CTRL_DELAY_Get(void) { return (ADC->CFGR & ADC_CFGR_RST_CTRL_DELAY_Msk); } /* ADCÊäÈëͨµÀBufferʹÄÜ Ïà¹Øº¯Êý */ void ADC_CFGR_BUFEN_Setable(FunState NewState) { if (NewState == ENABLE) { ADC->CFGR |= (ADC_CFGR_BUFEN_Msk); } else { ADC->CFGR &= ~(ADC_CFGR_BUFEN_Msk); } } FunState ADC_CFGR_BUFEN_Getable(void) { if (ADC->CFGR & (ADC_CFGR_BUFEN_Msk)) { return ENABLE; } else { return DISABLE; } } /* ADCÊäÈëͨµÀÑ¡Ôñ 0001£ºADC_IN1 0010£ºADC_IN2 0011£ºADC_IN3 0100£ºADC_IN4 0101£ºADC_IN5 0110£ºADC_IN6 0111£ºADC_IN7 1000£ºADC_IN8 1001£ºADC_IN9 1010£ºADC_IN10 1011£ºADC_IN11 1100£ºADC_IN12 1110£ºVBAT 1111£ºTS Ïà¹Øº¯Êý */ void ADC_CFGR_BUFSEL_Set(uint32_t SetValue) { uint32_t tmpreg; tmpreg = ADC->CFGR; tmpreg &= ~(ADC_CFGR_BUFSEL_Msk); tmpreg |= (SetValue & ADC_CFGR_BUFSEL_Msk); ADC->CFGR = tmpreg; } uint32_t ADC_CFGR_BUFSEL_Get(void) { return (ADC->CFGR & ADC_CFGR_BUFSEL_Msk); } /* CICÂ˲¨Æ÷Êä³öÊý¾Ý£¬¸üÐÂÆµÂÊÓÉADC¹¤×÷ʱÖÓºÍOSR¹²Í¬¾ö¶¨£»×¢ÒâÕâ¸öÊý¾ÝÊÇÓзûºÏÊý£¬¸ñʽΪ¶þ½øÖƲ¹Âë¡£Ïà¹Øº¯Êý */ uint32_t CIC_DR_Read(void) { return (CIC->DR & CIC_DR_ADC_CIC_DATA_Msk); } /* CICÂ˲¨Æ÷Êä³öÊý¾Ý offsetµ÷ÖÆ¼Ä´æÆ÷£¬Èí¼þдÈëoffsetÖµ£¬Ó²¼þ½«CIC_DR¼ÓÉÏOSºó¿ÉÒԵõ½ÎÞ·ûºÏ½á¹û£¬Ïà¹Øº¯Êý */ void CIC_OS_Write(uint32_t SetValue) { CIC ->OS = (SetValue & CIC_OS_ADC_CIC_OS_Msk); } uint32_t CIC_OS_Read(void) { return (CIC ->OS & CIC_OS_ADC_CIC_OS_Msk); } /* CIC_DR + CIC_OSµÃµ½µÄÎÞ·ûºÏÊý½á¹û Ïà¹Øº¯Êý */ uint32_t CIC_USDR_Read(void) { return (CIC ->USDR & CIC_USDR_ADC_CIC_USDR_Msk); } /* CICÂ˲¨Æ÷ʹÄÜ (CIC enable) 0:¹Ø±ÕCIC 1:ʹÄÜCIC Ïà¹Øº¯Êý */ void CIC_CR_CIC_EN_Setable(FunState NewState) { if (NewState == ENABLE) { CIC ->CR |= (CIC_CR_CIC_EN_Msk); } else { CIC ->CR &= ~(CIC_CR_CIC_EN_Msk); } } FunState CIC_CR_CIC_EN_Getable(void) { if (CIC ->CR & (CIC_CR_CIC_EN_Msk)) { return ENABLE; } else { return DISABLE; } } /* CICʹÄÜºó¶ªÆúµÄÊä³öµãÊý (Number of Samples to be Discarded) ¿ÉÒÔ¶ªÆúADCʹÄܺó¿ªÍ·Êä³öµÄ0~255¸ö²ÉÑùµã Ïà¹Øº¯Êý */ void CIC_CR_NS_DISC_Set(uint32_t SetValue) { uint32_t tmpreg; tmpreg = CIC->CR; tmpreg &= ~(CIC_CR_NS_DISC_Msk); tmpreg |= (SetValue & CIC_CR_NS_DISC_Msk); CIC ->CR = tmpreg; } uint32_t CIC_CR_NS_DISC_Get(void) { return (CIC ->CR & CIC_CR_NS_DISC_Msk); } /* CIC Overrun Interrupt enable 0:½ûÖ¹CICÒç³öÖÐ¶Ï 1:ÔÊÐíCICÒç³öÖÐ¶Ï Ïà¹Øº¯Êý */ void CIC_CR_OVR_IE_Setable(FunState NewState) { if (NewState == ENABLE) { CIC ->CR |= (CIC_CR_OVR_IE_Msk); } else { CIC ->CR &= ~(CIC_CR_OVR_IE_Msk); } } FunState CIC_CR_OVR_IE_Getable(void) { if (CIC ->CR & (CIC_CR_OVR_IE_Msk)) { return ENABLE; } else { return DISABLE; } } /* CICÖжÏʹÄÜ(CIC interrupt enable) 0:½ûÖ¹CICÖÐ¶Ï 1:ÔÊÐíCICÖжÏ,µ±CIC_IFÖÃλʱ²úÉúÖжÏʼþ Ïà¹Øº¯Êý */ void CIC_CR_CIC_IE_Setable(FunState NewState) { if (NewState == ENABLE) { CIC ->CR |= (CIC_CR_CIC_IE_Msk); } else { CIC ->CR &= ~(CIC_CR_CIC_IE_Msk); } } FunState CIC_CR_CIC_IE_Getable(void) { if (CIC ->CR & (CIC_CR_CIC_IE_Msk)) { return ENABLE; } else { return DISABLE; } } /* Êä³öÊý¾Ý½ØÈ¡¿ØÖÆ (Truncate),ÅäÖÃ×îÖÕ½á¹ûÖжªÆú×îµÍλµÄλÊý; Ïà¹Øº¯Êý */ void CIC_CR_TRUNC_Set(uint32_t SetValue) { uint32_t tmpreg; tmpreg = CIC ->CR; tmpreg &= ~(CIC_CR_TRUNC_Msk); tmpreg |= (SetValue & CIC_CR_TRUNC_Msk); CIC ->CR = tmpreg; } uint32_t CIC_CR_TRUNC_Get(void) { return (CIC ->CR & CIC_CR_TRUNC_Msk); } /* ¹ý²ÉÑùÂÊÅäÖà (Over Sampling Rate) 000:x8 001:x16 010:x32 011:x64 100:x128 101:x256 110:x512 111:x1024 Ïà¹Øº¯Êý */ void CIC_CR_OSR_Set(uint32_t SetValue) { uint32_t tmpreg; tmpreg = CIC ->CR; tmpreg &= ~(CIC_CR_OSR_Msk); tmpreg |= (SetValue & CIC_CR_OSR_Msk); CIC ->CR = tmpreg; } uint32_t CIC_CR_OSR_Get(void) { return (CIC ->CR & CIC_CR_OSR_Msk); } void CIC_ISR_CIC_OVR_Clr(void) { CIC ->ISR = CIC_ISR_CIC_OVR_Msk; } FlagStatus CIC_ISR_CIC_OVR_Chk(void) { if (CIC ->ISR & CIC_ISR_CIC_OVR_Msk) { return SET; } else { return RESET; } } void CIC_ISR_CIC_IF_Clr(void) { CIC ->ISR = CIC_ISR_CIC_IF_Msk; } FlagStatus CIC_ISR_CIC_IF_Chk(void) { if (CIC ->ISR & CIC_ISR_CIC_IF_Msk) { return SET; } else { return RESET; } } void ADC_Deinit(void) { //ADC->CR = 0x00000000; //ADC->TRIM = 0x00000000; //ADC->DR = 0x00000000; //ADC->ISR = 0x00000000; //ADC->CFGR = 0x00000000; } /******END OF FILE****/