/**
  ******************************************************************************
  * @file    fm33a0xxev_bstim.c
  * @author  FM33A0XXEV Application Team
  * @version V1.0.0
  * @date    16-April-2020
  * @brief   This file provides firmware functions to manage the following 
  *          functionalities of....:
  *
*/

/* Includes ------------------------------------------------------------------*/

#include "fm33a0xxev_bstim.h"

/** @addtogroup fm33a0xxev_StdPeriph_Driver
  * @{
  */

/** @defgroup BSTIM 
  * @brief BSTIM driver modules
  * @{
  */ 
  
/* Auto-reloadԤװÔØʹÄÜ (Auto-Reload Preload Enable)
0£ºARR¼Ä´æÆ÷²»Ê¹ÄÜpreload
1£ºARR¼Ä´æÆ÷ʹÄÜpreload Ïà¹Øº¯Êý */
void BSTIM_CR1_ARPE_Setable(FunState NewState)
{
	if (NewState == ENABLE)
	{
		BSTIM->CR1 |= (BSTIM_CR1_ARPE_Msk);
	}
	else
	{
		BSTIM->CR1 &= ~(BSTIM_CR1_ARPE_Msk);
	}
}

FunState BSTIM_CR1_ARPE_Getable(void)
{
	if (BSTIM->CR1 & (BSTIM_CR1_ARPE_Msk))
	{
		return ENABLE;
	}
	else
	{
		return DISABLE;
	}
}

/* µ¥Âö³åÊä³öģʽ (One Pulse Mode)
0£ºUpdate Event·¢Éúʱ¼ÆÊýÆ÷²»Í£Ö¹
1£ºUpdate Event·¢Éúʱ¼ÆÊýÆ÷Í£Ö¹£¨×Ô¶¯ÇåÁãCEN£© Ïà¹Øº¯Êý */
void BSTIM_CR1_OPM_Set(uint32_t SetValue)
{
	uint32_t tmpreg;
	tmpreg = BSTIM->CR1;
	tmpreg &= ~(BSTIM_CR1_OPM_Msk);
	tmpreg |= (SetValue & BSTIM_CR1_OPM_Msk);
	BSTIM->CR1 = tmpreg;
}

uint32_t BSTIM_CR1_OPM_Get(void)
{
	return (BSTIM->CR1 & BSTIM_CR1_OPM_Msk);
}

/* ¸üÐÂÇëÇóÑ¡Ôñ (Update Request Select)
0£ºÒÔÏÂʼþÄܹ»²úÉúupdateÖжÏ
¼ÆÊýÆ÷ÉÏÒç³ö»òÏÂÒç³ö
Èí¼þÖÃλUG¼Ä´æÆ÷
´Ó»ú¿ØÖÆÆ÷²úÉúupdate
1£º½ö¼ÆÊýÆ÷ÉÏÒç³ö»òÏÂÒç³ö»á²úÉúupdateÖжϻòDMAÇëÇó Ïà¹Øº¯Êý */
void BSTIM_CR1_URS_Set(uint32_t SetValue)
{
	uint32_t tmpreg;
	tmpreg = BSTIM->CR1;
	tmpreg &= ~(BSTIM_CR1_URS_Msk);
	tmpreg |= (SetValue & BSTIM_CR1_URS_Msk);
	BSTIM->CR1 = tmpreg;
}

uint32_t BSTIM_CR1_URS_Get(void)
{
	return (BSTIM->CR1 & BSTIM_CR1_URS_Msk);
}

/* ½ûÖ¹update (Update Disable)
0£ºÊ¹ÄÜupdateʼþ£»ÒÔÏÂʼþ·¢Éúʱ²úÉúupdateʼþ
¼ÆÊýÆ÷ÉÏÒç³ö»òÏÂÒç³ö
Èí¼þÖÃλUG¼Ä´æÆ÷
´Ó»ú¿ØÖÆÆ÷²úÉúupdate
1£º½ûÖ¹updateʼþ£¬²»¸üÐÂshadow¼Ä´æÆ÷¡£µ±UGÖÃλ»ò´Ó»ú¿ØÖÆÆ÷ÊÕµ½Ó²¼þresetʱÖØгõʼ»¯¼ÆÊýÆ÷ºÍÔ¤·ÖƵÆ÷¡£ Ïà¹Øº¯Êý */
void BSTIM_CR1_UDIS_Setable(FunState NewState)
{
	if (NewState == ENABLE)
	{
		BSTIM->CR1 |= (BSTIM_CR1_UDIS_Msk);
	}
	else
	{
		BSTIM->CR1 &= ~(BSTIM_CR1_UDIS_Msk);
	}
}

FunState BSTIM_CR1_UDIS_Getable(void)
{
	if (BSTIM->CR1 & (BSTIM_CR1_UDIS_Msk))
	{
		return ENABLE;
	}
	else
	{
		return DISABLE;
	}
}

/* ¼ÆÊýÆ÷ʹÄÜ (Counter Enable)
0£º¼ÆÊýÆ÷¹Ø±Õ
1£º¼ÆÊýÆ÷ʹÄÜ
×¢Ò⣺Íⲿ´¥·¢Ä£Ê½¿ÉÒÔ×Ô¶¯ÖÃλCEN Ïà¹Øº¯Êý */
void BSTIM_CR1_CEN_Setable(FunState NewState)
{
	if (NewState == ENABLE)
	{
		BSTIM->CR1 |= (BSTIM_CR1_CEN_Msk);
	}
	else
	{
		BSTIM->CR1 &= ~(BSTIM_CR1_CEN_Msk);
	}
}

FunState BSTIM_CR1_CEN_Getable(void)
{
	if (BSTIM->CR1 & (BSTIM_CR1_CEN_Msk))
	{
		return ENABLE;
	}
	else
	{
		return DISABLE;
	}
}

/* Ö÷»úģʽѡÔñ£¬ÓÃÓÚÅäÖÃÖ÷»úģʽÏÂÏò´Ó»ú·¢Ë͵Äͬ²½´¥·¢Ðźţ¨TRGO£©Ô´ (Master Mode Select)
000£ºBSTIM_EGRµÄUG¼Ä´æÆ÷±»ÓÃ×÷TRGO
001£º¼ÆÊýÆ÷ʹÄÜÐźÅCNT_EN±»ÓÃ×÷TRGO£¬¿ÉÓÃÓÚͬʱÆô¶¯¶à¸ö¶¨Ê±Æ÷
010£ºUE£¨update event£©Ðźű»ÓÃ×÷TRGO
011/100/111£ºRFU

×¢Ò⣺´Ó»ú¶¨Ê±Æ÷»òADC±ØÐëÊÂÏÈʹÄܹ¤×÷ʱÖÓ£¬²ÅÄܽÓÊÕÖ÷»ú¶¨Ê±Æ÷·¢Ë͵ÄTRGO Ïà¹Øº¯Êý */
void BSTIM_CR2_Write(uint32_t SetValue)
{
	BSTIM->CR2 = (SetValue & BSTIM_CR2_MMS_Msk);
}

uint32_t BSTIM_CR2_Read(void)
{
	return (BSTIM->CR2 & BSTIM_CR2_MMS_Msk);
}

/* UpdateʼþÖжÏʹÄÜ (Update event Interrupt Enable)
0£º½ûÖ¹UpdateʼþÖжÏ
1£ºÔÊÐíUpdateʼþÖÐ¶Ï Ïà¹Øº¯Êý */
void BSTIM_IER_UIE_Setable(FunState NewState)
{
	if (NewState == ENABLE)
	{
		BSTIM->IER |= (BSTIM_IER_UIE_Msk);
	}
	else
	{
		BSTIM->IER &= ~(BSTIM_IER_UIE_Msk);
	}
}

FunState BSTIM_IER_UIE_Getable(void)
{
	if (BSTIM->IER & (BSTIM_IER_UIE_Msk))
	{
		return ENABLE;
	}
	else
	{
		return DISABLE;
	}
}

/* UpdateʼþÖжϱêÖ¾£¬Ó²¼þÖÃ룬Èí¼þд1ÇåÁã¡£(Update event Interrupt Flag,write 1 to flag)
µ±ÒÔÏÂʼþ·¢Éúʱ£¬UIFÖÃ룬²¢¸üÐÂshadow¼Ä´æÆ÷
-Öظ´¼ÆÊýÆ÷=0£¬²¢ÇÒUDIS=0µÄÇé¿öÏ£¬¼ÆÊýÆ÷·¢ÉúÒç³ö
-URS=0ÇÒUDIS=0µÄÇé¿öÏ£¬Èí¼þÖÃλUG¼Ä´æÆ÷³õʼ»¯¼ÆÊýÆ÷
-URS=0ÇÒUDIS=0µÄÇé¿öÏ£¬´¥·¢Ê¼þ³õʼ»¯¼ÆÊýÆ÷ Ïà¹Øº¯Êý */
void BSTIM_ISR_UIF_Clr(void)
{
	BSTIM->ISR = BSTIM_ISR_UIF_Msk;
}

FlagStatus BSTIM_ISR_UIF_Chk(void)
{
	if (BSTIM->ISR & BSTIM_ISR_UIF_Msk)
	{
		return SET;
	}
	else
	{
		return RESET;
	}
}

/* Èí¼þUpdateʼþ£¬Èí¼þÖÃλ´Ë¼Ä´æÆ÷²úÉúUpdateʼþ£¬Ó²¼þ×Ô¶¯ÇåÁã (User Generate)
Èí¼þÖÃλUGʱ»áÖØгõʼ»¯¼ÆÊýÆ÷²¢¸üÐÂshadow¼Ä´æÆ÷£¬Ô¤·ÖƵ¼ÆÊýÆ÷±»ÇåÁã¡£ Ïà¹Øº¯Êý */
void BSTIM_EGR_UG_Setable(FunState NewState)
{
	if (NewState == ENABLE)
	{
		BSTIM->EGR |= (BSTIM_EGR_UG_Msk);
	}
	else
	{
		BSTIM->EGR &= ~(BSTIM_EGR_UG_Msk);
	}
}

/* ¼ÆÊýÆ÷Öµ (Counter) Ïà¹Øº¯Êý */
void BSTIM_CNTR_Write(uint32_t SetValue)
{
	BSTIM->CNTR = (SetValue);
}

uint32_t BSTIM_CNTR_Read(void)
{
	return (BSTIM->CNTR);
}

/* ¼ÆÊýÆ÷ʱÖÓ£¨CK_CNT£©Ô¤·ÖƵֵ (Counter Clock Prescaler)
fCK_CNT=fCK_PSC/(PSC[15:0]+1)
ÕâÊÇÒ»¸öpreload¼Ä´æÆ÷£¬ÔÚupdateʼþ·¢ÉúʱÆäÄÚÈݱ»ÔØÈëshadow¼Ä´æÆ÷ Ïà¹Øº¯Êý */
void BSTIM_PSCR_Write(uint32_t SetValue)
{
	BSTIM->PSCR = (SetValue);
}

uint32_t BSTIM_PSCR_Read(void)
{
	return (BSTIM->PSCR);
}

/* ¼ÆÊýÒç³öʱµÄ×Ô¶¯ÖØÔØÖµ (Auto-Reload Register)
ÕâÊÇÒ»¸öpreload¼Ä´æÆ÷£¬ÔÚupdateʼþ·¢ÉúʱÆäÄÚÈݱ»ÔØÈëshadow¼Ä´æÆ÷ Ïà¹Øº¯Êý */
void BSTIM_ARR_Write(uint32_t SetValue)
{
	BSTIM->ARR = (SetValue);
}

uint32_t BSTIM_ARR_Read(void)
{
	return (BSTIM->ARR);
}


void BSTIM_Deinit(void)
{
	//BSTIM->CR1 = 0x00000000;
	//BSTIM->CR2 = 0x00000000;
	//BSTIM->IER = 0x00000000;
	//BSTIM->ISR = 0x00000000;
	//BSTIM->EGR = 0x00000000;
	//BSTIM->CNTR = 0x00000000;
	//BSTIM->PSCR = 0x00000000;
	//BSTIM->ARR = 0x00000000;
}

/******END OF FILE****/