/** ****************************************************************************** * @file fm33a0xxev_qspi.c * @author FM33A0XXEV Application Team * @version V1.0.0 * @date 16-April-2020 * @brief This file provides firmware functions to manage the following * functionalities of....: * */ /* Includes ------------------------------------------------------------------*/ #include "fm33a0xxev_qspi.h" #include "fm33a0xxev_rmu.h" /** @addtogroup fm33a0xxev_StdPeriph_Driver * @{ */ /** @defgroup QSPI * @brief QSPI driver modules * @{ */ void QSPI_CR_PRESCALER_Set(uint32_t SetValue) { uint32_t tmpreg; SetValue <<= QSPI_CR_PRESCALER_Pos; tmpreg = QSPI->CR; tmpreg &= ~(QSPI_CR_PRESCALER_Msk); tmpreg |= (SetValue & QSPI_CR_PRESCALER_Msk); QSPI->CR = tmpreg; } uint32_t QSPI_CR_PRESCALER_Get(void) { return (QSPI->CR & QSPI_CR_PRESCALER_Msk); } /* ÂÖѯƥÅäģʽ 0£ºANDģʽ£¬ËùÓÐbit¶¼Æ¥Åä²ÅÖÃλSMF 1£ºORģʽ£¬ÖÁÉÙ1bitÆ¥Åä¾Í»áÖÃλSMF Ïà¹Øº¯Êý */ void QSPI_CR_PMM_Set(uint32_t SetValue) { uint32_t tmpreg; tmpreg = QSPI->CR; tmpreg &= ~(QSPI_CR_PMM_Msk); tmpreg |= (SetValue & QSPI_CR_PMM_Msk); QSPI->CR = tmpreg; } uint32_t QSPI_CR_PMM_Get(void) { return (QSPI->CR & QSPI_CR_PMM_Msk); } /* ³¬Ê±ÖжÏʹÄÜ 0£º½ûÖ¹³¬Ê±ÖÐ¶Ï 1£ºÔÊÐí³¬Ê±ÖÐ¶Ï Ïà¹Øº¯Êý */ void QSPI_CR_TOIE_Setable(FunState NewState) { if (NewState == ENABLE) { QSPI->CR |= (QSPI_CR_TOIE_Msk); } else { QSPI->CR &= ~(QSPI_CR_TOIE_Msk); } } FunState QSPI_CR_TOIE_Getable(void) { if (QSPI->CR & (QSPI_CR_TOIE_Msk)) { return ENABLE; } else { return DISABLE; } } /* ״̬ƥÅäÖжÏʹÄÜ 0£º½ûֹ״̬ƥÅäÖÐ¶Ï 1£ºÔÊÐí״̬ƥÅäÖÐ¶Ï Ïà¹Øº¯Êý */ void QSPI_CR_SMIE_Setable(FunState NewState) { if (NewState == ENABLE) { QSPI->CR |= (QSPI_CR_SMIE_Msk); } else { QSPI->CR &= ~(QSPI_CR_SMIE_Msk); } } FunState QSPI_CR_SMIE_Getable(void) { if (QSPI->CR & (QSPI_CR_SMIE_Msk)) { return ENABLE; } else { return DISABLE; } } /* FIFOˮλÖжÏʹÄÜ 0£º½ûÖ¹FIFOˮλÖÐ¶Ï 1£ºÔÊÐíFIFOˮλÖÐ¶Ï Ïà¹Øº¯Êý */ void QSPI_CR_FTIE_Setable(FunState NewState) { if (NewState == ENABLE) { QSPI->CR |= (QSPI_CR_FTIE_Msk); } else { QSPI->CR &= ~(QSPI_CR_FTIE_Msk); } } FunState QSPI_CR_FTIE_Getable(void) { if (QSPI->CR & (QSPI_CR_FTIE_Msk)) { return ENABLE; } else { return DISABLE; } } /* ´«ÊäÍê³ÉÖжÏʹÄÜ 0£º½ûÖ¹´«ÊäÍê³ÉÖÐ¶Ï 1£ºÔÊÐí´«ÊäÍê³ÉÖÐ¶Ï Ïà¹Øº¯Êý */ void QSPI_CR_TCIE_Setable(FunState NewState) { if (NewState == ENABLE) { QSPI->CR |= (QSPI_CR_TCIE_Msk); } else { QSPI->CR &= ~(QSPI_CR_TCIE_Msk); } } FunState QSPI_CR_TCIE_Getable(void) { if (QSPI->CR & (QSPI_CR_TCIE_Msk)) { return ENABLE; } else { return DISABLE; } } /* ´«Êä´íÎóÖжÏʹÄÜ 0£º½ûÖ¹´«Êä´íÎóÖÐ¶Ï 1£ºÔÊÐí´«Êä´íÎóÖÐ¶Ï Ïà¹Øº¯Êý */ void QSPI_CR_TEIE_Setable(FunState NewState) { if (NewState == ENABLE) { QSPI->CR |= (QSPI_CR_TEIE_Msk); } else { QSPI->CR &= ~(QSPI_CR_TEIE_Msk); } } FunState QSPI_CR_TEIE_Getable(void) { if (QSPI->CR & (QSPI_CR_TEIE_Msk)) { return ENABLE; } else { return DISABLE; } } /* FIFOˮλ¼Ä´æÆ÷£¬½öÍâÉèģʽÏÂÆðЧ ÍâÉèдģʽ£º 0£ºFTFÔÚFIFO¿Õ×Ö½Ú´óÓÚµÈÓÚ1ʱÖÃλ 1£ºFTFÔÚFIFO¿Õ×Ö½Ú´óÓÚµÈÓÚ2ʱÖÃλ ¡­¡­ 15£ºFTFÔÚFIFO¿Õ×Ö½ÚµÈÓÚ16ʱÖÃλ ÍâÉè¶Áģʽ£º 0£ºFTFÔÚFIFOÖÐ×Ö½ÚÊý´óÓÚµÈÓÚ1ʱÖÃλ 1£ºFTFÔÚFIFOÖÐ×Ö½ÚÊý´óÓÚµÈÓÚ2ʱÖÃλ ¡­¡­ 15£ºFTFÔÚFIFOÖÐ×Ö½ÚÊýµÈÓÚ16ʱÖÃλ Ïà¹Øº¯Êý */ void QSPI_CR_FIFOTHR_Set(uint32_t SetValue) { uint32_t tmpreg; tmpreg = QSPI->CR; tmpreg &= ~(QSPI_CR_FIFOTHR_Msk); tmpreg |= (SetValue & QSPI_CR_FIFOTHR_Msk); QSPI->CR = tmpreg; } uint32_t QSPI_CR_FIFOTHR_Get(void) { return (QSPI->CR & QSPI_CR_FIFOTHR_Msk); } /* ÑÓ³Ù²ÉÑùʹÄÜ 0£º¹Ø±ÕÑÓ³Ù²ÉÑù¹¦ÄÜ 1£ºÊ¹ÄÜÑÓ³Ù²ÉÑù¹¦ÄÜ Ïà¹Øº¯Êý */ void QSPI_CR_SSHFT_Setable(FunState NewState) { if (NewState == ENABLE) { QSPI->CR |= (QSPI_CR_SSHFT_Msk); } else { QSPI->CR &= ~(QSPI_CR_SSHFT_Msk); } } FunState QSPI_CR_SSHFT_Getable(void) { if (QSPI->CR & (QSPI_CR_SSHFT_Msk)) { return ENABLE; } else { return DISABLE; } } /* ×ÜÏß³¬Ê±Ê¹ÄÜ£¬´Ë¼Ä´æÆ÷½öÔÚ´æ´¢Æ÷Ó³ÉäģʽÏÂÓÐЧ µ±BUSYÖÃλºó£¬Èç¹ûQuadSPI²»·¢Æð¶ÔQSPI´æ´¢Æ÷µÄ·ÃÎÊ£¬³¬Ê±¼Ä´æÆ÷¿ªÊ¼¼ÆÊý£¬¼ÆÊýÒç³ö³¤¶ÈÓÉTIMEOUT¼Ä´æÆ÷¶¨Òå¡£µ±QSPI×ÜÏß³¤Ê±¼äÎÞ¶¯×÷£¬¼ÆÊýÆ÷Òç³ö£¬nCS±»×Ô¶¯À­¸ß£¬Ç¿ÖƽáÊøµ±Ç°´«Êä¹ý³Ì¡£ 0£º¹Ø±Õ³¬Ê±¹¦ÄÜ 1£ºÊ¹Äܳ¬Ê±¹¦ÄÜ Ïà¹Øº¯Êý */ void QSPI_CR_TCEN_Setable(FunState NewState) { if (NewState == ENABLE) { QSPI->CR |= (QSPI_CR_TCEN_Msk); } else { QSPI->CR &= ~(QSPI_CR_TCEN_Msk); } } FunState QSPI_CR_TCEN_Getable(void) { if (QSPI->CR & (QSPI_CR_TCEN_Msk)) { return ENABLE; } else { return DISABLE; } } /* DMAʹÄÜ 0£ºDMA¹¦Äܹرգ¬QuadSPI²»»á·¢ËÍDMAÇëÇó 1£ºDMA¹¦ÄÜ¿ªÆô£¬QuadSPIÔÚÂú×ãÌõ¼þʱ·¢ËÍDMAÇëÇó Ïà¹Øº¯Êý */ void QSPI_CR_DMAEN_Setable(FunState NewState) { if (NewState == ENABLE) { QSPI->CR |= (QSPI_CR_DMAEN_Msk); } else { QSPI->CR &= ~(QSPI_CR_DMAEN_Msk); } } FunState QSPI_CR_DMAEN_Getable(void) { if (QSPI->CR & (QSPI_CR_DMAEN_Msk)) { return ENABLE; } else { return DISABLE; } } /* µ±Ç°´«ÊäÖÕÖ¹¼Ä´æÆ÷£¬Èí¼þд1ÖÕÖ¹´«Ê䣬Ӳ¼þÀ­¸ßnCSºó×Ô¶¯ÇåÁã Ïà¹Øº¯Êý */ void QSPI_CR_ABORT_Setable(FunState NewState) { if (NewState == ENABLE) { QSPI->CR |= (QSPI_CR_ABORT_Msk); } else { QSPI->CR &= ~(QSPI_CR_ABORT_Msk); } } FunState QSPI_CR_ABORT_Getable(void) { if (QSPI->CR & (QSPI_CR_ABORT_Msk)) { return ENABLE; } else { return DISABLE; } } /* QuadSPIÄ£¿éʹÄÜ 0£º¹Ø±ÕQuadSPI 1£ºÊ¹ÄÜQuadSPI Ïà¹Øº¯Êý */ void QSPI_CR_EN_Setable(FunState NewState) { if (NewState == ENABLE) { QSPI->CR |= (QSPI_CR_EN_Msk); } else { QSPI->CR &= ~(QSPI_CR_EN_Msk); } } FunState QSPI_CR_EN_Getable(void) { if (QSPI->CR & (QSPI_CR_EN_Msk)) { return ENABLE; } else { return DISABLE; } } /* nCS×îС¸ßµçƽʱ¼ä£¬¶¨ÒåÁËÁ¬ÐøÁ½¸öÖ¡Ö®¼änCSËùÐè±£³Ö¸ßµçƽµÄ×î¶Ìʱ¼ä£¬ÒÔQSPI_CLKÖÜÆÚ¼ÆÊý 0£ºÖÁÉÙ1 cycle 1£ºÖÁÉÙ2 cycles ¡­¡­ 7£ºÖÁÉÙ8 cycles Ïà¹Øº¯Êý */ void QSPI_CFG_CSHT_Set(uint32_t SetValue) { uint32_t tmpreg; tmpreg = QSPI->CFG; tmpreg &= ~(QSPI_CFG_CSHT_Msk); tmpreg |= (SetValue & QSPI_CFG_CSHT_Msk); QSPI->CFG = tmpreg; } uint32_t QSPI_CFG_CSHT_Get(void) { return (QSPI->CFG & QSPI_CFG_CSHT_Msk); } /* SPI Clock Mode¼Ä´æÆ÷ 0£ºmode 0 1£ºmode 3 Ïà¹Øº¯Êý */ void QSPI_CFG_CKMODE_Set(uint32_t SetValue) { uint32_t tmpreg; tmpreg = QSPI->CFG; tmpreg &= ~(QSPI_CFG_CKMODE_Msk); tmpreg |= (SetValue & QSPI_CFG_CKMODE_Msk); QSPI->CFG = tmpreg; } uint32_t QSPI_CFG_CKMODE_Get(void) { return (QSPI->CFG & QSPI_CFG_CKMODE_Msk); } /* FIFOˮλ±êÖ¾ ´Ë¼Ä´æÆ÷±íʾµ±Ç°FIFOÖб£´æµÄÊý¾Ý×Ö½ÚÊý£¬0±íʾFIFO¿Õ£¬16±íʾFIFOÂú ×Ô¶¯²éѯģʽÏ´˼ĴæÆ÷±£³Ö0 Ïà¹Øº¯Êý */ uint32_t QSPI_SR_FIFOLVL_Get(void) { return (QSPI->SR & QSPI_SR_FIFOLVL_Msk) >> QSPI_SR_FIFOLVL_Pos; } /* 1±íʾQuadSPI´«Êä½øÐÐÖУ¬Í¨ÐŽáÊøºó×Ô¶¯ÇåÁã Ïà¹Øº¯Êý */ FlagStatus QSPI_SR_BUSY_Chk(void) { if (QSPI->SR & QSPI_SR_BUSY_Msk) { return SET; } else { return RESET; } } /* ³¬Ê±±êÖ¾£¬Ó²¼þÖÃ룬Èí¼þд1ÇåÁã Ïà¹Øº¯Êý */ void QSPI_SR_TOF_Clr(void) { QSPI->SR = QSPI_SR_TOF_Msk; } FlagStatus QSPI_SR_TOF_Chk(void) { if (QSPI->SR & QSPI_SR_TOF_Msk) { return SET; } else { return RESET; } } /* ×Ô¶¯²éѯģʽϱíÕ÷״̬¼Ä´æÆ÷Æ¥Åä³É¹¦£¬Ó²¼þÖÃ룬Èí¼þд1ÇåÁã Ïà¹Øº¯Êý */ void QSPI_SR_SMF_Clr(void) { QSPI->SR = QSPI_SR_SMF_Msk; } FlagStatus QSPI_SR_SMF_Chk(void) { if (QSPI->SR & QSPI_SR_SMF_Msk) { return SET; } else { return RESET; } } /* FIFO threshold±êÖ¾£¬FIFOˮλ¸ßÓÚÉ趨ãÐֵʱ×Ô¶¯ÖÃ룬µÍÓÚãÐֵʱ×Ô¶¯ÇåÁã ×Ô¶¯²éѯģʽÏ£¬Ã¿´Î¶Á»ØÒ»×é״ֵ̬ºó¶¼»á×Ô¶¯ÖÃλFTF£¬Èç¹ûÈí¼þ¶ÁÈ¡QSPI_DATA¼Ä´æÆ÷ÔòFTFÇåÁã Ïà¹Øº¯Êý */ FlagStatus QSPI_SR_FTF_Chk(void) { if (QSPI->SR & QSPI_SR_FTF_Msk) { return SET; } else { return RESET; } } /* ´«ÊäÍê³É±êÖ¾£¬Ó²¼þÖÃ룬Èí¼þд1ÇåÁã Ïà¹Øº¯Êý */ void QSPI_SR_TCF_Clr(void) { QSPI->SR = QSPI_SR_TCF_Msk; } FlagStatus QSPI_SR_TCF_Chk(void) { if (QSPI->SR & QSPI_SR_TCF_Msk) { return SET; } else { return RESET; } } /* ´«ÊäÊý¾Ý³¤¶ÈΪDATALEN+1£¨bytes£© Ïà¹Øº¯Êý */ void QSPI_DATALEN_Write(uint32_t SetValue) { QSPI->DATALEN = (SetValue); } uint32_t QSPI_DATALEN_Read(void) { return (QSPI->DATALEN); } /* QuadSPI ͨÐÅ¿ØÖƼĴæÆ÷ Ïà¹Øº¯Êý */ void QSPI_CCR_Write(uint32_t SetValue) { QSPI->CCR = (SetValue); } uint32_t QSPI_CCR_Read(void) { return (QSPI->CCR); } /* ·¢Ë͸øQSPI´æ´¢Æ÷µÄµØÖ·£¬ÔÚ´æ´¢Æ÷Ó³ÉäģʽÏÂÎÞЧ Ïà¹Øº¯Êý */ void QSPI_ADDR_Write(uint32_t SetValue) { QSPI->ADDR = (SetValue); } uint32_t QSPI_ADDR_Read(void) { return (QSPI->ADDR); } /* ·¢Ë͸øQSPI´æ´¢Æ÷µÄalternate bytes Ïà¹Øº¯Êý */ void QSPI_ABR_Write(uint32_t SetValue) { QSPI->ABR = (SetValue); } uint32_t QSPI_ABR_Read(void) { return (QSPI->ABR); } /* QSPIÊý¾Ý¼Ä´æÆ÷ ÍâÉèģʽд²Ù×÷ʱ£¬¶ÔQSPI_DR¼Ä´æÆ÷дÈëµÄÊý¾Ý½«±»push FIFO£¬Ö§³Ö×Ö½Ú¡¢°ë×Ö¡¢×ÖдÈ룬·Ö±ð¶ÔFIFOѹÈë1¡¢2¡¢4×Ö½Ú£»Èç¹ûдÈë×Ö½ÚÊý´óÓÚFIFOÖпÕ×Ö½ÚÊý£¬µ±Ç°Ð´²Ù×÷±»¹ÒÆð£¬Ö±µ½FIFOÖÐÓÐ×ã¹»¿Õ¼äÈÝÄɵ±Ç°Ð´ÈëÊý¾Ý¡£ ÍâÉèģʽ¶Á²Ù×÷ʱ£¬¶ÁÈ¡QSPI_DR¼Ä´æÆ÷½«pop FIFO£¬Ö§³Ö×Ö½Ú¡¢°ë×Ö¡¢×Ö¶ÁÈ¡£¬·Ö±ð´ÓFIFOµ¯³ö1¡¢2¡¢4×Ö½Ú£»Èç¹û¶ÁÈ¡×Ö½ÚÊý´óÓÚFIFOÖÐÓÐЧ×Ö½ÚÊý£¬µ±Ç°¶Á²Ù×÷±»¹ÒÆð£¬Ö±µ½FIFOÖÐÓÐ×ã¹»×Ö½Ú¿ÉÒÔ±»¶ÁÈ¡£¬»òÕß´«ÊäÍê³É£¬ºóÒ»ÖÖÇé¿öÏÂÖ»µ¯³ö×îºó¼¸¸öʵ¼ÊÓÐЧ×Ö½Ú¡£ ¶ÔQSPI_DRµÄ·ÃÎʱØÐë¶ÔÆëµÍµØÖ·£¬¼´×Ö½Ú·ÃÎʱØÐë¶ÔÆëQSPI_DR[7:0]£¬°ë×Ö·ÃÎʱØÐë¶ÔÆëQSPI_DR[15:0] Ïà¹Øº¯Êý */ void QSPI_DR_WriteByte(uint8_t SetValue) { *((uint8_t *)&(QSPI->DR)) = (SetValue); } uint8_t QSPI_DR_ReadByte(void) { return (*((uint8_t *)&(QSPI->DR))); } void QSPI_DR_WriteHalfword(uint16_t SetValue) { *((uint16_t *)&(QSPI->DR)) = (SetValue); } uint16_t QSPI_DR_ReadHalfword(void) { return (*((uint16_t *)&(QSPI->DR))); } void QSPI_DR_WriteWord(uint32_t SetValue) { *((uint32_t *)&(QSPI->DR)) = (SetValue); } uint32_t QSPI_DR_ReadWord(void) { return (*((uint32_t *)&(QSPI->DR))); } /* ×Ô¶¯×´Ì¬²éѯģʽϵÄ״̬mask¼Ä´æÆ÷£¬¶ÔÓ¦bitд0ÆÁ±ÎÏàӦ״̬λ Ïà¹Øº¯Êý */ void QSPI_SMSK_Write(uint32_t SetValue) { QSPI->SMSK = (SetValue); } uint32_t QSPI_SMSK_Read(void) { return (QSPI->SMSK); } /* ×Ô¶¯×´Ì¬²éѯģʽϵÄ״̬ƥÅä¼Ä´æÆ÷ ±È½Ï¶ÔÏóÊÇQSPI_DATA & QSPI_SMSK Ïà¹Øº¯Êý */ void QSPI_SMAT_Write(uint32_t SetValue) { QSPI->SMAT = (SetValue); } uint32_t QSPI_SMAT_Read(void) { return (QSPI->SMAT); } /* ×Ô¶¯×´Ì¬²éѯģʽϵÄÂÖѯ¼ä¸ô£¨polling interval£©£¬¶¨ÒåΪQSPI_CLKÖÜÆÚÊý Ïà¹Øº¯Êý */ void QSPI_PITV_Write(uint32_t SetValue) { QSPI->PITV = (SetValue & QSPI_PITV_QSPI_PITV_Msk); } uint32_t QSPI_PITV_Read(void) { return (QSPI->PITV & QSPI_PITV_QSPI_PITV_Msk); } /* ³¬Ê±ÖÜÆÚÉèÖ㬶¨ÒåΪQSPI_CLKÖÜÆÚÊý£¬½öÔÚ´æ´¢Æ÷Ó³ÉäģʽÏÂÓÐЧ µ±FIFOÂúÖ®ºó£¬QSPI×ÜÏßÐÐΪֹͣ£¬³¬Ê±¼ÆÊýÆ÷¿ªÊ¼¼ÆÊý£¬¼ÆÊýÖµµ½´ïQSPI_TOÉ趨ֵ֮ºó£¬À­¸ßnCS Ïà¹Øº¯Êý */ void QSPI_TO_Write(uint32_t SetValue) { QSPI->TO = (SetValue & QSPI_TO_QSPI_TO_Msk); } uint32_t QSPI_TO_Read(void) { return (QSPI->TO & QSPI_TO_QSPI_TO_Msk); } void QSPI_Deinit(void) { } void QSPI_Init(void) { } /******END OF FILE****/