From e4424eb6b50d0300583c422dfb71d58e040f4b9e Mon Sep 17 00:00:00 2001
From: jinlicong <493886250@qq.com>
Date: Tue, 11 Jun 2024 19:54:37 +0800
Subject: [PATCH] 继续测试优化
---
Function/E2P/EEPROM.h | 40 ++++++++++++++++++++++++++++++----------
1 files changed, 30 insertions(+), 10 deletions(-)
diff --git a/Function/E2P/EEPROM.h b/Function/E2P/EEPROM.h
index 90239ed..d73687d 100644
--- a/Function/E2P/EEPROM.h
+++ b/Function/E2P/EEPROM.h
@@ -45,8 +45,8 @@
/***********************EEP ������Ϣ����*************************************/
-#define EEPROM_PHYS_SIZE (32*1024) //EEP��С
-#define EEPROM_ADDR_BYTES2 //С�ڴ�EEP���ݵ�ַΪ2�ֽ��趨��
+#define EEPROM_PHYS_SIZE (256*1024) //EEP��С
+//#define EEPROM_ADDR_BYTES2 //С�ڴ�EEP���ݵ�ַΪ2�ֽ��趨��
#define EEPROM_CFG_BLOCK_SIZE 4096 //EEP�Զ�����С
#define EEPROM_CFG_BLOCK_CNT (EEPROM_PHYS_SIZE/EEPROM_CFG_BLOCK_SIZE)//EEP�Զ��������
#define EEPROM_PAGE_SIZE 64 //EEPҳ��С
@@ -55,27 +55,45 @@
/***********************EEP �����������**************************************/
#define EEPROM_PWR_PORT GPIOC
-#define EEPROM_PWR_PIN GPIO_Pin_6
+#define EEPROM_PWR_PIN GPIO_Pin_11
#define EEPROM_CS1_PORT GPIOC
#define EEPROM_CS1_PIN GPIO_Pin_6
+
#define EEPROM_CS2_PORT GPIOC
#define EEPROM_CS2_PIN GPIO_Pin_14
+
+#define EEPROM_WP_PORT GPIOC
+#define EEPROM_WP_PIN GPIO_Pin_10
#define EEPROM_CS_1 0
#define EEPROM_CS_2 1
-#define E2P_PWR_ON GPIO_ResetBits(EEPROM_PWR_PORT,EEPROM_PWR_PIN) ///jlc ��Դ�Ƿ�ɿػ�û����
+#define E2P_PWR_ON GPIO_ResetBits(EEPROM_PWR_PORT,EEPROM_PWR_PIN) //���ߣ�����Ч
#define E2P_PWR_OFF GPIO_SetBits(EEPROM_PWR_PORT,EEPROM_PWR_PIN)
+#define EEPROM_CS_LOW GPIO_ResetBits(EEPROM_CS1_PORT,EEPROM_CS1_PIN)
+#define EEPROM_CS_HIGH GPIO_SetBits(EEPROM_CS1_PORT,EEPROM_CS1_PIN)
-#define EEPROM_CS_LOW do{GPIO_ResetBits(EEPROM_CS1_PORT,EEPROM_CS1_PIN);GPIO_SetBits(EEPROM_CS2_PORT,EEPROM_CS2_PIN);}while(0)
-#define EEPROM_CS_HIGH do{GPIO_SetBits(EEPROM_CS1_PORT,EEPROM_CS1_PIN);GPIO_SetBits(EEPROM_CS2_PORT,EEPROM_CS2_PIN);}while(0)
+#define EEPROM_CS_ENABLE do{EEPROM_CS_LOW;EEPROM_CS_2_HIGH;}while(0)
+#define EEPROM_CS_DISABLE do{EEPROM_CS_HIGH;EEPROM_CS_2_HIGH;}while(0)
-///ע�⣬ǧ��Ҫ���ж��ж�дEEPROM������ж�֮ǰ���ڲ���EEPROM�������ж��ж�дEEPROM������ܳ�����
-#define EEPROM_CS_2_LOW {GPIO_ResetBits(FRAM_CS2_GROUP,FRAM_CS2_NUM);GPIO_SetBits(FRAM_CS_GROUP,FRAM_CS_NUM);}//CS_2 = 0
-#define EEPROM_CS_2_HIGH GPIO_SetBits(FRAM_CS2_GROUP,FRAM_CS2_NUM) //CS_2 = 1
+
+#define EEPROM_CS_2_LOW GPIO_ResetBits(EEPROM_CS2_PORT,EEPROM_CS2_PIN)
+#define EEPROM_CS_2_HIGH GPIO_SetBits(EEPROM_CS2_PORT,EEPROM_CS2_PIN)
+
+#define EEPROM_CS_2_ENABLE do{EEPROM_CS_2_LOW;EEPROM_CS_HIGH;}while(0)
+#define EEPROM_CS_2_DISABLE do{EEPROM_CS_HIGH;EEPROM_CS_2_HIGH;}while(0)
+
+
+//����ʹ�ܣ�E2P����ǰ�����
+#define EEPROM_CTRL_ENABLE do{E2P_Ctrl_Gpio_Init();E2P_PWR_ON;EEPROM_CS_ENABLE;}while(0)
+#define EEPROM_CTRL_DISABLE do{E2P_Ctrl_Gpio_Init();}while(0)
+
+#define EEPROM_2_CTRL_ENABLE do{E2P_Ctrl_Gpio_Init();E2P_PWR_ON;EEPROM_CS_2_ENABLE;}while(0)
+#define EEPROM_2_CTRL_DISABLE do{E2P_Ctrl_Gpio_Init();}while(0)
+
#define FM_ReadWriteByte(dat) SpiWriteAndRead(dat)
#define EEPROM_ioconfig() SPI3_ioconfig()
@@ -106,7 +124,9 @@
//uint8_t EEPROM_MultipleRead_CS_2(uint8_t *data,u32 addr,u16 bytes);
-void EEPROM_CS_2_test(void);
+void EEPROM_test(void);
+
+void E2P_Ctrl_Gpio_Init(void);
#endif
--
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