From 72def895431ad7a08e635b11f3da738e2b2c4618 Mon Sep 17 00:00:00 2001
From: wujiazhi <1147861305@qq.com>
Date: Thu, 13 Jun 2024 11:31:04 +0800
Subject: [PATCH] add lower model test
---
Pre_Drivers/devicegpioinit.c | 40 ++++++++++++++++++++++++++--------------
1 files changed, 26 insertions(+), 14 deletions(-)
diff --git a/Pre_Drivers/devicegpioinit.c b/Pre_Drivers/devicegpioinit.c
index df1fc7e..e97255a 100644
--- a/Pre_Drivers/devicegpioinit.c
+++ b/Pre_Drivers/devicegpioinit.c
@@ -396,28 +396,40 @@
void GPIO_IPD_Init(void)
{
CMU_PERCLK_SetableEx(PADCLK, ENABLE);
- // RS485_GPIO_sleep_mode();
- // GPRS_RS232_GPIO_sleep_mode();
- // Upper_RS232_GPIO_sleep_mode();
- // AnalogIO(GPIOA, UTRXD_RE_EN_PIN_NUM);
- // AnalogIO(GPIOC, FRAM_CS1_NUM | FRAM_CS2_NUM | Fram_Flash_SPI_SCL_PIN_NUM | Fram_Flash_SPI_MISO_PIN_NUM | Fram_Flash_SPI_MOSI_PIN_NUM);
- // AnalogIO(GPIOD, LCD_SDA_PIN_NUM | LCD_SCL_PIN_NUM | LCD_RD_CLK_PIN_NUM | LCD_CS_PIN_NUM);
- // AnalogIO(GPIOE, RS485_SYNC_PIN_NUM);
-
/*GPIO���óɸ���̬*/
CloseIO(GPIOA, GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | ALARM_LINE_PIN_NUM);
- CloseIO(GPIOB, OUTPUT2_EN_PIN_NUM | OUTPUT1_EN_PIN_NUM | POWER_12V_EN_PIN_NUM | GPIO_Pin_13 | LOW_PWR_INT_PIN_NUM | UNDER_PWR_INT_PIN_NUM |
+ CloseIO(GPIOB, OUTPUT2_EN_PIN_NUM | OUTPUT1_EN_PIN_NUM | POWER_12V_EN_PIN_NUM | POWER_9V_EN_PIN_NUM| GPIO_Pin_13 | LOW_PWR_INT_PIN_NUM | UNDER_PWR_INT_PIN_NUM |
Motor_A_PIN_NUM | Motor_B_PIN_NUM);
CloseIO(GPIOC, FRAM_CS1_NUM | FRAM_CS2_NUM | LIMIT_TRIG_PIN_NUM);
- CloseIO(GPIOD, GPIO_Pin_8 | LCD_RD_CLK_PIN_NUM | LCD_RD_CLK_PIN_NUM | LCD_CS_PIN_NUM | LITH_BAT_LOW_PWR_PIN_NUM | UNCAP_INT_PIN_NUM);
- CloseIO(GPIOE, GPIO_Pin_5 | GPRS_PWR_EN_PIN_NUM | GPIO_Pin_9);
- CloseIO(GPIOF, GPIO_Pin_14 | GPIO_Pin_15 | GPIO_Pin_0 | ALKA_TEST_EN_PIN_NUM | LITH_TEST_EN_PIN_NUM);
- CloseIO(GPIOG, EX_PWR_EN_PIN_NUM | BORROW_PWR_EN_PIN_NUM);
+ CloseIO(GPIOD, GPIO_Pin_8 | LCD_RD_CLK_PIN_NUM | LCD_CS_PIN_NUM | LITH_BAT_LOW_PWR_PIN_NUM | UNCAP_INT_PIN_NUM);
+ CloseIO(GPIOE, GPIO_Pin_5 | GPIO_GPRS_POWER_PIN_NUM | GPIO_Pin_9 | GPRS_PWR_EN_PIN_NUM);
+ CloseIO(GPIOF, GPIO_Pin_14 | GPIO_Pin_15 | GPIO_Pin_0 | ALKA_TEST_EN_PIN_NUM | LITH_TEST_EN_PIN_NUM | GPIO_Pin_1 | GPIO_Pin_2 | HWID0_PIN_NUM);
+ CloseIO(GPIOG, EX_PWR_EN_PIN_NUM | BORROW_PWR_EN_PIN_NUM | GPIO_Pin_7);
CloseH_IO(GPIOH, LOWPLUSE_PIN_NUM | GPIO_Pin_0);
+
+ //����SWD swclk ��swlo ����Ϊ��������ʹ��
+ InputtIO(GPIOG, GPIO_Pin_8, IN_PULLUP);
+ InputtIO(GPIOG, GPIO_Pin_9, IN_PULLUP);
+
/*�رղ���Ҫ�ĵ�·*/
// ��ʱ��
- CMU_PERCLK_SetableEx(BSTIMCLK, DISABLE);
CMU_OPCCR2_BSTCKE_Setable(DISABLE);
// ADC
VRTC_ADCCR_CKE_Setable(DISABLE);
+ // UART
+ CMU_OPCCR1_UART1CKE_Setable(DISABLE);
+ CMU_PERCLK_SetableEx(UART1CLK, DISABLE);
+ CMU_PERCLK_SetableEx(UART5CLK, DISABLE);
+ // DMA
+ CMU_PERCLK_SetableEx(DMACLK, DISABLE);
+ //IIC
+ CMU_PERCLK_SetableEx(I2C0CLK, DISABLE);
+ CMU_OPCCR1_I2C0CKE_Setable(DISABLE);
+ //������ʱ��
+ CMU_PERCLK_SetableEx(BSTIMCLK, DISABLE);
+
+ CMU_PERCLK_SetableEx(PADCLK, DISABLE);
+ //adc buffer
+ COMP_ICR_BUFBYP_Setable(DISABLE);
+ COMP_ICR_BUF_OFF_Setable(ENABLE);
}
--
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