From 66ea95dcb8fd91d29465c2f11ced4dd6153a2504 Mon Sep 17 00:00:00 2001
From: jinlicong <493886250@qq.com>
Date: Wed, 22 May 2024 17:15:02 +0800
Subject: [PATCH] 继续完善远传
---
Function/OFF_CHIP_FLASH/off_chip_flash.h | 15 +++++++++------
1 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/Function/OFF_CHIP_FLASH/off_chip_flash.h b/Function/OFF_CHIP_FLASH/off_chip_flash.h
index 293bd55..e5a8c29 100644
--- a/Function/OFF_CHIP_FLASH/off_chip_flash.h
+++ b/Function/OFF_CHIP_FLASH/off_chip_flash.h
@@ -31,14 +31,17 @@
#define FLASH_CS_PORT EEPROM_CS2_PORT
#define FLASH_CS_PIN EEPROM_CS2_PIN
-//#define FLASH_CS_LOW GPIO_ResetBits(FLASH_CS_PORT,FLASH_CS_PIN)//CS = 0
-//#define FLASH_CS_HIGH GPIO_SetBits(FLASH_CS_PORT,FLASH_CS_PIN) //CS = 1
+#define FLASH_CS_LOW EEPROM_CS_2_LOW
+#define FLASH_CS_HIGH EEPROM_CS_2_HIGH
-//#define FLASH_CS_ENABLE do{FLASH_CS_LOW;EEPROM_CS_HIGH;}while(0)
-//#define FLASH_CS_DISABLE do{FLASH_CS_HIGH;EEPROM_CS_HIGH;}while(0)
+#define FLASH_CS_ENABLE EEPROM_CS_2_ENABLE
+#define FLASH_CS_DISABLE EEPROM_CS_2_DISABLE
-#define FLASH_CS_ENABLE do{GPIO_ResetBits(FLASH_CS_PORT,FLASH_CS_PIN);GPIO_SetBits(EEPROM_CS1_PORT,EEPROM_CS1_PIN);}while(0)
-#define FLASH_CS_DISABLE do{GPIO_SetBits(FLASH_CS_PORT,FLASH_CS_PIN);GPIO_SetBits(EEPROM_CS1_PORT,EEPROM_CS1_PIN);}while(0)
+
+//����ʹ��,flash����ǰ�����
+#define OUT_FLASH_CTRL_ENABLE EEPROM_2_CTRL_ENABLE
+#define OUT_FLASH_CTRL_DISABLE EEPROM_2_CTRL_DISABLE
+
#define FLASH_ReadWriteByte(dat) SpiWriteAndRead(dat)
//#define FLASH_ioconfig() SPI2_ioconfig()
--
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