From 65062d0d5b21f838aa0043a15ce54cfab8d72c43 Mon Sep 17 00:00:00 2001
From: wujiazhi <1147861305@qq.com>
Date: Tue, 11 Jun 2024 14:23:53 +0800
Subject: [PATCH] 1.Fixed communication failure between MCU and wireless module 2.Fix the wrong judgment of alkaline lithium power
---
Soft/low_pwr_test.c | 260 ++++++++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 260 insertions(+), 0 deletions(-)
diff --git a/Soft/low_pwr_test.c b/Soft/low_pwr_test.c
new file mode 100644
index 0000000..fa44999
--- /dev/null
+++ b/Soft/low_pwr_test.c
@@ -0,0 +1,260 @@
+#include "low_pwr_test.h"
+#include "adc.h"
+#include "lcd.h"
+#include "gpio.h"
+#include "i2c.h"
+#include "gprs.h"
+#include "valve_control.h"
+#include "power_manage.h"
+#include "e2p.h"
+#include "uart.h"
+#include "spi.h"
+#include "tim.h"
+#include "master_slave_inter.h"
+
+/*********************��̬����Ŀ��Ϊ100uA����**************************************/
+
+
+void Key_Awaken_Init(void)
+{
+ KEY_IO_Init();
+}
+void Pulse_Awaken_Init(void)
+{
+ Pulse_IO_Init();
+ PULSE_OUT_OFF;
+}
+
+void Valve_Awaken_Init(void)
+{
+ Valve_IO_Init();
+}
+void Lcd_Awaken_Init(void)
+{
+ Lcd_IO_Init();
+}
+void I2c0_GPIO_Clk_Init(void)
+{
+ CMU_PERCLK_SetableEx(I2C0CLK, ENABLE);
+ CMU_OPCCR1_I2C0CKE_Setable(ENABLE);
+}
+
+void Main2Slave_GPIO_Usart3_Clk_Init(void)
+{
+ CMU_PERCLK_SetableEx(PADCLK, ENABLE); //PADʱ�ӣ�GPIO��ʹ�ܺ���
+ CMU_PERCLK_SetableEx(UART3CLK,ENABLE);
+ CMU_PERCLK_SetableEx(DMACLK, ENABLE);
+ AltFunIO(MAIN_TX_PORT, MAIN_TX_PIN, ALTFUN_NORMAL);
+ AltFunIO(MAIN_RX_PORT, MAIN_RX_PIN, ALTFUN_NORMAL);
+ OutputIO(MAIN_TO_SLAVE_PORT,MAIN_TO_SLAVE_PIN,OUT_PUSHPULL);
+ OutputIO(SYNC_PORT,SYNC_PIN,OUT_PUSHPULL);
+}
+void InfraRed_Uart0_Clk_Init(void)
+{
+ CMU_OPCCR1_UART0CKE_Setable(ENABLE);
+ CMU_PERCLK_SetableEx(UART0CLK,ENABLE);
+ CMU_PERCLK_SetableEx(DMACLK, ENABLE);
+ CMU_PERCLK_SetableEx(PADCLK, ENABLE); //PADʱ�ӣ�GPIO��ʹ�ܺ���
+ AltFunIO(IR_RX_PORT, IR_RX_PIN, ALTFUN_NORMAL); //PF3 UART0 RX
+ AltFunIO(IR_TX_PORT, IR_TX_PIN, ALTFUN_NORMAL); //PF4 UART0 TX
+}
+void Gprs_GPIO_Uart5_Clk_Init(void)
+{
+ CMU_PERCLK_SetableEx(UART5CLK,ENABLE);
+ CMU_PERCLK_SetableEx(DMACLK, ENABLE);
+ AltFunIO(GPRS_TX_PORT, GPRS_TX_PIN, ALTFUN_NORMAL);
+ AltFunIO(GPRS_RX_PORT, GPRS_RX_PIN, ALTFUN_NORMAL);
+ Gprs_IO_Init();
+}
+void E2p_GPIO_Clk_Init(void)
+{
+ E2p_IO_Init();
+ CMU_PERCLK_SetableEx(SPI0CLK,ENABLE);
+ AltFunIO(SPI0_PORT, SPI0_SCK_PIN, ALTFUN_NORMAL); // SCK
+ AltFunIO(SPI0_PORT, SPI0_MISO_PIN, ALTFUN_NORMAL); // MISO
+ AltFunIO(SPI0_PORT, SPI0_MOSI_PIN, ALTFUN_NORMAL); // MOSI
+}
+void Lith_Battery_GPIO_Clk_Init(void)
+{
+ CMU_PERCLK_SetableEx(PADCLK, ENABLE); //PADʱ�ӣ�GPIO��ʹ�ܺ���
+ AnalogIO(LIT_ADC_PORT,LIT_ADC_PIN);//ADC_IN4
+ OutputIO(LITHIUM_DETECTION_PORT,LITHIUM_DETECTION_PIN,OUT_PUSHPULL);
+// AnalogIO(LIT_PWR_UNDER_PORT,LIT_PWR_UNDER_PIN);//ADC_5
+
+}
+void Alka_Battery_GPIO_Clk_Init(void)
+{
+ CMU_PERCLK_SetableEx(PADCLK, ENABLE); //PADʱ�ӣ�GPIO��ʹ�ܺ���
+ AnalogIO(ALK_ADC_PORT,ALK_ADC_PIN);//ADC_IN8
+// OutputIO(ALKALI_DETECTION_PORT,ALKALI_DETECTION_PIN,OUT_PUSHPULL);
+}
+
+void CalMode_BasicTimer_Clk_Init(void)
+{
+ CMU_PERCLK_SetableEx(BT1CLK, ENABLE);
+}
+void ErrorShow_TxtendTimer_Clk_Init(void)
+{
+ CMU_PERCLK_SetableEx(ET1CLK, ENABLE);
+}
+void ValveCtl_BsTimer_Clk_Init(void)
+{
+ CMU_PERCLK_SetableEx(BSTIMCLK, ENABLE);
+ CMU_OPCCR2_BSTCKE_Setable(ENABLE);
+}
+void Botton_LPTimer_Clk_Init(void)
+{
+ CMU_PERCLK_SetableEx(LPTCLK, ENABLE);
+ CMU_OPCCR2_LPTCKE_Setable(ENABLE);
+}
+
+
+
+/*
+��������Ϊ����̬
+*/
+void MX_GPIO_CLK_DeInit(void)
+{
+ /*������һЩOUTPUT_PP��INPUT�ͷ����踴�÷��ⲿ�жϵ�����*/
+ CloseIO(GPIOG,GPIO_Pin_8 | GPIO_Pin_9 | PULSE_OUT_PIN | GPIO_Pin_2 | GPIO_Pin_3);
+ CloseIO(GPIOF,LIT_PWR_UNDER_PIN | SPI0_MOSI_PIN | SPI0_MISO_PIN | SPI0_SCK_PIN | E2P_PWR_PIN | IR_RX_PIN | IR_TX_PIN);
+ CloseIO(GPIOE,E2P_CS1_PIN | E2P_CS2_PIN | VALVE_CMD_A_PIN | VALVE_CMD_B_PIN | VALVE_CMD_C_PIN);
+ CloseIO(GPIOD,LIT_ADC_PIN | LITHIUM_DETECTION_PIN | KEYB_S2_PIN);
+ CloseIO(GPIOC,MAIN_TO_SLAVE_PIN | SLAVE_TO_MAIN_PIN | SYNC_PIN | MAIN_TX_PIN | MAIN_RX_PIN);
+// CloseIO(GPIOB,ALK_ADC_PIN | ALKALI_DETECTION_PIN | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11);
+ CloseIO(GPIOA,KEYC_S3_PIN | VALVE_FORCED_OPEN_PIN | GPRS_RE_PIN | GPRS_SWITCH_PIN | GPRS_PWR_PIN | GPRS_TX_PIN | GPRS_RX_PIN);
+
+ /************************������һЩϵͳ���踴�ò���(����ʱ��)******************************/
+ /************************������ʱ�Ӳ��֣���������ʱ�Ĺ��ģ�************************/
+// // UART0(Infrared)
+#ifdef RS232_PRINTF
+#else
+ CMU_OPCCR1_UART0CKE_Setable(DISABLE);
+ CMU_PERCLK_SetableEx(UART0CLK,DISABLE);
+#endif
+ // UART3(MAIN_TO_SLAVE)
+ CMU_PERCLK_SetableEx(UART3CLK,DISABLE);
+ // UART5(Gprs)
+ CMU_PERCLK_SetableEx(UART5CLK,DISABLE);
+ // DMA
+ CMU_PERCLK_SetableEx(DMACLK, DISABLE);
+ // SPI0(E2P)
+ CMU_PERCLK_SetableEx(SPI0CLK,DISABLE);
+ // I2C0(LCD)
+ CMU_PERCLK_SetableEx(I2C0CLK, DISABLE);
+ CMU_OPCCR1_I2C0CKE_Setable(DISABLE);
+ // ADC
+ VRTC_ADCCR_CKE_Setable(DISABLE);
+ // BasicTimer(���ڼ춨ģʽ�µ����ڽ���)���ϵ����ڵ�ؼ�⣩
+ CMU_PERCLK_SetableEx(BT1CLK, DISABLE);
+ CMU_PERCLK_SetableEx(BT2CLK, DISABLE);
+ // TxtendTimer(���ڰ�������ij����ʧ�ܵij�����ʾʱ�䣬�磺�л�ģʽ��Զ���ϱ���)
+ CMU_PERCLK_SetableEx(ET1CLK, DISABLE);
+ // BsTimer(���ڿ�/�ط�ʱ��)
+ CMU_PERCLK_SetableEx(BSTIMCLK, DISABLE);
+ CMU_OPCCR2_BSTCKE_Setable(DISABLE);
+ // LowPowerTimer(���ڰ�����ܵ�����ɨ��)
+ CMU_PERCLK_SetableEx(LPTCLK, DISABLE);
+ CMU_OPCCR2_LPTCKE_Setable(DISABLE);
+}
+
+void DeepSleepMode(void)
+{
+#ifdef STOP_MODE
+ MX_GPIO_CLK_DeInit();
+
+ LPTIM_CR_EN_Setable(DISABLE);
+
+ PMU_SleepCfg_InitTypeDef SleepCfg_InitStruct;
+ CDIF_CR_INTF_EN_Setable(ENABLE);
+ /*�µ縴λ����*/
+ //pdr��bor�����µ縴λ����Ҫ��һ��
+ //����Դ��ѹ�����µ縴λʱ��оƬ�ᱻ��λס
+ //pdr��ѹ��λ�����ǹ��ļ���(����������
+ //bor��ѹ��λȷ������Ҫ����2uA����
+ RMU_PDRCR_PDREN_Setable(ENABLE); //��PDR
+ RMU_PDRCR_PDRCFG_Set(RMU_PDRCR_PDRCFG_1P5V);//pdr��ѹ������1.4V
+ RMU_BORCR_OFF_BOR_Setable(ENABLE); //�ر�BOR
+ VRTC_RCMFCR_EN_Setable(DISABLE);//RCMF�ر�
+ //VRTC_RCLPCR_RCLP_OFF_Setable(ENABLE);//RCLP�ر�
+
+ CDIF_CR_INTF_EN_Setable(DISABLE);
+
+ SleepCfg_InitStruct.PMOD = PMU_CR_PMOD_SLEEP; //����ģʽ����
+ SleepCfg_InitStruct.SLPDP = PMU_CR_SLPDP_DEEPSLEEP; //deepsleep
+ SleepCfg_InitStruct.CVS = DISABLE; //�ں˵�ѹ���Ϳ���
+ SleepCfg_InitStruct.SCR = 0; //M0ϵͳ���ƼĴ�����һ������Ϊ0����
+ SleepCfg_InitStruct.TIA = PMU_WKTR_T1A_8US;//�ɱ�̶�����ӳ�8us
+
+ PMU_SleepCfg_Init(&SleepCfg_InitStruct);//��������
+
+ IWDT_Clr();
+ IWDT_Init();
+ __WFI();//��������
+ IWDT_Clr();
+ RMU_BORCR_OFF_BOR_Setable(DISABLE); //�ر�BOR
+#endif
+}
+
+/*Զ��/���ػ���������ʱ��������Ӧ����*/
+uint8_t LargeCurrent_LimitingProcess(void)
+{
+ uint8_t restult = 0;
+ // GPRS����/����ʱ
+ if ((gprs_soft_para_g.gprs_state == GPRS_IDLE) || (gprs_soft_para_g.gprs_state == GPRS_RESTART))
+ restult |= 1;
+ // �����ڿ�/��ʱ
+ if((__SYS_STATUS_BYTES_GET(valve_state) != VALVE_CLOSING) && (__SYS_STATUS_BYTES_GET(valve_state) != VALVE_OPENING))
+ restult |= 2;
+ return restult;
+}
+
+
+/*
+����1�����ֲ�˵��������ϵͳʱ��,���ڽ��;�̬���ġ�������02_127��
+
+�𣺲��Եã�ϵͳʱ����36Mhz->12Mhz�����ڽ��;�̬������Ч����̬���δ�⡣
+*/
+/*
+����2����ֹ���й��ܣ�ֻ����STOPģʽ1���鿴��̬���ġ�������02_127��
+
+�𣺲��Եã���ֹ���й��ܣ�ֻ����STOPģʽ�����IJ���������500uA����������
+������״̬�йء�
+*/
+/*
+����3�����ֲ�˵�����ڽ���STOPģʽ3ǰ����ADC���鿴��̬���ġ�������02_127��
+
+���ޱ仯�������˵����ǰADC������δʹ�ã�������ADCʹ�ú��ٲ��ԡ�
+*/
+/*
+����4���ڽ���STOPģʽ3ǰ�رղ���Ҫ������ʱ�ӣ��鿴��̬���ġ�������02_127��
+
+���ޱ仯��
+*/
+/*
+����5���ڽ���STOPģʽ3ǰ������������Ϊģ�����룬�鿴��̬���ġ�������02_127��
+
+�𣺵���ԼΪ130uA������Ļ�Զ������������Բ�����KEY3��PC1��Ϊģ�����뼴��Ϩ����Ļ��
+*/
+/*
+����6���ڽ���STOPģʽ3ǰ��������Ϊģ������+�رղ���Ҫ������ʱ�ӣ��鿴��̬���ġ�������02_127��
+
+����ȫ������Ϊģ�������ٹر�ʱ�ӣ������ޱ仯��
+ �ȹر�ʱ��������ģ�����룬���ܽ������ߣ��������ӡ�
+*/
+/*
+˵��1���ֲ�˵��������״̬�µĹ��Ŀɹر�����ʹ�õ�����ʱ�ӣ�ֱ�ӵ���DeInit��������Init��
+���蹦��ʧЧ��ֱ�ӵ���CLK_DISABLE�����й��Ľ��͡�������02_132��
+*/
+/*
+˵��2���ȵ���DeInit�ر�����ʱ��+�ı�����״̬����̬�����ޱ仯��������02_132��
+*/
+/*
+˵��3��KEY1_S2_Pin������B������������Ϊģ�����룬��Ȼ����ʱ�����һ��B���ص�����
+*/
+
+
+
+
+
+
--
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