From 08b3909c40a192778719c6262bbee4745682948d Mon Sep 17 00:00:00 2001 From: jinlicong <493886250@qq.com> Date: Fri, 31 May 2024 19:15:47 +0800 Subject: [PATCH] 测试和修改了一些功能bug --- HARDWARE/UART/uart.h | 26 +++++++++++++------------- 1 files changed, 13 insertions(+), 13 deletions(-) diff --git a/HARDWARE/UART/uart.h b/HARDWARE/UART/uart.h index 18e965e..40f069c 100644 --- a/HARDWARE/UART/uart.h +++ b/HARDWARE/UART/uart.h @@ -8,9 +8,9 @@ // ��λ���汻�ɼ����ɼ����� #define UP_COMM_TX_PORT GPIOA -#define UP_COMM_TX_PIN GPIO_Pin_8 +#define UP_COMM_TX_PIN GPIO_Pin_9 #define UP_COMM_RX_PORT GPIOA -#define UP_COMM_RX_PIN GPIO_Pin_9 +#define UP_COMM_RX_PIN GPIO_Pin_8 #define UP_COMM_RE_PORT GPIOA #define UP_COMM_RE_PIN GPIO_Pin_10 @@ -25,9 +25,9 @@ //RS485��ȡ������ #define RS485_READ_DATA_TX_PORT GPIOB -#define RS485_READ_DATA_TX_PIN GPIO_Pin_0 +#define RS485_READ_DATA_TX_PIN GPIO_Pin_1 #define RS485_READ_DATA_RX_PORT GPIOB -#define RS485_READ_DATA_RX_PIN GPIO_Pin_1 +#define RS485_READ_DATA_RX_PIN GPIO_Pin_0 #define RS485_READ_DATA_UARTX UART1 #define RS485_READ_DATA_UARTX_IRQn UART1_IRQn @@ -36,16 +36,16 @@ #define RS485_READ_DATA_DMA_CHX DMA_CH3 // Զ��TX UART5 -#define WRC_TX_PORT GPIOA -#define WRC_TX_PIN GPIO_Pin_8 -#define WRC_RX_PORT GPIOA -#define WRC_RX_PIN GPIO_Pin_9 +#define WRC_TX_PORT GPIOE +#define WRC_TX_PIN GPIO_Pin_4 +#define WRC_RX_PORT GPIOE +#define WRC_RX_PIN GPIO_Pin_3 -#define WRC_UARTX UART2 -#define WRC_UARTX_IRQn UART2_IRQn +#define WRC_UARTX UART1 +#define WRC_UARTX_IRQn UART1_IRQn #define WRC_RECV_BUFF_LEN_MAX 1024 -#define WRC_DMA_CHX DMA_CH0 +#define WRC_DMA_CHX DMA_CH3 #pragma pack(1) @@ -67,8 +67,8 @@ void up_comm_RX_DMA_CH2_reload(void); void WRC_uart_Init(uint32_t BaudRate,UART_ParityBitTypeDef ParityBit,UART_StopBitTypeDef StopBit); -void WRC_RX_DMA_CH0_Init(void); -void WRC_RX_DMA_CH0_reload(void); +void WRC_RX_DMA_CH3_Init(void); +void WRC_RX_DMA_CH3_reload(void); void UARTx_SendData_Normal(UART_Type* UARTx,uint8_t * pSendData,uint16_t send_len); -- Gitblit v1.9.3