| | |
| | | #include "eeprom.h" |
| | | #include "spi.h" |
| | | #include "delay.h" |
| | | //#include "devicegpioinit.h" |
| | | #include "gpio.h" |
| | | |
| | | volatile uint8_t Fram_cs_flag = 0; //´æ´¢Æ¬Ñ¡±êÖ¾£¬ÒÔºóÔö¼ÓһƬ´æ´¢Ð¾Æ¬£¬ÓÃÓÚÑ¡Ôñ²Ù×÷ÄÇÒ»¿é´æ´¢£¬·Ç1ΪµÚ1¿é£¬1ΪµÚ2¿éÐÂÔöµÄ¡£ |
| | | |
| | |
| | | //static u16 WR_times_suc=0; |
| | | |
| | | |
| | | //eeprom ¶ÁÊÇ1¸ö×Ö½Ú50us¡£ |
| | | void E2P_Ctrl_Gpio_Init(void) |
| | | { |
| | | CMU_PERCLK_SetableEx(PADCLK, ENABLE); //PADʱÖÓ£¨GPIO£©Ê¹Äܺ¯Êý |
| | | OutputIO(EEPROM_PWR_PORT,EEPROM_PWR_PIN,OUT_PUSHPULL); |
| | | OutputIO(EEPROM_CS1_PORT,EEPROM_CS1_PIN,OUT_PUSHPULL); |
| | | OutputIO(EEPROM_CS2_PORT,EEPROM_CS2_PIN,OUT_PUSHPULL); |
| | | CloseIO(EEPROM_WP_PORT,EEPROM_WP_PIN); |
| | | E2P_PWR_OFF; |
| | | EEPROM_CS_LOW; |
| | | EEPROM_CS_2_LOW; |
| | | } |
| | | |
| | | |
| | | |
| | | |
| | | typedef union |
| | | { |
| | |
| | | // laddr = (addr16 & 0xff); //low 8 bit address |
| | | |
| | | // delay_us(10); |
| | | EEPROM_CS_LOW; |
| | | EEPROM_CS_ENABLE; |
| | | FM_ReadWriteByte(FM_WREN); |
| | | EEPROM_CS_HIGH; |
| | | EEPROM_CS_DISABLE; |
| | | |
| | | // delay_us(10); |
| | | |
| | | EEPROM_CS_LOW; |
| | | EEPROM_CS_ENABLE; |
| | | FM_ReadWriteByte(FM_WRITE); |
| | | #ifndef EEPROM_ADDR_BYTES2 |
| | | FM_ReadWriteByte((uint8_t)((addr_fit)>>16)); |
| | | #endif |
| | | FM_ReadWriteByte((uint8_t)((addr_fit)>>8)); |
| | | FM_ReadWriteByte((uint8_t)((addr_fit))); |
| | | FM_ReadWriteByte(data); |
| | | EEPROM_CS_HIGH; |
| | | EEPROM_CS_DISABLE; |
| | | |
| | | |
| | | |
| | |
| | | // haddr = (addr16 >> 8) & 0x7f;//high 7 bit address |
| | | // laddr = (addr16 & 0xff); //low 8 bit address |
| | | |
| | | EEPROM_CS_LOW; |
| | | EEPROM_CS_ENABLE; |
| | | FM_ReadWriteByte(FM_READ); |
| | | #ifndef EEPROM_ADDR_BYTES2 |
| | | FM_ReadWriteByte((uint8_t)(addr_fit>>16)); |
| | | #endif |
| | | FM_ReadWriteByte((uint8_t)(addr_fit>>8)); |
| | | FM_ReadWriteByte((uint8_t)(addr_fit)); |
| | | data = FM_ReadWriteByte(0xff);//data = FM_ReadWriteByte(0xff); |
| | | EEPROM_CS_HIGH; |
| | | EEPROM_CS_DISABLE; |
| | | |
| | | return data; |
| | | } |
| | |
| | | void EEPROM_stat_write(uint8 stat) |
| | | { |
| | | // delay_us(10); |
| | | EEPROM_CS_LOW; |
| | | EEPROM_CS_ENABLE; |
| | | FM_ReadWriteByte(FM_WREN); |
| | | EEPROM_CS_HIGH; |
| | | EEPROM_CS_DISABLE; |
| | | |
| | | // delay_us(10); |
| | | |
| | | EEPROM_CS_LOW; |
| | | EEPROM_CS_ENABLE; |
| | | FM_ReadWriteByte(FM_WRSR); |
| | | FM_ReadWriteByte(stat); |
| | | EEPROM_CS_HIGH; |
| | | EEPROM_CS_DISABLE; |
| | | |
| | | } |
| | | |
| | |
| | | uint8 stat; |
| | | |
| | | delay_us(10); |
| | | EEPROM_CS_LOW; |
| | | EEPROM_CS_ENABLE; |
| | | FM_ReadWriteByte(FM_RDSR); |
| | | stat = FM_ReadWriteByte(0xff); |
| | | EEPROM_CS_HIGH; |
| | | EEPROM_CS_DISABLE; |
| | | |
| | | return stat; |
| | | } |
| | |
| | | void EEPROM_sleep(void) |
| | | { |
| | | delay_us(10); |
| | | EEPROM_CS_LOW; |
| | | EEPROM_CS_ENABLE; |
| | | FM_ReadWriteByte(FM_SLEEP); |
| | | EEPROM_CS_HIGH; |
| | | EEPROM_CS_DISABLE; |
| | | } |
| | | |
| | | |
| | |
| | | uint8 i; |
| | | |
| | | delay_us(10); |
| | | EEPROM_CS_LOW; |
| | | EEPROM_CS_ENABLE; |
| | | FM_ReadWriteByte(FM_RDID); |
| | | for(i = 0;i < 9;i ++) |
| | | { |
| | | dst[i] = FM_ReadWriteByte(0xff); |
| | | } |
| | | EEPROM_CS_HIGH; |
| | | EEPROM_CS_DISABLE; |
| | | } |
| | | |
| | | |
| | |
| | | *****************************************/ |
| | | u32 EEPROM_data_read_uint32(uint32 addr16) |
| | | { |
| | | |
| | | |
| | | u32_un t; |
| | | t.data[0] = EEPROM_data_read(addr16); |
| | | t.data[1] = EEPROM_data_read(addr16+1); |
| | |
| | | { |
| | | |
| | | |
| | | EEPROM_CS_LOW; |
| | | EEPROM_CS_ENABLE; |
| | | FM_ReadWriteByte(FM_WREN); |
| | | EEPROM_CS_HIGH; |
| | | EEPROM_CS_DISABLE; |
| | | |
| | | EEPROM_CS_LOW; |
| | | EEPROM_CS_ENABLE; |
| | | FM_ReadWriteByte(FM_WRITE); |
| | | #ifndef EEPROM_ADDR_BYTES2 |
| | | FM_ReadWriteByte((uint8_t)((addr_temp)>>16)); |
| | | #endif |
| | | FM_ReadWriteByte((uint8_t)((addr_temp)>>8)); |
| | | FM_ReadWriteByte((uint8_t)(addr_temp)); |
| | | for(i = 0;i < bytewrite;i ++) |
| | | FM_ReadWriteByte(*ptr_data ++); |
| | | EEPROM_CS_HIGH; |
| | | EEPROM_CS_DISABLE; |
| | | |
| | | |
| | | |
| | |
| | | { |
| | | u16 index; |
| | | |
| | | EEPROM_CS_LOW; |
| | | EEPROM_CS_ENABLE; |
| | | FM_ReadWriteByte(FM_READ); |
| | | #ifndef EEPROM_ADDR_BYTES2 |
| | | FM_ReadWriteByte((uint8_t)(addr>>16)); |
| | | #endif |
| | | FM_ReadWriteByte((uint8_t)(addr>>8)); |
| | | FM_ReadWriteByte((uint8_t)(addr)); |
| | | for(index = 0;index < bytes;index ++) |
| | | data[index] = FM_ReadWriteByte(0xff); |
| | | EEPROM_CS_HIGH; |
| | | EEPROM_CS_DISABLE; |
| | | EEPROM_Wait_Busy(); |
| | | |
| | | } |
| | |
| | | |
| | | |
| | | |
| | | void EEPROM_CS_2_test(void) |
| | | void EEPROM_test(void) |
| | | { |
| | | uint8_t u8_temp; |
| | | uint8_t u8_temp_s[256]; |
| | | uint8_t u8_temp_s2[256]; |
| | | static uint16_t WR_times = 0; |
| | | static uint16_t WR_times_suc = 0; |
| | | |
| | | u16 count_i = 0; |
| | | |
| | | E2P_Ctrl_Gpio_Init(); |
| | | SPI3_Init(); |
| | | EEPROM_CTRL_ENABLE; |
| | | |
| | | EEPROM_MultipleRead(u8_temp_s2,1000,1); //?²âÊÔ·¢ÏÖµÚÒ»´Î²Ù×÷ÎÞЧ£¬ÐèÒªÏȲÙ×÷Ò»´Î£¬ºóÐø²Ù×÷¶¼ÊÇÕý³£µÄ¡£ |
| | | |
| | | for(count_i=0;count_i<256;count_i++) |
| | | { |
| | | u8_temp_s[count_i] = count_i; |
| | | u8_temp_s2[count_i] = 0; |
| | | } |
| | | EEPROM_CTRL_DISABLE; |
| | | |
| | | delay_ms(10); |
| | | |
| | | |
| | | EEPROM_CTRL_ENABLE; |
| | | |
| | | EEPROM_MultipleWrite(u8_temp_s,0,256); |
| | | delay_ms(1); |
| | | EEPROM_MultipleRead(u8_temp_s2,0,256); |
| | | |
| | | |
| | | EEPROM_CTRL_DISABLE; |
| | | |
| | | |
| | | E2P_Ctrl_Gpio_Init(); |
| | | SPI3_Init(); |
| | | |
| | | for(count_i=0;count_i<256;count_i++) |
| | | { |
| | | u8_temp_s[count_i] = 255-count_i; |
| | | u8_temp_s2[count_i] = 0; |
| | | } |
| | | |
| | | |
| | | EEPROM_CTRL_ENABLE; |
| | | |
| | | EEPROM_MultipleWrite(u8_temp_s,0,256); |
| | | delay_ms(1); |
| | | EEPROM_MultipleRead(u8_temp_s2,0,256); |
| | | |
| | | EEPROM_CTRL_DISABLE; |
| | | |
| | | |
| | | |
| | | |
| | | E2P_Ctrl_Gpio_Init(); |
| | | SPI3_Init(); |
| | | |
| | | for(count_i=0;count_i<256;count_i++) |
| | | { |
| | | u8_temp_s[count_i] = 8; |
| | | u8_temp_s2[count_i] = 0; |
| | | } |
| | | |
| | | |
| | | EEPROM_CTRL_ENABLE; |
| | | |
| | | EEPROM_MultipleWrite(u8_temp_s,0,256); |
| | | delay_ms(1); |
| | | EEPROM_MultipleRead(u8_temp_s2,0,256); |
| | | |
| | | EEPROM_CTRL_DISABLE; |
| | | |
| | | // while(WR_times <1024) |
| | | // { |
| | |
| | | // |
| | | // } |
| | | |
| | | // EEPROM_MultipleRead_CS_2(u8_temp_s2,(1000 * 256+9),256); |
| | | |
| | | |
| | | |
| | | |