| | |
| | | #include "uart.h" |
| | | #include "gpio.h" |
| | | #include "usmart.h" |
| | | #include "gprs.h" |
| | | #include "master_slave_inter.h" |
| | | #include "project_test.h" |
| | | unsigned char UART1_temp[UART0_RECV_BUFF_LEN_MAX] = {0}; // USART1½ÓÊÕÊý¾Ý»º´æ |
| | | uint8_t USART1_RX_BUF[UART0_RECV_BUFF_LEN_MAX] = {0}; |
| | | u16 USART_RX_STA = 0; // ½ÓÊÕ״̬±ê¼Ç |
| | | void Usmart_RecvDataProcess(UC_RECV_PARA_T *usmart_recv_para_p) |
| | | { |
| | | // USMARTͨѶ |
| | | if (usmart_recv_para_p->uc_recv_flag) |
| | | { |
| | | usmart_recv_para_p->uc_recv_flag = RESET; |
| | | // ×îºóÁ½¸öÊý¾ÝҪΪ»Ø³µºÍ»»ÐÐ |
| | | if (usmart_recv_para_p->uc_recv_buf_union.uc_recv_buf[usmart_recv_para_p->uc_recv_length - 1] == 0x0A && |
| | | usmart_recv_para_p->uc_recv_buf_union.uc_recv_buf[usmart_recv_para_p->uc_recv_length - 2] == 0x0D) |
| | | { |
| | | USART_RX_STA = 0xC000 | (usmart_recv_para_p->uc_recv_length - 2); |
| | | memcpy(USART1_RX_BUF, usmart_recv_para_p->uc_recv_buf_union.uc_recv_buf, usmart_recv_para_p->uc_recv_length); |
| | | usmart_dev.scan(); // Ö´ÐÐusmartɨÃè |
| | | memset(usmart_recv_para_p->uc_recv_buf_union.uc_recv_buf, 0, sizeof(usmart_recv_para_p->uc_recv_buf_union.uc_recv_buf)); |
| | | } |
| | | else |
| | | { |
| | | usmart_recv_para_p->uc_recv_flag = SET; |
| | | USART_RX_STA = 0; |
| | | } |
| | | } |
| | | } |
| | | |
| | | |
| | | |
| | | uint8_t RS485_read_data_recv_buff[RS485_READ_DATA_RECV_BUFF_LEN_MAX] = {0}; |
| | | uint8_t up_comm_recv_buff[UP_COMM_RECV_BUFF_LEN_MAX] = {0}; |
| | | uint8_t WRC_recv_buff[WRC_RECV_BUFF_LEN_MAX] = {0}; |
| | | |
| | | UART_CTRL_PARA_T uart_ctrl_para_g = { |
| | | .WRC_rxto_flag = RESET, |
| | | .RS485_rxto_flag = RESET, |
| | | .UP_COMM_rxto_flag = RESET, |
| | | }; |
| | | |
| | | u16 USART_RX_STA = 0; //½ÓÊÕ״̬±ê¼Ç |
| | | //void Usmart_RecvDataProcess(UC_RECV_PARA_T *usmart_recv_para_p) |
| | | ////ÖØÐ´Õâ¸öº¯Êý,ÖØ¶¨Ïòprintfº¯Êýµ½´®¿Ú£¬Òâ˼¾ÍÊÇ˵printfÖ±½ÓÊä³öµ½´®¿Ú£¬ÆäĬÈÏÊä³öµ½¿ØÖÆÌ¨µÄ |
| | | ///*fputc*/ |
| | | // int fputc(int c, FILE *f) |
| | | //{ |
| | | // // USMARTͨѶ |
| | | // if (usmart_recv_para_p->uc_recv_flag) |
| | | // { |
| | | // usmart_recv_para_p->uc_recv_flag = RESET; |
| | | // //×îºóÁ½¸öÊý¾ÝҪΪ»Ø³µºÍ»»ÐÐ |
| | | // if (usmart_recv_para_p->uc_recv_buf_union.uc_recv_buf[usmart_recv_para_p->uc_recv_length - 1] == 0x0A && |
| | | // usmart_recv_para_p->uc_recv_buf_union.uc_recv_buf[usmart_recv_para_p->uc_recv_length - 2] == 0x0D) |
| | | // { |
| | | // USART_RX_STA = 0xC000 | (usmart_recv_para_p->uc_recv_length - 2); |
| | | // memcpy(USART1_RX_BUF, usmart_recv_para_p->uc_recv_buf_union.uc_recv_buf, usmart_recv_para_p->uc_recv_length); |
| | | // usmart_dev.scan(); //Ö´ÐÐusmartɨÃè |
| | | // memset(usmart_recv_para_p->uc_recv_buf_union.uc_recv_buf, 0, sizeof(usmart_recv_para_p->uc_recv_buf_union.uc_recv_buf)); |
| | | // } |
| | | // else |
| | | // { |
| | | // usmart_recv_para_p->uc_recv_flag = SET; |
| | | // USART_RX_STA = 0; |
| | | // } |
| | | // } |
| | | //} |
| | | |
| | | //ÖØÐ´Õâ¸öº¯Êý,ÖØ¶¨Ïòprintfº¯Êýµ½´®¿Ú£¬Òâ˼¾ÍÊÇ˵printfÖ±½ÓÊä³öµ½´®¿Ú£¬ÆäĬÈÏÊä³öµ½¿ØÖÆÌ¨µÄ |
| | | /*fputc*/ |
| | | //int fputc(int c, FILE *f) |
| | | //{ |
| | | // uint8_t ch; |
| | | // ch = c; |
| | | // uint8_t ch; |
| | | // ch = c; |
| | | // UARTx_TXBUF_Write(UART0,ch);//·¢ËÍ´®¿Ú |
| | | // while(RESET == UARTx_ISR_TXSE_Chk(UART0)) |
| | | // ; //µÈ´ý·¢ËÍÍê³É |
| | | // return ch; |
| | | //} |
| | | // return ch; |
| | | // } |
| | | |
| | | //ÖØ¶¨Ïòscanfº¯Êýµ½´®¿Ú Òâ˼¾ÍÊÇ˵½ÓÊÜ´®¿Ú·¢¹ýÀ´µÄÊý¾Ý£¬ÆäĬÈÏÊǽÓÊÜ¿ØÖÆÌ¨µÄÊý¾Ý |
| | | // ÖØ¶¨Ïòscanfº¯Êýµ½´®¿Ú Òâ˼¾ÍÊÇ˵½ÓÊÜ´®¿Ú·¢¹ýÀ´µÄÊý¾Ý£¬ÆäĬÈÏÊǽÓÊÜ¿ØÖÆÌ¨µÄÊý¾Ý |
| | | /*fgetc*/ |
| | | // int fgetc(FILE * F) |
| | | //{ |
| | |
| | | // } |
| | | |
| | | /*DMAÖжϻص÷º¯Êý£¬º¯ÊýÃûÔÚstartup_xxxx.sÆô¶¯ÎļþÖÐѰÕÒ*/ |
| | | void DMA_IRQHandler(void) |
| | | { |
| | | if((ENABLE == DMA_CHxCR_CHxFTIE_Getable(DMA_CH7)) |
| | | &&(SET == DMA_ISR_DMACHFT_Chk(DMA_CH7))) |
| | | { |
| | | //Çå³ýÖжϱêÖ¾ |
| | | DMA_ISR_DMACHFT_Clr(DMA_CH7); |
| | | } |
| | | } |
| | | |
| | | void UART1_IRQHandler(void) |
| | | { |
| | | //Ö»ÓÐuart0ºÍuart1ÓнÓÊÕ³¬Ê±ÖÐ¶Ï |
| | | if(UARTx_ISR_RXTO_Chk(UART1) == SET){ |
| | | UARTx_ISR_RXTO_Clr(UART1); |
| | | uart_ctrl_para_g.RS485_rxto_flag = SET; |
| | | uart_ctrl_para_g.WRC_rxto_flag = SET; |
| | | } |
| | | } |
| | | |
| | | //void UART5_IRQHandler(void) |
| | | // void DMA_IRQHandler(void) |
| | | //{ |
| | | // //Ö»ÓÐuart0ºÍuart1ÓнÓÊÕ³¬Ê±ÖÐ¶Ï |
| | | // if(UARTx_ISR_RXTO_Chk(UART5) == SET){ |
| | | // UARTx_ISR_RXTO_Clr(UART5); |
| | | // uart_ctrl_para_g.UP_COMM_rxto_flag = SET; |
| | | // if((ENABLE == DMA_CHxCR_CHxFTIE_Getable(DMA_CH7)) |
| | | // &&(SET == DMA_ISR_DMACHFT_Chk(DMA_CH7))) |
| | | // { |
| | | // //Çå³ýÖжϱêÖ¾ |
| | | // DMA_ISR_DMACHFT_Clr(DMA_CH7); |
| | | // } |
| | | //} |
| | | // } |
| | | |
| | | |
| | | void RS485_read_data_uart_Init(uint32_t BaudRate,UART_ParityBitTypeDef ParityBit,UART_StopBitTypeDef StopBit) |
| | | void Uart0_Init(void) |
| | | { |
| | | UART_SInitTypeDef UART_para;//UART³õʼ»¯½á¹¹Ìå |
| | | CMU_ClocksType CMU_Clocks;//ϵͳ¸÷ʱÖÓÆµÂʽṹÌå ÔÚ´ËÓë¼ÆËã²¨ÌØÂÊÓÐ¹Ø |
| | | |
| | | /*UART0 IO ÅäÖÃ*/ |
| | | CMU_PERCLK_SetableEx(PADCLK, ENABLE); //PADʱÖÓ£¨GPIO£©Ê¹Äܺ¯Êý |
| | | AltFunIO(RS485_READ_DATA_TX_PORT, RS485_READ_DATA_TX_PIN, ALTFUN_NORMAL); |
| | | AltFunIO(RS485_READ_DATA_RX_PORT, RS485_READ_DATA_RX_PIN, ALTFUN_NORMAL); |
| | | |
| | | //UART¹¤×÷ʱÖÓÔ´Ñ¡Ôñ Ö»ÓÐUART0¡¢1ÐèҪѡÔñ ÆäËûUART¶Ë¿ÚÔݲ»ÐèÒª Ö±½Ó×¢Êͼ´¿É |
| | | if(RS485_READ_DATA_UARTX==UART0) |
| | | UART_para.ClockSrc = CMU_OPCCR1_UART0CKS_APBCLK; //UART0¹¤×÷ʱÖÓÑ¡Ôñ |
| | | else if(RS485_READ_DATA_UARTX==UART1) |
| | | UART_para.ClockSrc = CMU_OPCCR1_UART1CKS_APBCLK; //UART1¹¤×÷ʱÖÓÑ¡Ôñ |
| | | |
| | | |
| | | UART_para.BaudRate = BaudRate; |
| | | UART_para.ParityBit = ParityBit; //ÆæÅ¼Ð£Ñé |
| | | if(ParityBit==NONE) |
| | | UART_para.DataBit = Eight8Bit; //Êý¾ÝλÊý |
| | | else |
| | | UART_para.DataBit = Nine9Bit; //Êý¾ÝλÊý |
| | | UART_para.StopBit = StopBit; //ֹͣλ |
| | | |
| | | CMU_GetClocksFreq(&CMU_Clocks); //»ñȡϵͳ¸÷ʱÖÓÆµÂÊ |
| | | UART_SInit(RS485_READ_DATA_UARTX, &UART_para,&CMU_Clocks); //³õʼ»¯uart |
| | | |
| | | // UARTx_IER_RXBF_IE_Setable(RS485_READ_DATA_UARTX, ENABLE);//½ÓÊÕ»º´æÂúÖжÏʹÄÜ ÐèҪʹÓýÓÊÕÖжϴò¿ª´Ë´¦ÉèÖà |
| | | // UARTx_IER_TXSE_IE_Setable(RS485_READ_DATA_UARTX, ENABLE)£»//·¢ËÍ»º´æ¿ÕÇÒ·¢ËÍÒÆÎ»¼Ä´æÆ÷¿ÕÖжÏʹÄÜ ÐèҪʹÓ÷¢ËÍÖжϴò¿ª´Ë´¦ÉèÖà |
| | | |
| | | NVIC_DisableIRQ(RS485_READ_DATA_UARTX_IRQn); |
| | | UARTx_TODR_RXTO_LEN_Set(RS485_READ_DATA_UARTX, 255);//Ö»ÓÐuart0ºÍuart1ÓнÓÊÕ³¬Ê±ÖÐ¶Ï |
| | | UARTx_ISR_RXTO_Clr(RS485_READ_DATA_UARTX); |
| | | UARTx_IER_RXTO_IE_Setable(RS485_READ_DATA_UARTX, ENABLE); |
| | | // NVIC_EnableIRQ(RS485_READ_DATA_UARTX_IRQn); |
| | | UARTx_CSR_RXTOEN_Setable(RS485_READ_DATA_UARTX, ENABLE); |
| | | /*NVICÖжÏÓÅÏȼ¶ÒÔ¼°ÊÇ·ñ´ò¿ªÖжÏÅäÖÃ*/ |
| | | // NVIC_DisableIRQ(RS485_READ_DATA_UARTX_IRQn); |
| | | NVIC_SetPriority(RS485_READ_DATA_UARTX_IRQn,2);//ÖжÏÓÅÏȼ¶ÅäÖà |
| | | NVIC_EnableIRQ(RS485_READ_DATA_UARTX_IRQn); //ÖжϷþÎñº¯Êý¿ª |
| | | |
| | | UARTx_CSR_RXEN_Setable(RS485_READ_DATA_UARTX, ENABLE); //´ò¿ª½ÓÊÕʹÄÜ |
| | | UARTx_CSR_TXEN_Setable(RS485_READ_DATA_UARTX, ENABLE); //´ò¿ª·¢ËÍʹÄÜ |
| | | |
| | | UARTx_ISR_RXBF_Clr(RS485_READ_DATA_UARTX); |
| | | UART_SInitTypeDef UART_para; // UART³õʼ»¯½á¹¹Ìå |
| | | CMU_ClocksType CMU_Clocks; // ϵͳ¸÷ʱÖÓÆµÂʽṹÌå ÔÚ´ËÓë¼ÆËã²¨ÌØÂÊÓÐ¹Ø |
| | | |
| | | /*UART0 IO ÅäÖÃ*/ |
| | | CMU_PERCLK_SetableEx(PADCLK, ENABLE); // PADʱÖÓ£¨GPIO£©Ê¹Äܺ¯Êý |
| | | AltFunIO(IR_RX_PORT, IR_RX_PIN, ALTFUN_NORMAL); // PF3 UART0 RX |
| | | AltFunIO(IR_TX_PORT, IR_TX_PIN, ALTFUN_NORMAL); // PF4 UART0 TX |
| | | |
| | | // UART¹¤×÷ʱÖÓÔ´Ñ¡Ôñ Ö»ÓÐUART0¡¢1ÐèҪѡÔñ ÆäËûUART¶Ë¿ÚÔݲ»ÐèÒª Ö±½Ó×¢Êͼ´¿É |
| | | UART_para.ClockSrc = CMU_OPCCR1_UART0CKS_APBCLK; // UART0¹¤×÷ʱÖÓÑ¡Ôñ |
| | | UART_para.BaudRate = 115200; |
| | | UART_para.DataBit = Eight8Bit; // Êý¾ÝλÊý |
| | | UART_para.ParityBit = NONE; // ÆæÅ¼Ð£Ñé |
| | | UART_para.StopBit = OneBit; // ֹͣλ |
| | | |
| | | CMU_GetClocksFreq(&CMU_Clocks); // »ñȡϵͳ¸÷ʱÖÓÆµÂÊ |
| | | UART_SInit(UART0, &UART_para, &CMU_Clocks); // ³õʼ»¯uart |
| | | |
| | | // UARTx_IER_RXBF_IE_Setable(MODBUS_UART, ENABLE);//½ÓÊÕ»º´æÂúÖжÏʹÄÜ ÐèҪʹÓýÓÊÕÖжϴò¿ª´Ë´¦ÉèÖà |
| | | // UARTx_IER_TXSE_IE_Setable(MODBUS_UART, ENABLE)£»//·¢ËÍ»º´æ¿ÕÇÒ·¢ËÍÒÆÎ»¼Ä´æÆ÷¿ÕÖжÏʹÄÜ ÐèҪʹÓ÷¢ËÍÖжϴò¿ª´Ë´¦ÉèÖà |
| | | |
| | | /*NVICÖжÏÓÅÏȼ¶ÒÔ¼°ÊÇ·ñ´ò¿ªÖжÏÅäÖÃ*/ |
| | | NVIC_DisableIRQ(UART0_IRQn); |
| | | // NVIC_SetPriority(UART0_IRQn,2);//ÖжÏÓÅÏȼ¶ÅäÖà |
| | | // NVIC_EnableIRQ(UART0_IRQn); //ÖжϷþÎñº¯Êý¿ª |
| | | |
| | | UARTx_CSR_RXEN_Setable(UART0, ENABLE); // ´ò¿ª½ÓÊÕʹÄÜ |
| | | UARTx_CSR_TXEN_Setable(UART0, ENABLE); // ´ò¿ª·¢ËÍʹÄÜ |
| | | |
| | | UARTx_ISR_RXBF_Clr(UART0); |
| | | } |
| | | |
| | | |
| | | void RS485_read_data_RX_DMA_CH3_Init(void) |
| | | void Uart3_Init(void) |
| | | { |
| | | DMA_InitTypeDef DMA_InitStructure;//DMA³õʼ»¯²ÎÊý½á¹¹Ìå |
| | | |
| | | CMU_PERCLK_SetableEx(DMACLK, ENABLE);//DMAʱÖÓʹÄÜ |
| | | DMA_GCR_DMAEN_Setable(ENABLE);//DMA×ÜʹÄÜ |
| | | |
| | | DMA_InitStructure.CHx = RS485_READ_DATA_DMA_CHX;//DMAͨµÀºÅÉèÖà |
| | | DMA_InitStructure.CHxPRI = DMA_CHxCR_CHxPRI_HIGH;//ͨµÀÓÅÏȼ¶ÉèÖà |
| | | DMA_InitStructure.CHxINC = DMA_CHxCR_CHxINC_INCREASE;//ͨµÀµØÖ·Ôö³¤·½Ïò |
| | | DMA_InitStructure.CHxSSEL = DMA_CHxCR_CH3SSEL_UART1_RX;//ÍâÉèͨµÀÑ¡Ôñ |
| | | DMA_InitStructure.CHxDIR = DMA_CHxCR_DIR_TO_RAM;//Êý¾Ý´«Êä·½ÏòÉèÖà |
| | | DMA_InitStructure.CHxTSIZE = RS485_READ_DATA_RECV_BUFF_LEN_MAX - 1;//ͨµÀ´«Ê䳤¶È |
| | | DMA_InitStructure.CHxRAMAD = (uint32)RS485_read_data_recv_buff;//Ä¿±êµØÖ· |
| | | DMA_InitStructure.CHxBDW = DMA_CHxCR_BDW_8BITS;//ͨµÀ´«Êä´ø¿í |
| | | |
| | | DMA_InitStructure.CHxFTIE = DISABLE; //ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ |
| | | DMA_InitStructure.CHxHTIE = DISABLE; //ͨµÀ´«Êä°ë³ÌÖÕ¶ËʹÄÜ |
| | | UART_SInitTypeDef UART_para; // UART³õʼ»¯½á¹¹Ìå |
| | | CMU_ClocksType CMU_Clocks; // ϵͳ¸÷ʱÖÓÆµÂʽṹÌå ÔÚ´ËÓë¼ÆËã²¨ÌØÂÊÓÐ¹Ø |
| | | |
| | | DMA_InitStructure.CHxEN = ENABLE; //ͨµÀʹÄÜ |
| | | |
| | | NVIC_DisableIRQ(DMA_IRQn); |
| | | // NVIC_SetPriority(DMA_IRQn,3);//ÖжÏÓÅÏȼ¶ÅäÖà |
| | | // NVIC_EnableIRQ(DMA_IRQn); |
| | | |
| | | // DMA_CHxCR_CHxFTIE_Setable(MODBUS_DMA_RX_CHANNEL,ENABLE);//ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ |
| | | /*UART0 IO ÅäÖÃ*/ |
| | | CMU_PERCLK_SetableEx(PADCLK, ENABLE); // PADʱÖÓ£¨GPIO£©Ê¹Äܺ¯Êý |
| | | AltFunIO(MAIN_TX_PORT, MAIN_TX_PIN, ALTFUN_NORMAL); |
| | | AltFunIO(MAIN_RX_PORT, MAIN_RX_PIN, ALTFUN_NORMAL); |
| | | |
| | | DMA_ISR_DMACHFT_Clr(RS485_READ_DATA_DMA_CHX); |
| | | // UART¹¤×÷ʱÖÓÔ´Ñ¡Ôñ Ö»ÓÐUART0¡¢1ÐèҪѡÔñ ÆäËûUART¶Ë¿ÚÔݲ»ÐèÒª Ö±½Ó×¢Êͼ´¿É |
| | | // UART_para.ClockSrc = CMU_OPCCR1_UART0CKS_APBCLK; //UART0¹¤×÷ʱÖÓÑ¡Ôñ |
| | | UART_para.BaudRate = 115200; |
| | | UART_para.DataBit = Eight8Bit; // Êý¾ÝλÊý |
| | | UART_para.ParityBit = NONE; // ÆæÅ¼Ð£Ñé |
| | | UART_para.StopBit = OneBit; // ֹͣλ |
| | | |
| | | DMA_Init(&DMA_InitStructure);//DMAÅäÖòÎÊýдÈë |
| | | CMU_GetClocksFreq(&CMU_Clocks); // »ñȡϵͳ¸÷ʱÖÓÆµÂÊ |
| | | UART_SInit(UART3, &UART_para, &CMU_Clocks); // ³õʼ»¯uart |
| | | |
| | | // UARTx_IER_RXBF_IE_Setable(MODBUS_UART, ENABLE);//½ÓÊÕ»º´æÂúÖжÏʹÄÜ ÐèҪʹÓýÓÊÕÖжϴò¿ª´Ë´¦ÉèÖà |
| | | // UARTx_IER_TXSE_IE_Setable(MODBUS_UART, ENABLE)£»//·¢ËÍ»º´æ¿ÕÇÒ·¢ËÍÒÆÎ»¼Ä´æÆ÷¿ÕÖжÏʹÄÜ ÐèҪʹÓ÷¢ËÍÖжϴò¿ª´Ë´¦ÉèÖà |
| | | |
| | | /*NVICÖжÏÓÅÏȼ¶ÒÔ¼°ÊÇ·ñ´ò¿ªÖжÏÅäÖÃ*/ |
| | | NVIC_DisableIRQ(UART3_IRQn); |
| | | // NVIC_SetPriority(UART3_IRQn,2);//ÖжÏÓÅÏȼ¶ÅäÖà |
| | | // NVIC_EnableIRQ(UART3); //ÖжϷþÎñº¯Êý¿ª |
| | | |
| | | UARTx_CSR_RXEN_Setable(UART3, ENABLE); // ´ò¿ª½ÓÊÕʹÄÜ |
| | | UARTx_CSR_TXEN_Setable(UART3, ENABLE); // ´ò¿ª·¢ËÍʹÄÜ |
| | | |
| | | UARTx_ISR_RXBF_Clr(UART3); |
| | | } |
| | | |
| | | void RS485_read_data_RX_DMA_CH3_reload(void) |
| | | void Uart5_Init(void) |
| | | { |
| | | DMA_ISR_DMACHFT_Clr(RS485_READ_DATA_DMA_CHX); |
| | | DMA_CHxCR_ChxEN_Setable(RS485_READ_DATA_DMA_CHX, DISABLE); //ͨµÀʧÄÜ |
| | | |
| | | memset(RS485_read_data_recv_buff,0,sizeof(RS485_read_data_recv_buff)); |
| | | |
| | | DMA_CHxMAR_Write(RS485_READ_DATA_DMA_CHX, (uint32)RS485_read_data_recv_buff); |
| | | |
| | | DMA_CHxCR_ChxEN_Setable(RS485_READ_DATA_DMA_CHX, ENABLE); //ͨµÀʹÄÜ |
| | | UART_SInitTypeDef UART_para; // UART³õʼ»¯½á¹¹Ìå |
| | | CMU_ClocksType CMU_Clocks; // ϵͳ¸÷ʱÖÓÆµÂʽṹÌå ÔÚ´ËÓë¼ÆËã²¨ÌØÂÊÓÐ¹Ø |
| | | |
| | | /*UART0 IO ÅäÖÃ*/ |
| | | CMU_PERCLK_SetableEx(PADCLK, ENABLE); // PADʱÖÓ£¨GPIO£©Ê¹Äܺ¯Êý |
| | | AltFunIO(GPRS_TX_PORT, GPRS_TX_PIN, ALTFUN_NORMAL); |
| | | AltFunIO(GPRS_RX_PORT, GPRS_RX_PIN, ALTFUN_NORMAL); |
| | | |
| | | // UART¹¤×÷ʱÖÓÔ´Ñ¡Ôñ Ö»ÓÐUART0¡¢1ÐèҪѡÔñ ÆäËûUART¶Ë¿ÚÔݲ»ÐèÒª Ö±½Ó×¢Êͼ´¿É |
| | | // UART_para.ClockSrc = CMU_OPCCR1_UART0CKS_APBCLK; //UART0¹¤×÷ʱÖÓÑ¡Ôñ |
| | | UART_para.BaudRate = 115200; |
| | | UART_para.DataBit = Eight8Bit; // Êý¾ÝλÊý |
| | | UART_para.ParityBit = NONE; // ÆæÅ¼Ð£Ñé |
| | | UART_para.StopBit = OneBit; // ֹͣλ |
| | | |
| | | CMU_GetClocksFreq(&CMU_Clocks); // »ñȡϵͳ¸÷ʱÖÓÆµÂÊ |
| | | UART_SInit(UART5, &UART_para, &CMU_Clocks); // ³õʼ»¯uart |
| | | |
| | | // UARTx_IER_RXBF_IE_Setable(MODBUS_UART, ENABLE);//½ÓÊÕ»º´æÂúÖжÏʹÄÜ ÐèҪʹÓýÓÊÕÖжϴò¿ª´Ë´¦ÉèÖà |
| | | // UARTx_IER_TXSE_IE_Setable(MODBUS_UART, ENABLE)£»//·¢ËÍ»º´æ¿ÕÇÒ·¢ËÍÒÆÎ»¼Ä´æÆ÷¿ÕÖжÏʹÄÜ ÐèҪʹÓ÷¢ËÍÖжϴò¿ª´Ë´¦ÉèÖà |
| | | |
| | | /*NVICÖжÏÓÅÏȼ¶ÒÔ¼°ÊÇ·ñ´ò¿ªÖжÏÅäÖÃ*/ |
| | | NVIC_DisableIRQ(UART5_IRQn); |
| | | // NVIC_SetPriority(UART5_IRQn,2);//ÖжÏÓÅÏȼ¶ÅäÖà |
| | | // NVIC_EnableIRQ(UART5_IRQn); //ÖжϷþÎñº¯Êý¿ª |
| | | |
| | | UARTx_CSR_RXEN_Setable(UART5, ENABLE); // ´ò¿ª½ÓÊÕʹÄÜ |
| | | UARTx_CSR_TXEN_Setable(UART5, ENABLE); // ´ò¿ª·¢ËÍʹÄÜ |
| | | |
| | | UARTx_ISR_RXBF_Clr(UART5); |
| | | } |
| | | |
| | | |
| | | //ÉÏλ»ú½Ó¿Ú |
| | | void up_comm_uart_Init(uint32_t BaudRate,UART_ParityBitTypeDef ParityBit,UART_StopBitTypeDef StopBit) |
| | | void Uart0_RX_DMA_CH7_Init(void) |
| | | { |
| | | UART_SInitTypeDef UART_para;//UART³õʼ»¯½á¹¹Ìå |
| | | CMU_ClocksType CMU_Clocks;//ϵͳ¸÷ʱÖÓÆµÂʽṹÌå ÔÚ´ËÓë¼ÆËã²¨ÌØÂÊÓÐ¹Ø |
| | | |
| | | /*UART0 IO ÅäÖÃ*/ |
| | | CMU_PERCLK_SetableEx(PADCLK, ENABLE); //PADʱÖÓ£¨GPIO£©Ê¹Äܺ¯Êý |
| | | AltFunIO(UP_COMM_TX_PORT, UP_COMM_TX_PIN, ALTFUN_NORMAL); |
| | | AltFunIO(UP_COMM_RX_PORT, UP_COMM_RX_PIN, ALTFUN_NORMAL); |
| | | |
| | | OutputIO(UP_COMM_RE_PORT,UP_COMM_RE_PIN,OUT_PUSHPULL); |
| | | UP_COMM_RE_RECV_EN; |
| | | |
| | | //UART¹¤×÷ʱÖÓÔ´Ñ¡Ôñ Ö»ÓÐUART0¡¢1ÐèҪѡÔñ ÆäËûUART¶Ë¿ÚÔݲ»ÐèÒª Ö±½Ó×¢Êͼ´¿É |
| | | if(UP_COMM_UARTX==UART0) |
| | | UART_para.ClockSrc = CMU_OPCCR1_UART0CKS_APBCLK; //UART0¹¤×÷ʱÖÓÑ¡Ôñ |
| | | else if(UP_COMM_UARTX==UART1) |
| | | UART_para.ClockSrc = CMU_OPCCR1_UART1CKS_APBCLK; //UART1¹¤×÷ʱÖÓÑ¡Ôñ |
| | | |
| | | UART_para.BaudRate = BaudRate; |
| | | UART_para.ParityBit = ParityBit; //ÆæÅ¼Ð£Ñé |
| | | if(ParityBit==NONE) |
| | | UART_para.DataBit = Eight8Bit; //Êý¾ÝλÊý |
| | | else |
| | | UART_para.DataBit = Nine9Bit; //Êý¾ÝλÊý |
| | | UART_para.StopBit = StopBit; //ֹͣλ |
| | | |
| | | CMU_GetClocksFreq(&CMU_Clocks); //»ñȡϵͳ¸÷ʱÖÓÆµÂÊ |
| | | UART_SInit(UP_COMM_UARTX, &UART_para,&CMU_Clocks); //³õʼ»¯uart |
| | | |
| | | // UARTx_IER_RXBF_IE_Setable(UP_COMM_UARTX, ENABLE);//½ÓÊÕ»º´æÂúÖжÏʹÄÜ ÐèҪʹÓýÓÊÕÖжϴò¿ª´Ë´¦ÉèÖà |
| | | // UARTx_IER_TXSE_IE_Setable(UP_COMM_UARTX, ENABLE)£»//·¢ËÍ»º´æ¿ÕÇÒ·¢ËÍÒÆÎ»¼Ä´æÆ÷¿ÕÖжÏʹÄÜ ÐèҪʹÓ÷¢ËÍÖжϴò¿ª´Ë´¦ÉèÖà |
| | | // NVIC_DisableIRQ(UP_COMM_UARTX_IRQn); |
| | | // UARTx_TODR_RXTO_LEN_Set(UP_COMM_UARTX, 255);//Ö»ÓÐuart0ºÍuart1ÓнÓÊÕ³¬Ê±ÖÐ¶Ï |
| | | // UARTx_ISR_RXTO_Clr(UP_COMM_UARTX); |
| | | // UARTx_IER_RXTO_IE_Setable(UP_COMM_UARTX, ENABLE); |
| | | //// NVIC_EnableIRQ(UP_COMM_UARTX_IRQn); |
| | | // UARTx_CSR_RXTOEN_Setable(UP_COMM_UARTX, ENABLE); |
| | | |
| | | |
| | | /*NVICÖжÏÓÅÏȼ¶ÒÔ¼°ÊÇ·ñ´ò¿ªÖжÏÅäÖÃ*/ |
| | | NVIC_DisableIRQ(UP_COMM_UARTX_IRQn); |
| | | // NVIC_SetPriority(UP_COMM_UARTX_IRQn,4);//ÖжÏÓÅÏȼ¶ÅäÖà |
| | | // NVIC_EnableIRQ(UP_COMM_UARTX_IRQn); //ÖжϷþÎñº¯Êý¿ª |
| | | |
| | | UARTx_CSR_RXEN_Setable(UP_COMM_UARTX, ENABLE); //´ò¿ª½ÓÊÕʹÄÜ |
| | | UARTx_CSR_TXEN_Setable(UP_COMM_UARTX, ENABLE); //´ò¿ª·¢ËÍʹÄÜ |
| | | |
| | | UARTx_ISR_RXBF_Clr(UP_COMM_UARTX); |
| | | DMA_InitTypeDef DMA_InitStructure; // DMA³õʼ»¯²ÎÊý½á¹¹Ìå |
| | | |
| | | CMU_PERCLK_SetableEx(DMACLK, ENABLE); // DMAʱÖÓʹÄÜ |
| | | DMA_GCR_DMAEN_Setable(ENABLE); // DMA×ÜʹÄÜ |
| | | |
| | | DMA_InitStructure.CHx = DMA_CH7; // DMAͨµÀºÅÉèÖà |
| | | DMA_InitStructure.CHxPRI = DMA_CHxCR_CHxPRI_HIGH; // ͨµÀÓÅÏȼ¶ÉèÖà |
| | | DMA_InitStructure.CHxINC = DMA_CHxCR_CHxINC_INCREASE; // ͨµÀµØÖ·Ôö³¤·½Ïò |
| | | DMA_InitStructure.CHxSSEL = DMA_CHxCR_CH7SSEL_UART0_RX; // ÍâÉèͨµÀÑ¡Ôñ |
| | | DMA_InitStructure.CHxDIR = DMA_CHxCR_DIR_TO_RAM; // Êý¾Ý´«Êä·½ÏòÉèÖà |
| | | DMA_InitStructure.CHxTSIZE = UC_RECV_LEN_MAX - 1; // ͨµÀ´«Ê䳤¶È |
| | | DMA_InitStructure.CHxRAMAD = (uint32)uc_recv_para_g.uc_recv_buf_union.uc_recv_buf; // Ä¿±êµØÖ· |
| | | DMA_InitStructure.CHxBDW = DMA_CHxCR_BDW_8BITS; // ͨµÀ´«Êä´ø¿í |
| | | |
| | | DMA_InitStructure.CHxFTIE = DISABLE; // ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ |
| | | DMA_InitStructure.CHxHTIE = DISABLE; // ͨµÀ´«Êä°ë³ÌÖÕ¶ËʹÄÜ |
| | | |
| | | DMA_InitStructure.CHxEN = ENABLE; // ͨµÀʹÄÜ |
| | | |
| | | NVIC_DisableIRQ(DMA_IRQn); |
| | | // NVIC_SetPriority(DMA_IRQn,3);//ÖжÏÓÅÏȼ¶ÅäÖà |
| | | // NVIC_EnableIRQ(DMA_IRQn); |
| | | |
| | | // DMA_CHxCR_CHxFTIE_Setable(MODBUS_DMA_RX_CHANNEL,ENABLE);//ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ |
| | | |
| | | DMA_ISR_DMACHFT_Clr(DMA_CH7); |
| | | |
| | | DMA_Init(&DMA_InitStructure); // DMAÅäÖòÎÊýдÈë |
| | | } |
| | | |
| | | |
| | | void up_comm_RX_DMA_CH2_Init(void) |
| | | void Uart3_RX_DMA_CH1_Init(void) |
| | | { |
| | | DMA_InitTypeDef DMA_InitStructure;//DMA³õʼ»¯²ÎÊý½á¹¹Ìå |
| | | |
| | | CMU_PERCLK_SetableEx(DMACLK, ENABLE);//DMAʱÖÓʹÄÜ |
| | | DMA_GCR_DMAEN_Setable(ENABLE);//DMA×ÜʹÄÜ |
| | | |
| | | DMA_InitStructure.CHx = UP_COMM_DMA_CHX;//DMAͨµÀºÅÉèÖà |
| | | DMA_InitStructure.CHxPRI = DMA_CHxCR_CHxPRI_HIGH;//ͨµÀÓÅÏȼ¶ÉèÖà |
| | | DMA_InitStructure.CHxINC = DMA_CHxCR_CHxINC_INCREASE;//ͨµÀµØÖ·Ôö³¤·½Ïò |
| | | DMA_InitStructure.CHxSSEL = DMA_CHxCR_CH2SSEL_UART5_RX;//ÍâÉèͨµÀÑ¡Ôñ |
| | | DMA_InitStructure.CHxDIR = DMA_CHxCR_DIR_TO_RAM;//Êý¾Ý´«Êä·½ÏòÉèÖà |
| | | DMA_InitStructure.CHxTSIZE = UP_COMM_RECV_BUFF_LEN_MAX - 1;//ͨµÀ´«Ê䳤¶È |
| | | DMA_InitStructure.CHxRAMAD = (uint32)up_comm_recv_buff;//Ä¿±êµØÖ· |
| | | DMA_InitStructure.CHxBDW = DMA_CHxCR_BDW_8BITS;//ͨµÀ´«Êä´ø¿í |
| | | |
| | | DMA_InitStructure.CHxFTIE = DISABLE; //ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ |
| | | DMA_InitStructure.CHxHTIE = DISABLE; //ͨµÀ´«Êä°ë³ÌÖÕ¶ËʹÄÜ |
| | | DMA_InitTypeDef DMA_InitStructure; // DMA³õʼ»¯²ÎÊý½á¹¹Ìå |
| | | |
| | | DMA_InitStructure.CHxEN = ENABLE; //ͨµÀʹÄÜ |
| | | |
| | | NVIC_DisableIRQ(DMA_IRQn); |
| | | // NVIC_SetPriority(DMA_IRQn,3);//ÖжÏÓÅÏȼ¶ÅäÖà |
| | | // NVIC_EnableIRQ(DMA_IRQn); |
| | | |
| | | // DMA_CHxCR_CHxFTIE_Setable(MODBUS_DMA_RX_CHANNEL,ENABLE);//ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ |
| | | CMU_PERCLK_SetableEx(DMACLK, ENABLE); // DMAʱÖÓʹÄÜ |
| | | DMA_GCR_DMAEN_Setable(ENABLE); // DMA×ÜʹÄÜ |
| | | |
| | | DMA_ISR_DMACHFT_Clr(UP_COMM_DMA_CHX); |
| | | DMA_InitStructure.CHx = DMA_CH1; // DMAͨµÀºÅÉèÖà |
| | | DMA_InitStructure.CHxPRI = DMA_CHxCR_CHxPRI_HIGH; // ͨµÀÓÅÏȼ¶ÉèÖà |
| | | DMA_InitStructure.CHxINC = DMA_CHxCR_CHxINC_INCREASE; // ͨµÀµØÖ·Ôö³¤·½Ïò |
| | | DMA_InitStructure.CHxSSEL = DMA_CHxCR_CH1SSEL_UART3_RX; // ÍâÉèͨµÀÑ¡Ôñ |
| | | DMA_InitStructure.CHxDIR = DMA_CHxCR_DIR_TO_RAM; // Êý¾Ý´«Êä·½ÏòÉèÖà |
| | | DMA_InitStructure.CHxTSIZE = INTER_RECV_LEN_MAX - 1; // ͨµÀ´«Ê䳤¶È |
| | | DMA_InitStructure.CHxRAMAD = (uint32)inter_recv_para_g.inter_recv_union.inter_recv_buf; // Ä¿±êµØÖ· |
| | | DMA_InitStructure.CHxBDW = DMA_CHxCR_BDW_8BITS; // ͨµÀ´«Êä´ø¿í |
| | | |
| | | DMA_Init(&DMA_InitStructure);//DMAÅäÖòÎÊýдÈë |
| | | DMA_InitStructure.CHxFTIE = DISABLE; // ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ |
| | | DMA_InitStructure.CHxHTIE = DISABLE; // ͨµÀ´«Êä°ë³ÌÖÕ¶ËʹÄÜ |
| | | |
| | | DMA_InitStructure.CHxEN = ENABLE; // ͨµÀʹÄÜ |
| | | |
| | | NVIC_DisableIRQ(DMA_IRQn); |
| | | // NVIC_SetPriority(DMA_IRQn,3);//ÖжÏÓÅÏȼ¶ÅäÖà |
| | | // NVIC_EnableIRQ(DMA_IRQn); |
| | | |
| | | // DMA_CHxCR_CHxFTIE_Setable(MODBUS_DMA_RX_CHANNEL,ENABLE);//ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ |
| | | |
| | | DMA_ISR_DMACHFT_Clr(DMA_CH1); |
| | | |
| | | DMA_Init(&DMA_InitStructure); // DMAÅäÖòÎÊýдÈë |
| | | } |
| | | |
| | | void up_comm_RX_DMA_CH2_reload(void) |
| | | void Uart5_RX_DMA_CH5_Init(void) |
| | | { |
| | | DMA_ISR_DMACHFT_Clr(UP_COMM_DMA_CHX); |
| | | DMA_CHxCR_ChxEN_Setable(UP_COMM_DMA_CHX, DISABLE); //ͨµÀʧÄÜ |
| | | |
| | | memset(up_comm_recv_buff,0,sizeof(up_comm_recv_buff)); |
| | | |
| | | DMA_CHxMAR_Write(UP_COMM_DMA_CHX, (uint32)up_comm_recv_buff); |
| | | |
| | | DMA_CHxCR_ChxEN_Setable(UP_COMM_DMA_CHX, ENABLE); //ͨµÀʹÄÜ |
| | | DMA_InitTypeDef DMA_InitStructure; // DMA³õʼ»¯²ÎÊý½á¹¹Ìå |
| | | |
| | | CMU_PERCLK_SetableEx(DMACLK, ENABLE); // DMAʱÖÓʹÄÜ |
| | | DMA_GCR_DMAEN_Setable(ENABLE); // DMA×ÜʹÄÜ |
| | | |
| | | DMA_InitStructure.CHx = DMA_CH5; // DMAͨµÀºÅÉèÖà |
| | | DMA_InitStructure.CHxPRI = DMA_CHxCR_CHxPRI_HIGH; // ͨµÀÓÅÏȼ¶ÉèÖà |
| | | DMA_InitStructure.CHxINC = DMA_CHxCR_CHxINC_INCREASE; // ͨµÀµØÖ·Ôö³¤·½Ïò |
| | | DMA_InitStructure.CHxSSEL = DMA_CHxCR_CH5SSEL_UART5_RX; // ÍâÉèͨµÀÑ¡Ôñ |
| | | DMA_InitStructure.CHxDIR = DMA_CHxCR_DIR_TO_RAM; // Êý¾Ý´«Êä·½ÏòÉèÖà |
| | | DMA_InitStructure.CHxTSIZE = GPRS_RECV_LEN_MAX - 1; // ͨµÀ´«Ê䳤¶È |
| | | DMA_InitStructure.CHxRAMAD = (uint32)gprs_module_para_g.gprs_recv_buf; // Ä¿±êµØÖ· |
| | | DMA_InitStructure.CHxBDW = DMA_CHxCR_BDW_8BITS; // ͨµÀ´«Êä´ø¿í |
| | | |
| | | DMA_InitStructure.CHxFTIE = DISABLE; // ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ |
| | | DMA_InitStructure.CHxHTIE = DISABLE; // ͨµÀ´«Êä°ë³ÌÖÕ¶ËʹÄÜ |
| | | |
| | | DMA_InitStructure.CHxEN = ENABLE; // ͨµÀʹÄÜ |
| | | |
| | | NVIC_DisableIRQ(DMA_IRQn); |
| | | // NVIC_SetPriority(DMA_IRQn,3);//ÖжÏÓÅÏȼ¶ÅäÖà |
| | | // NVIC_EnableIRQ(DMA_IRQn); |
| | | |
| | | // DMA_CHxCR_CHxFTIE_Setable(MODBUS_DMA_RX_CHANNEL,ENABLE);//ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ |
| | | |
| | | DMA_ISR_DMACHFT_Clr(DMA_CH5); |
| | | |
| | | DMA_Init(&DMA_InitStructure); // DMAÅäÖòÎÊýдÈë |
| | | } |
| | | |
| | | |
| | | void WRC_uart_Init(uint32_t BaudRate,UART_ParityBitTypeDef ParityBit,UART_StopBitTypeDef StopBit) |
| | | { |
| | | UART_SInitTypeDef UART_para;//UART³õʼ»¯½á¹¹Ìå |
| | | CMU_ClocksType CMU_Clocks;//ϵͳ¸÷ʱÖÓÆµÂʽṹÌå ÔÚ´ËÓë¼ÆËã²¨ÌØÂÊÓÐ¹Ø |
| | | |
| | | /*UART0 IO ÅäÖÃ*/ |
| | | CMU_PERCLK_SetableEx(PADCLK, ENABLE); //PADʱÖÓ£¨GPIO£©Ê¹Äܺ¯Êý |
| | | AltFunIO(WRC_TX_PORT, WRC_TX_PIN, ALTFUN_NORMAL); |
| | | AltFunIO(WRC_RX_PORT, WRC_RX_PIN, ALTFUN_NORMAL); |
| | | |
| | | //UART¹¤×÷ʱÖÓÔ´Ñ¡Ôñ Ö»ÓÐUART0¡¢1ÐèҪѡÔñ ÆäËûUART¶Ë¿ÚÔݲ»ÐèÒª Ö±½Ó×¢Êͼ´¿É |
| | | if(WRC_UARTX==UART0) |
| | | UART_para.ClockSrc = CMU_OPCCR1_UART0CKS_APBCLK; //UART0¹¤×÷ʱÖÓÑ¡Ôñ |
| | | else if(WRC_UARTX==UART1) |
| | | UART_para.ClockSrc = CMU_OPCCR1_UART1CKS_APBCLK; //UART1¹¤×÷ʱÖÓÑ¡Ôñ |
| | | |
| | | UART_para.BaudRate = BaudRate; |
| | | UART_para.ParityBit = ParityBit; //ÆæÅ¼Ð£Ñé |
| | | if(ParityBit==NONE) |
| | | UART_para.DataBit = Eight8Bit; //Êý¾ÝλÊý |
| | | else |
| | | UART_para.DataBit = Nine9Bit; //Êý¾ÝλÊý |
| | | UART_para.StopBit = StopBit; //ֹͣλ |
| | | |
| | | CMU_GetClocksFreq(&CMU_Clocks); //»ñȡϵͳ¸÷ʱÖÓÆµÂÊ |
| | | UART_SInit(WRC_UARTX, &UART_para,&CMU_Clocks); //³õʼ»¯uart |
| | | |
| | | // UARTx_IER_RXBF_IE_Setable(WRC_UARTX, ENABLE);//½ÓÊÕ»º´æÂúÖжÏʹÄÜ ÐèҪʹÓýÓÊÕÖжϴò¿ª´Ë´¦ÉèÖà |
| | | // UARTx_IER_TXSE_IE_Setable(WRC_UARTX, ENABLE)£»//·¢ËÍ»º´æ¿ÕÇÒ·¢ËÍÒÆÎ»¼Ä´æÆ÷¿ÕÖжÏʹÄÜ ÐèҪʹÓ÷¢ËÍÖжϴò¿ª´Ë´¦ÉèÖà |
| | | |
| | | NVIC_DisableIRQ(WRC_UARTX_IRQn); |
| | | UARTx_TODR_RXTO_LEN_Set(WRC_UARTX, 255);//Ö»ÓÐuart0ºÍuart1ÓнÓÊÕ³¬Ê±ÖÐ¶Ï |
| | | UARTx_ISR_RXTO_Clr(WRC_UARTX); |
| | | UARTx_IER_RXTO_IE_Setable(WRC_UARTX, ENABLE); |
| | | // NVIC_EnableIRQ(WRC_UARTX_IRQn); |
| | | UARTx_CSR_RXTOEN_Setable(WRC_UARTX, ENABLE); |
| | | |
| | | /*NVICÖжÏÓÅÏȼ¶ÒÔ¼°ÊÇ·ñ´ò¿ªÖжÏÅäÖÃ*/ |
| | | // NVIC_DisableIRQ(WRC_UARTX_IRQn); |
| | | NVIC_SetPriority(WRC_UARTX_IRQn,2);//ÖжÏÓÅÏȼ¶ÅäÖà |
| | | NVIC_EnableIRQ(WRC_UARTX_IRQn); //ÖжϷþÎñº¯Êý¿ª |
| | | |
| | | UARTx_CSR_RXEN_Setable(WRC_UARTX, ENABLE); //´ò¿ª½ÓÊÕʹÄÜ |
| | | UARTx_CSR_TXEN_Setable(WRC_UARTX, ENABLE); //´ò¿ª·¢ËÍʹÄÜ |
| | | |
| | | UARTx_ISR_RXBF_Clr(WRC_UARTX); |
| | | } |
| | | |
| | | |
| | | void WRC_RX_DMA_CH3_Init(void) |
| | | { |
| | | DMA_InitTypeDef DMA_InitStructure;//DMA³õʼ»¯²ÎÊý½á¹¹Ìå |
| | | |
| | | CMU_PERCLK_SetableEx(DMACLK, ENABLE);//DMAʱÖÓʹÄÜ |
| | | DMA_GCR_DMAEN_Setable(ENABLE);//DMA×ÜʹÄÜ |
| | | |
| | | DMA_InitStructure.CHx = WRC_DMA_CHX;//DMAͨµÀºÅÉèÖà |
| | | DMA_InitStructure.CHxPRI = DMA_CHxCR_CHxPRI_HIGH;//ͨµÀÓÅÏȼ¶ÉèÖà |
| | | DMA_InitStructure.CHxINC = DMA_CHxCR_CHxINC_INCREASE;//ͨµÀµØÖ·Ôö³¤·½Ïò |
| | | DMA_InitStructure.CHxSSEL = DMA_CHxCR_CH3SSEL_UART1_RX;//ÍâÉèͨµÀÑ¡Ôñ |
| | | DMA_InitStructure.CHxDIR = DMA_CHxCR_DIR_TO_RAM;//Êý¾Ý´«Êä·½ÏòÉèÖà |
| | | DMA_InitStructure.CHxTSIZE = WRC_RECV_BUFF_LEN_MAX - 1;//ͨµÀ´«Ê䳤¶È |
| | | DMA_InitStructure.CHxRAMAD = (uint32)WRC_recv_buff;//Ä¿±êµØÖ· |
| | | DMA_InitStructure.CHxBDW = DMA_CHxCR_BDW_8BITS;//ͨµÀ´«Êä´ø¿í |
| | | |
| | | DMA_InitStructure.CHxFTIE = DISABLE; //ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ |
| | | DMA_InitStructure.CHxHTIE = DISABLE; //ͨµÀ´«Êä°ë³ÌÖÕ¶ËʹÄÜ |
| | | |
| | | DMA_InitStructure.CHxEN = ENABLE; //ͨµÀʹÄÜ |
| | | |
| | | NVIC_DisableIRQ(DMA_IRQn); |
| | | // NVIC_SetPriority(DMA_IRQn,3);//ÖжÏÓÅÏȼ¶ÅäÖà |
| | | // NVIC_EnableIRQ(DMA_IRQn); |
| | | |
| | | // DMA_CHxCR_CHxFTIE_Setable(MODBUS_DMA_RX_CHANNEL,ENABLE);//ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ |
| | | |
| | | DMA_ISR_DMACHFT_Clr(WRC_DMA_CHX); |
| | | |
| | | DMA_Init(&DMA_InitStructure);//DMAÅäÖòÎÊýдÈë |
| | | } |
| | | |
| | | void WRC_RX_DMA_CH3_reload(void) |
| | | { |
| | | DMA_ISR_DMACHFT_Clr(WRC_DMA_CHX); |
| | | DMA_CHxCR_ChxEN_Setable(WRC_DMA_CHX, DISABLE); //ͨµÀʧÄÜ |
| | | |
| | | memset(WRC_recv_buff,0,sizeof(WRC_recv_buff)); |
| | | |
| | | DMA_CHxMAR_Write(WRC_DMA_CHX, (uint32)WRC_recv_buff); |
| | | |
| | | DMA_CHxCR_ChxEN_Setable(WRC_DMA_CHX, ENABLE); //ͨµÀʹÄÜ |
| | | } |
| | | |
| | | |
| | | |
| | | /*ÆÕͨ£¨×èÈûʽ£©·¢ËÍÊý¾Ý*/ |
| | | void UARTx_SendData_Normal(UART_Type* UARTx,uint8_t * pSendData,uint16_t send_len) |
| | | void UARTx_SendData_Normal(UART_Type *UARTx, uint8_t *pSendData, uint16_t send_len) |
| | | { |
| | | for(uint16_t i= 0; i < send_len; i++) |
| | | { |
| | | UARTx_TXBUF_Write(UARTx, pSendData[i]); //½«·¢ËÍÊý¾ÝдÈë·¢ËͼĴæÆ÷ |
| | | while(RESET == UARTx_ISR_TXSE_Chk(UARTx)); //µÈ´ý·¢ËÍÍê³É |
| | | } |
| | | for (uint16_t i = 0; i < send_len; i++) |
| | | { |
| | | IWDT_Clr(); |
| | | UARTx_TXBUF_Write(UARTx, pSendData[i]); // ½«·¢ËÍÊý¾ÝдÈë·¢ËͼĴæÆ÷ |
| | | while (RESET == UARTx_ISR_TXSE_Chk(UARTx)) |
| | | ; // µÈ´ý·¢ËÍÍê³É |
| | | } |
| | | #if Debug_Model |
| | | printf("MCU->%s ", UARTx == UART5 ? "PC" : UARTx == UART1 ? "UART1" |
| | | : "UART1"); |
| | | for (uint16_t i = 0; i < send_len; i++) |
| | | { |
| | | IWDT_Clr(); |
| | | printf("0x%02x ", pSendData[i]); |
| | | } |
| | | printf("\r\n"); |
| | | #endif |
| | | } |
| | | |
| | | void UARTx_SendData_IT(void) |
| | | { |
| | | |
| | | } |
| | | |
| | | void UARTx_SendData_DMA(void) |
| | | { |
| | | |
| | | } |
| | | |