| | |
| | | #define EEPROM_PHYS_START_ADDR 0 //EEPÆðʼµØÖ· |
| | | #define EEPROM_PHYS_END_ADDR (EEPROM_PHYS_SIZE - 1) //EEP½áÊøµØÖ· |
| | | |
| | | /***********************EEP »ù±¾ÐÅÏ¢ÅäÖÃ**************************************/ |
| | | /***********************EEP Ïà¹ØÒý½ÅÅäÖÃ**************************************/ |
| | | #define EEPROM_PWR_PORT GPIOC |
| | | #define EEPROM_PWR_PIN GPIO_Pin_11 |
| | | |
| | | #define EEPROM_CS1_PORT GPIOC |
| | | #define EEPROM_CS1_PIN GPIO_Pin_6 |
| | | |
| | | #define EEPROM_CS2_PORT GPIOC |
| | | #define EEPROM_CS2_PIN GPIO_Pin_14 |
| | | |
| | | #define EEPROM_WP_PORT GPIOC |
| | | #define EEPROM_WP_PIN GPIO_Pin_10 |
| | | |
| | | |
| | | #define EEPROM_CS_1 0 |
| | | #define EEPROM_CS_2 1 |
| | | |
| | | #define E2P_PWR_ON // GPIO_ResetBits(E2P_PWR_PORT,E2P_PWR_PIN) |
| | | #define E2P_PWR_OFF // GPIO_SetBits(E2P_PWR_PORT,E2P_PWR_PIN) |
| | | #define E2P_PWR_ON GPIO_ResetBits(EEPROM_PWR_PORT,EEPROM_PWR_PIN) ///jlc µçÔ´ÊÇ·ñ¿É¿Ø»¹Ã»¸ÄÍê |
| | | #define E2P_PWR_OFF GPIO_SetBits(EEPROM_PWR_PORT,EEPROM_PWR_PIN) |
| | | |
| | | #define EEPROM_CS_LOW // {if(Fram_cs_flag!=1){GPIO_ResetBits(FRAM_CS_GROUP,FRAM_CS_NUM);GPIO_SetBits(FRAM_CS2_GROUP,FRAM_CS2_NUM);}else{EEPROM_CS_2_LOW}}//CS = 0 |
| | | #define EEPROM_CS_HIGH // {GPIO_SetBits(FRAM_CS_GROUP,FRAM_CS_NUM);GPIO_SetBits(FRAM_CS2_GROUP,FRAM_CS2_NUM);}//CS = 1 |
| | | #define EEPROM_CS_LOW GPIO_ResetBits(EEPROM_CS1_PORT,EEPROM_CS1_PIN) |
| | | #define EEPROM_CS_HIGH GPIO_SetBits(EEPROM_CS1_PORT,EEPROM_CS1_PIN) |
| | | |
| | | ///×¢Ò⣬ǧÍò²»ÒªÔÙÖжÏÖжÁдEEPROM£¬Èç¹ûÖжÏ֮ǰÊÇÔÚ²Ù×÷EEPROM£¬ÓÖÔÚÖжÏÖжÁдEEPROM£¬Ôò¿ÉÄܳöÎÊÌâ |
| | | #define EEPROM_CS_2_LOW {GPIO_ResetBits(FRAM_CS2_GROUP,FRAM_CS2_NUM);GPIO_SetBits(FRAM_CS_GROUP,FRAM_CS_NUM);}//CS_2 = 0 |
| | | #define EEPROM_CS_2_HIGH GPIO_SetBits(FRAM_CS2_GROUP,FRAM_CS2_NUM) //CS_2 = 1 |
| | | #define EEPROM_CS_ENABLE do{EEPROM_CS_LOW;EEPROM_CS_2_HIGH;}while(0) |
| | | #define EEPROM_CS_DISABLE do{EEPROM_CS_HIGH;EEPROM_CS_2_HIGH;}while(0) |
| | | |
| | | |
| | | #define EEPROM_CS_2_LOW GPIO_ResetBits(EEPROM_CS2_PORT,EEPROM_CS2_PIN) |
| | | #define EEPROM_CS_2_HIGH GPIO_SetBits(EEPROM_CS2_PORT,EEPROM_CS2_PIN) |
| | | |
| | | #define EEPROM_CS_2_ENABLE do{EEPROM_CS_2_LOW;EEPROM_CS_HIGH;}while(0) |
| | | #define EEPROM_CS_2_DISABLE do{EEPROM_CS_HIGH;EEPROM_CS_2_HIGH;}while(0) |
| | | |
| | | |
| | | //¿ØÖÆÊ¹ÄÜ£¬E2P²Ù×÷ǰºóµ÷Óà |
| | | #define EEPROM_CTRL_ENABLE do{E2P_Ctrl_Gpio_Init();E2P_PWR_ON;EEPROM_CS_ENABLE;}while(0) |
| | | #define EEPROM_CTRL_DISABLE do{E2P_Ctrl_Gpio_Init();}while(0) |
| | | |
| | | #define EEPROM_2_CTRL_ENABLE do{E2P_Ctrl_Gpio_Init();E2P_PWR_ON;EEPROM_CS_2_ENABLE;}while(0) |
| | | #define EEPROM_2_CTRL_DISABLE do{E2P_Ctrl_Gpio_Init();}while(0) |
| | | |
| | | |
| | | #define FM_ReadWriteByte(dat) SpiWriteAndRead(dat) |
| | | #define EEPROM_ioconfig() SPI3_ioconfig() |
| | |
| | | |
| | | void EEPROM_CS_2_test(void); |
| | | |
| | | void E2P_Ctrl_Gpio_Init(void); |
| | | |
| | | #endif |
| | | |