forked from SZV10X_Software/SZV103_FM33A0xxEV_SiZhu

jinlicong
2024-05-29 6c7e61a54ef9b96f79704f0b965664e89f57dd52
HARDWARE/ADC/ADC.c
@@ -25,8 +25,8 @@
void ADC_AlkaIO_Init(void)
{
   CMU_PERCLK_SetableEx(PADCLK, ENABLE);  //PADʱÖÓ£¨GPIO£©Ê¹Äܺ¯Êý
   AnalogIO(ALK_ADC_PORT,ALK_ADC_PIN);//ADC_IN8
   GPIOx_ANEN_Setable(ALK_ADC_PORT,ALK_ADC_PIN,ENABLE);
   AnalogIO_H(ALK_ADC_PIN);//ADC_IN8
//   GPIOx_ANEN_Setable(ALK_ADC_PORT,ALK_ADC_PIN,ENABLE);  //?ûÓÐH¿Ú£¬ÔÝʱ²»ÖªµÀÔõô´¦Àí
}
void ADC_IN5_Init(void)
@@ -100,6 +100,30 @@
   ADC_CR_EN_Setable(DISABLE);                        //ADC¹Ø±Õ
}
void ADC_IN10_Init(void)
{
   CDIF_CR_INTF_EN_Setable(ENABLE);                  //¿çµçÔ´Óò½Ó¿ÚʹÄÜ
   VRTC_Init_RCMF_Trim();
   VRTC_RCMFCR_EN_Setable(ENABLE);
   VRTC_ADCCR_CKS_Set(VRTC_ADCCR_CKS_RCMF_2);            //ADC¹¤×÷ʱÖÓÑ¡Ôñ
   VRTC_ADCCR_CKE_Setable(ENABLE);                     //ADC¹¤×÷ʱÖÓʹÄÜ
   ADC_CFGR_BUFSEL_Set(ADC_CFGR_BUFSEL_ADC_IN10);         //ADCÊäÈëͨµÀÑ¡Ôñ
   ADC_CFGR_BUFEN_Setable(ENABLE);                     //ADCÊäÈëͨµÀbufferʹÄÜ/½ûÖ¹
   ADC_CR_MODE_Set(ADC_CR_MODE_EXTERNAL);               //ADC¹¤×÷ģʽѡÔñÍⲿÀÛ¼ÓÆ÷
   ADC_CR_RSTCTRL_EN_Setable(ENABLE);                   //ÔÊÐí»ý·ÖÆ÷Íⲿ¸´Î»
   ADC_CFGR_ACC_PERIOD_Set(ADC_CFGR_ACC_PERIOD_14BITS);    //ÍⲿÀÛ¼ÓÆ÷ÀÛ¼ÓÖÜÆÚÅäÖÃ
   ADC_CR_HPEN_Set(ADC_CR_HPEN_1MHZ);
  ADC_TRIM_Write(0X7FF);                           //adcƵÂÊ1M Ê± ¼ÆËãʱ¼ä4ms
//    ADC_TRIM_Write(0X3FF);                           //adcƵÂÊ1M Ê± ¼ÆËãʱ¼ä2ms
//   ADC_TRIM_Write(0X1FF);                           //adcƵÂÊ1M Ê± ¼ÆËãʱ¼ä1ms
   ADC_CR_ACC_IE_Setable(DISABLE);                     //ÍⲿÀÛ¼ÓģʽÖжϽûÖ¹
   ADC_CR_EN_Setable(DISABLE);                        //ADC¹Ø±Õ
}
void ADC_Temp_Init(void)
{
   CDIF_CR_INTF_EN_Setable(ENABLE);                  //¿çµçÔ´Óò½Ó¿ÚʹÄÜ