| | |
| | | #include "define_all.h" |
| | | #include "define_all.h" |
| | | #include "gpio.h" |
| | | |
| | | #define RCLP_TRIM (uint8_t)(*(uint32_t *)0X1FFFFB20UL) |
| | | |
| | | //УÑé¼Ä´æÆ÷ |
| | | unsigned char CheckSysReg( __IO uint32_t *RegAddr, uint32_t Value ) |
| | | // УÑé¼Ä´æÆ÷ |
| | | unsigned char CheckSysReg(__IO uint32_t *RegAddr, uint32_t Value) |
| | | { |
| | | if( *RegAddr != Value ) |
| | | { |
| | | *RegAddr = Value; |
| | | return 1; |
| | | } |
| | | else |
| | | { |
| | | return 0; |
| | | } |
| | | if (*RegAddr != Value) |
| | | { |
| | | *RegAddr = Value; |
| | | return 1; |
| | | } |
| | | else |
| | | { |
| | | return 0; |
| | | } |
| | | } |
| | | |
| | | //²éѯNVIC¼Ä´æÆ÷¶ÔÓ¦ÏòÁ¿ºÅÖжÏÊÇ·ñ´ò¿ª |
| | | //1 ´ò¿ª |
| | | //0 ¹Ø±Õ |
| | | unsigned char CheckNvicIrqEn( IRQn_Type IRQn ) |
| | | // ²éѯNVIC¼Ä´æÆ÷¶ÔÓ¦ÏòÁ¿ºÅÖжÏÊÇ·ñ´ò¿ª |
| | | // 1 ´ò¿ª |
| | | // 0 ¹Ø±Õ |
| | | unsigned char CheckNvicIrqEn(IRQn_Type IRQn) |
| | | { |
| | | if( 0 == ( NVIC->ISER[0U] & ((uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)))) ) |
| | | return 0; |
| | | else |
| | | return 1; |
| | | if (0 == (NVIC->ISER[0U] & ((uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))))) |
| | | return 0; |
| | | else |
| | | return 1; |
| | | } |
| | | |
| | | |
| | | |
| | | void IWDT_Clr(void) |
| | | { |
| | | IWDT ->SERV =0x12345A5A; |
| | | IWDT->SERV = 0x12345A5A; |
| | | } |
| | | |
| | | void IWDT_Init(void) |
| | | { |
| | | CMU_PERCLK_SetableEx(IWDTCLK, ENABLE); |
| | | IWDT->CFGR = 0x06; //ÖÜÆÚ2S£¬ÐÝÃß2S |
| | | IWDT_Clr(); //Çåϵͳ¿´ÃŹ· |
| | | CMU_PERCLK_SetableEx(IWDTCLK, ENABLE); |
| | | IWDT->CFGR = 0x06; // ÖÜÆÚ2S£¬ÐÝÃß2S |
| | | IWDT_Clr(); // Çåϵͳ¿´ÃŹ· |
| | | } |
| | | |
| | | |
| | | //ϵͳʱÖÓÅäÖà |
| | | //ʹÓÃXTHF×öÖ÷ʱÖÓ,define_all.h ÖÐSYSCLKdefºê¿ØÖÆÏµÍ³Ê±ÖÓÆµÂÊ |
| | | // ϵͳʱÖÓÅäÖà |
| | | // ʹÓÃXTHF×öÖ÷ʱÖÓ,define_all.h ÖÐSYSCLKdefºê¿ØÖÆÏµÍ³Ê±ÖÓÆµÂÊ |
| | | void Init_SysClk(void) |
| | | { |
| | | uint32_t i=0; |
| | | CMU_SYSCLK_InitTypeDef SYSCLK_InitStruct; |
| | | |
| | | CMU_PERCLK_SetableEx(PADCLK, ENABLE); //PADʱÖÓ£¨GPIO£©Ê¹Äܺ¯Êý |
| | | AnalogIO(GPIOF,GPIO_Pin_1); //¸ù¾ÝÊÖ²á9.4¿É֪ʹÄÜXTHF֮ǰÐ轫PF1ºÍPF2ÉèÖÃΪģÄ⹦ÄÜ |
| | | AnalogIO(GPIOF,GPIO_Pin_2); |
| | | |
| | | //ʹÄÜXTHF |
| | | CMU_XTHFCR_XTHFEN_Setable(ENABLE); //ʹÄÜXTHF |
| | | CMU_XTHFCR_XTHF_CFG_Set(CMU_XTHFCR_XTHF_CFG_MAX); //Õñµ´Ç¿¶ÈÑ¡Ôñ×îÇ¿ |
| | | delay_ms(5);//ÆðÕñÐèҪʱ¼ä |
| | | |
| | | // /*ϵͳʱÖÓ³¬¹ý24MºóÐèÒª´ò¿ªwait*/ |
| | | // FLS_RDCR_WAIT_Set(FLS_RDCR_WAIT_2CYCLE); |
| | | // IWDT_Clr(); |
| | | CMU_IER_HFDET_IE_Setable(ENABLE); //Æô¶¯XTHFÍ£Õ𱨾¯ÖÐ¶Ï |
| | | //ϵͳʱÖÓÖ±½ÓʹÓÃXTHF |
| | | while(!CMU_ISR_HFDETO_Chk()) |
| | | { |
| | | if(i>=6400) //³¬Ê±Éè¼Æ£¬¸ù¾ÝÖ÷ʱÖÓÑ¡Ôñ²»Í¬Öµ£¬Àý³ÌÊÇ8M |
| | | { |
| | | break; |
| | | } |
| | | i++; |
| | | } |
| | | |
| | | |
| | | SYSCLK_InitStruct.SYSCLKSEL = CMU_SYSCLKCR_SYSCLKSEL_XTHF; //Ñ¡ÔñXTHF×öÖ÷ʱÖÓ£¨Íⲿ¸ßËÙ12Mhz£© |
| | | SYSCLK_InitStruct.AHBPRES = CMU_SYSCLKCR_AHBPRES_DIV1; //AHB²»·ÖƵ |
| | | SYSCLK_InitStruct.APBPRES = CMU_SYSCLKCR_APBPRES_DIV1; //APB1²»·ÖƵ |
| | | SYSCLK_InitStruct.SLP_ENEXTI = ENABLE;//ÐÝÃßģʽʹÄÜÍⲿÖжϲÉÑù |
| | | CMU_SysClk_Init(&SYSCLK_InitStruct); |
| | | delay_init(SYSCLOCK_U); |
| | | uint32_t i = 0; |
| | | CMU_SYSCLK_InitTypeDef SYSCLK_InitStruct; |
| | | |
| | | CMU_PERCLK_SetableEx(PADCLK, ENABLE); // PADʱÖÓ£¨GPIO£©Ê¹Äܺ¯Êý |
| | | AnalogIO(GPIOF, GPIO_Pin_1); // ¸ù¾ÝÊÖ²á9.4¿É֪ʹÄÜXTHF֮ǰÐ轫PF1ºÍPF2ÉèÖÃΪģÄ⹦ÄÜ |
| | | AnalogIO(GPIOF, GPIO_Pin_2); |
| | | |
| | | // ʹÄÜXTHF |
| | | CMU_XTHFCR_XTHFEN_Setable(ENABLE); // ʹÄÜXTHF |
| | | CMU_XTHFCR_XTHF_CFG_Set(CMU_XTHFCR_XTHF_CFG_MAX); // Õñµ´Ç¿¶ÈÑ¡Ôñ×îÇ¿ |
| | | delay_ms(5); // ÆðÕñÐèҪʱ¼ä |
| | | |
| | | // /*ϵͳʱÖÓ³¬¹ý24MºóÐèÒª´ò¿ªwait*/ |
| | | // FLS_RDCR_WAIT_Set(FLS_RDCR_WAIT_2CYCLE); |
| | | // IWDT_Clr(); |
| | | CMU_IER_HFDET_IE_Setable(ENABLE); // Æô¶¯XTHFÍ£Õ𱨾¯ÖÐ¶Ï |
| | | // ϵͳʱÖÓÖ±½ÓʹÓÃXTHF |
| | | while (!CMU_ISR_HFDETO_Chk()) |
| | | { |
| | | if (i >= 6400) // ³¬Ê±Éè¼Æ£¬¸ù¾ÝÖ÷ʱÖÓÑ¡Ôñ²»Í¬Öµ£¬Àý³ÌÊÇ8M |
| | | { |
| | | break; |
| | | } |
| | | i++; |
| | | } |
| | | |
| | | SYSCLK_InitStruct.SYSCLKSEL = CMU_SYSCLKCR_SYSCLKSEL_XTHF; // Ñ¡ÔñXTHF×öÖ÷ʱÖÓ£¨Íⲿ¸ßËÙ12Mhz£© |
| | | SYSCLK_InitStruct.AHBPRES = CMU_SYSCLKCR_AHBPRES_DIV1; // AHB²»·ÖƵ |
| | | SYSCLK_InitStruct.APBPRES = CMU_SYSCLKCR_APBPRES_DIV1; // APB1²»·ÖƵ |
| | | SYSCLK_InitStruct.SLP_ENEXTI = ENABLE; // ÐÝÃßģʽʹÄÜÍⲿÖжϲÉÑù |
| | | CMU_SysClk_Init(&SYSCLK_InitStruct); |
| | | delay_init(SYSCLOCK_U); |
| | | } |
| | | |
| | | void Init_RCHF(void) |
| | | { |
| | | CMU_RCHF_InitTypeDef RCHF_InitStruct; |
| | | CMU_RCHF_InitTypeDef RCHF_InitStruct; |
| | | |
| | | RCHF_InitStruct.FSEL = SYSCLKdef;//define_all.h ÖÐSYSCLKdefºê¿ØÖÆÏµÍ³Ê±ÖÓÆµÂÊ |
| | | RCHF_InitStruct.RCHFEN = ENABLE;//´ò¿ªRCHF |
| | | RCHF_InitStruct.FSEL = SYSCLKdef; // define_all.h ÖÐSYSCLKdefºê¿ØÖÆÏµÍ³Ê±ÖÓÆµÂÊ |
| | | RCHF_InitStruct.RCHFEN = ENABLE; // ´ò¿ªRCHF |
| | | |
| | | CMU_RCHF_Init(&RCHF_InitStruct); |
| | | CMU_RCHF_Init(&RCHF_InitStruct); |
| | | |
| | | CMU_Init_RCHF_Trim(clkmode);//RCHFÕñµ´Æ÷Ð£×¼ÖµÔØÈë(оƬ¸´Î»ºó×Ô¶¯ÔØÈë8MµÄУ׼ֵ)£¬Ö»Êǵ÷УRCHF³£Î¾«¶È |
| | | CMU_Init_RCHF_Trim(clkmode); // RCHFÕñµ´Æ÷Ð£×¼ÖµÔØÈë(оƬ¸´Î»ºó×Ô¶¯ÔØÈë8MµÄУ׼ֵ)£¬Ö»Êǵ÷УRCHF³£Î¾«¶È |
| | | } |
| | | |
| | | void Init_RCLP(void) |
| | | { |
| | | CDIF->CR = 0X0A; |
| | | VRTC->RCLPTR = RCLP_TRIM; |
| | | CDIF->CR = 0X05; |
| | | } |
| | | |
| | | void Init_SysClk_Gen( void ) //ʱÖÓÑ¡ÔñÏà¹Ø |
| | | { |
| | | /*ϵͳʱÖÓ³¬¹ý24MºóÐèÒª´ò¿ªwait*/ |
| | | if( RCHFCLKCFG > 24 ) |
| | | { |
| | | FLS_RDCR_WAIT_Set(FLS_RDCR_WAIT_1CYCLE); |
| | | if( RCHFCLKCFG > 48) |
| | | { |
| | | FLS_RDCR_WAIT_Set(FLS_RDCR_WAIT_2CYCLE); |
| | | } |
| | | } |
| | | else |
| | | { |
| | | FLS_RDCR_WAIT_Set(FLS_RDCR_WAIT_0CYCLE); |
| | | } |
| | | |
| | | Init_RCHF(); |
| | | Init_RCLP(); |
| | | /*ϵͳʱÖÓÅäÖÃ*/ |
| | | Init_SysClk(); |
| | | CDIF->CR = 0X0A; |
| | | VRTC->RCLPTR = RCLP_TRIM; |
| | | CDIF->CR = 0X05; |
| | | } |
| | | |
| | | void Init_SysClk_Gen(void) // ʱÖÓÑ¡ÔñÏà¹Ø |
| | | { |
| | | /*ϵͳʱÖÓ³¬¹ý24MºóÐèÒª´ò¿ªwait*/ |
| | | if (RCHFCLKCFG > 24) |
| | | { |
| | | FLS_RDCR_WAIT_Set(FLS_RDCR_WAIT_1CYCLE); |
| | | if (RCHFCLKCFG > 48) |
| | | { |
| | | FLS_RDCR_WAIT_Set(FLS_RDCR_WAIT_2CYCLE); |
| | | } |
| | | } |
| | | else |
| | | { |
| | | FLS_RDCR_WAIT_Set(FLS_RDCR_WAIT_0CYCLE); |
| | | } |
| | | |
| | | Init_RCHF(); |
| | | Init_RCLP(); |
| | | /*ϵͳʱÖÓÅäÖÃ*/ |
| | | Init_SysClk(); |
| | | } |
| | | |
| | | void CMU_IRQHandler(void) |
| | | { |
| | | uint8_t i = 0; |
| | | // uint8_t i = 0; |
| | | } |
| | | |
| | | void SysWakeUp_ClockCfg(void) |
| | | { |
| | | uint32_t i=0; |
| | | CMU_SYSCLK_InitTypeDef SYSCLK_InitStruct; |
| | | //ʹÄÜXTHF |
| | | CMU_XTHFCR_XTHFEN_Setable(ENABLE); //ʹÄÜXTHF |
| | | CMU_XTHFCR_XTHF_CFG_Set(CMU_XTHFCR_XTHF_CFG_MAX); //Õñµ´Ç¿¶ÈÑ¡Ôñ×îÇ¿ |
| | | delay_ms(3);//ÆðÕñÐèҪʱ¼ä |
| | | |
| | | // /*ϵͳʱÖÓ³¬¹ý24MºóÐèÒª´ò¿ªwait*/ |
| | | // FLS_RDCR_WAIT_Set(FLS_RDCR_WAIT_2CYCLE); |
| | | // IWDT_Clr(); |
| | | CMU_IER_HFDET_IE_Setable(ENABLE); //Æô¶¯XTHFÍ£Õ𱨾¯ÖÐ¶Ï |
| | | //ϵͳʱÖÓÖ±½ÓʹÓÃXTHF |
| | | while(!CMU_ISR_HFDETO_Chk()) |
| | | { |
| | | if(i>=6400) //³¬Ê±Éè¼Æ£¬¸ù¾ÝÖ÷ʱÖÓÑ¡Ôñ²»Í¬Öµ£¬Àý³ÌÊÇ8M |
| | | { |
| | | break; |
| | | } |
| | | i++; |
| | | } |
| | | |
| | | SYSCLK_InitStruct.SYSCLKSEL = CMU_SYSCLKCR_SYSCLKSEL_XTHF; //Ñ¡ÔñXTHF×öÖ÷ʱÖÓ£¨Íⲿ¸ßËÙ12Mhz£© |
| | | SYSCLK_InitStruct.AHBPRES = CMU_SYSCLKCR_AHBPRES_DIV1; //AHB²»·ÖƵ |
| | | SYSCLK_InitStruct.APBPRES = CMU_SYSCLKCR_APBPRES_DIV1; //APB1²»·ÖƵ |
| | | SYSCLK_InitStruct.SLP_ENEXTI = ENABLE;//ÐÝÃßģʽʹÄÜÍⲿÖжϲÉÑù |
| | | CMU_SysClk_Init(&SYSCLK_InitStruct); |
| | | delay_init(SYSCLOCK_U); |
| | | uint32_t i = 0; |
| | | CMU_SYSCLK_InitTypeDef SYSCLK_InitStruct; |
| | | // ʹÄÜXTHF |
| | | CMU_XTHFCR_XTHFEN_Setable(ENABLE); // ʹÄÜXTHF |
| | | CMU_XTHFCR_XTHF_CFG_Set(CMU_XTHFCR_XTHF_CFG_MAX); // Õñµ´Ç¿¶ÈÑ¡Ôñ×îÇ¿ |
| | | delay_ms(3); // ÆðÕñÐèҪʱ¼ä |
| | | |
| | | // /*ϵͳʱÖÓ³¬¹ý24MºóÐèÒª´ò¿ªwait*/ |
| | | // FLS_RDCR_WAIT_Set(FLS_RDCR_WAIT_2CYCLE); |
| | | // IWDT_Clr(); |
| | | CMU_IER_HFDET_IE_Setable(ENABLE); // Æô¶¯XTHFÍ£Õ𱨾¯ÖÐ¶Ï |
| | | // ϵͳʱÖÓÖ±½ÓʹÓÃXTHF |
| | | while (!CMU_ISR_HFDETO_Chk()) |
| | | { |
| | | if (i >= 6400) // ³¬Ê±Éè¼Æ£¬¸ù¾ÝÖ÷ʱÖÓÑ¡Ôñ²»Í¬Öµ£¬Àý³ÌÊÇ8M |
| | | { |
| | | break; |
| | | } |
| | | i++; |
| | | } |
| | | |
| | | SYSCLK_InitStruct.SYSCLKSEL = CMU_SYSCLKCR_SYSCLKSEL_XTHF; // Ñ¡ÔñXTHF×öÖ÷ʱÖÓ£¨Íⲿ¸ßËÙ12Mhz£© |
| | | SYSCLK_InitStruct.AHBPRES = CMU_SYSCLKCR_AHBPRES_DIV1; // AHB²»·ÖƵ |
| | | SYSCLK_InitStruct.APBPRES = CMU_SYSCLKCR_APBPRES_DIV1; // APB1²»·ÖƵ |
| | | SYSCLK_InitStruct.SLP_ENEXTI = ENABLE; // ÐÝÃßģʽʹÄÜÍⲿÖжϲÉÑù |
| | | CMU_SysClk_Init(&SYSCLK_InitStruct); |
| | | delay_init(SYSCLOCK_U); |
| | | } |