#include "uart.h"
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#include "gpio.h"
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#include "usmart.h"
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uint8_t RS485_read_data_recv_buff[RS485_READ_DATA_RECV_BUFF_LEN_MAX] = {0};
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uint8_t up_comm_recv_buff[UP_COMM_RECV_BUFF_LEN_MAX] = {0};
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uint8_t WRC_recv_buff[WRC_RECV_BUFF_LEN_MAX] = {0};
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UART_CTRL_PARA_T uart_ctrl_para_g = {
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.WRC_rxto_flag = RESET,
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.RS485_rxto_flag = RESET,
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.UP_COMM_rxto_flag = RESET,
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};
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u16 USART_RX_STA = 0; //½ÓÊÕ״̬±ê¼Ç
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//void Usmart_RecvDataProcess(UC_RECV_PARA_T *usmart_recv_para_p)
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//{
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// // USMARTͨѶ
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// if (usmart_recv_para_p->uc_recv_flag)
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// {
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// usmart_recv_para_p->uc_recv_flag = RESET;
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// //×îºóÁ½¸öÊý¾ÝҪΪ»Ø³µºÍ»»ÐÐ
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// if (usmart_recv_para_p->uc_recv_buf_union.uc_recv_buf[usmart_recv_para_p->uc_recv_length - 1] == 0x0A &&
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// usmart_recv_para_p->uc_recv_buf_union.uc_recv_buf[usmart_recv_para_p->uc_recv_length - 2] == 0x0D)
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// {
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// USART_RX_STA = 0xC000 | (usmart_recv_para_p->uc_recv_length - 2);
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// memcpy(USART1_RX_BUF, usmart_recv_para_p->uc_recv_buf_union.uc_recv_buf, usmart_recv_para_p->uc_recv_length);
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// usmart_dev.scan(); //Ö´ÐÐusmartɨÃè
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// memset(usmart_recv_para_p->uc_recv_buf_union.uc_recv_buf, 0, sizeof(usmart_recv_para_p->uc_recv_buf_union.uc_recv_buf));
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// }
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// else
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// {
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// usmart_recv_para_p->uc_recv_flag = SET;
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// USART_RX_STA = 0;
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// }
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// }
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//}
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//ÖØдÕâ¸öº¯Êý,Öض¨Ïòprintfº¯Êýµ½´®¿Ú£¬Òâ˼¾ÍÊÇ˵printfÖ±½ÓÊä³öµ½´®¿Ú£¬ÆäĬÈÏÊä³öµ½¿ØÖÆ̨µÄ
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/*fputc*/
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//int fputc(int c, FILE *f)
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//{
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// uint8_t ch;
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// ch = c;
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// UARTx_TXBUF_Write(UART0,ch);//·¢ËÍ´®¿Ú
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// while(RESET == UARTx_ISR_TXSE_Chk(UART0))
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// ; //µÈ´ý·¢ËÍÍê³É
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// return ch;
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//}
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//Öض¨Ïòscanfº¯Êýµ½´®¿Ú Òâ˼¾ÍÊÇ˵½ÓÊÜ´®¿Ú·¢¹ýÀ´µÄÊý¾Ý£¬ÆäĬÈÏÊǽÓÊÜ¿ØÖÆ̨µÄÊý¾Ý
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/*fgetc*/
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// int fgetc(FILE * F)
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//{
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// uint8_t ch_r;
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// HAL_UART_Receive (&huart4,&ch_r,1,0xffff);//½ÓÊÕ
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// return ch_r;
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// }
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/*DMAÖжϻص÷º¯Êý£¬º¯ÊýÃûÔÚstartup_xxxx.sÆô¶¯ÎļþÖÐÑ°ÕÒ*/
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void DMA_IRQHandler(void)
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{
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if((ENABLE == DMA_CHxCR_CHxFTIE_Getable(DMA_CH7))
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&&(SET == DMA_ISR_DMACHFT_Chk(DMA_CH7)))
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{
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//Çå³ýÖжϱêÖ¾
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DMA_ISR_DMACHFT_Clr(DMA_CH7);
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}
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}
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void UART1_IRQHandler(void)
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{
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//Ö»ÓÐuart0ºÍuart1ÓнÓÊÕ³¬Ê±ÖжÏ
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if(UARTx_ISR_RXTO_Chk(UART1) == SET){
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UARTx_ISR_RXTO_Clr(UART1);
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uart_ctrl_para_g.RS485_rxto_flag = SET;
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uart_ctrl_para_g.WRC_rxto_flag = SET;
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}
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}
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//void UART5_IRQHandler(void)
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//{
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// //Ö»ÓÐuart0ºÍuart1ÓнÓÊÕ³¬Ê±ÖжÏ
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// if(UARTx_ISR_RXTO_Chk(UART5) == SET){
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// UARTx_ISR_RXTO_Clr(UART5);
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// uart_ctrl_para_g.UP_COMM_rxto_flag = SET;
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// }
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//}
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void RS485_read_data_uart_Init(uint32_t BaudRate,UART_ParityBitTypeDef ParityBit,UART_StopBitTypeDef StopBit)
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{
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UART_SInitTypeDef UART_para;//UART³õʼ»¯½á¹¹Ìå
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CMU_ClocksType CMU_Clocks;//ϵͳ¸÷ʱÖÓƵÂʽṹÌå ÔÚ´ËÓë¼ÆË㲨ÌØÂÊÓйØ
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/*UART0 IO ÅäÖÃ*/
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CMU_PERCLK_SetableEx(PADCLK, ENABLE); //PADʱÖÓ£¨GPIO£©Ê¹Äܺ¯Êý
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AltFunIO(RS485_READ_DATA_TX_PORT, RS485_READ_DATA_TX_PIN, ALTFUN_NORMAL);
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AltFunIO(RS485_READ_DATA_RX_PORT, RS485_READ_DATA_RX_PIN, ALTFUN_NORMAL);
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//UART¹¤×÷ʱÖÓÔ´Ñ¡Ôñ Ö»ÓÐUART0¡¢1ÐèҪѡÔñ ÆäËûUART¶Ë¿ÚÔݲ»ÐèÒª Ö±½Ó×¢Êͼ´¿É
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if(RS485_READ_DATA_UARTX==UART0)
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UART_para.ClockSrc = CMU_OPCCR1_UART0CKS_APBCLK; //UART0¹¤×÷ʱÖÓÑ¡Ôñ
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else if(RS485_READ_DATA_UARTX==UART1)
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UART_para.ClockSrc = CMU_OPCCR1_UART1CKS_APBCLK; //UART1¹¤×÷ʱÖÓÑ¡Ôñ
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UART_para.BaudRate = BaudRate;
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UART_para.ParityBit = ParityBit; //ÆæżУÑé
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if(ParityBit==NONE)
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UART_para.DataBit = Eight8Bit; //Êý¾ÝλÊý
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else
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UART_para.DataBit = Nine9Bit; //Êý¾ÝλÊý
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UART_para.StopBit = StopBit; //ֹͣλ
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CMU_GetClocksFreq(&CMU_Clocks); //»ñȡϵͳ¸÷ʱÖÓƵÂÊ
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UART_SInit(RS485_READ_DATA_UARTX, &UART_para,&CMU_Clocks); //³õʼ»¯uart
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// UARTx_IER_RXBF_IE_Setable(RS485_READ_DATA_UARTX, ENABLE);//½ÓÊÕ»º´æÂúÖжÏʹÄÜ ÐèҪʹÓýÓÊÕÖжϴò¿ª´Ë´¦ÉèÖÃ
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// UARTx_IER_TXSE_IE_Setable(RS485_READ_DATA_UARTX, ENABLE)£»//·¢ËÍ»º´æ¿ÕÇÒ·¢ËÍÒÆλ¼Ä´æÆ÷¿ÕÖжÏʹÄÜ ÐèҪʹÓ÷¢ËÍÖжϴò¿ª´Ë´¦ÉèÖÃ
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NVIC_DisableIRQ(RS485_READ_DATA_UARTX_IRQn);
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UARTx_TODR_RXTO_LEN_Set(RS485_READ_DATA_UARTX, 255);//Ö»ÓÐuart0ºÍuart1ÓнÓÊÕ³¬Ê±ÖжÏ
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UARTx_ISR_RXTO_Clr(RS485_READ_DATA_UARTX);
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UARTx_IER_RXTO_IE_Setable(RS485_READ_DATA_UARTX, ENABLE);
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// NVIC_EnableIRQ(RS485_READ_DATA_UARTX_IRQn);
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UARTx_CSR_RXTOEN_Setable(RS485_READ_DATA_UARTX, ENABLE);
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/*NVICÖжÏÓÅÏȼ¶ÒÔ¼°ÊÇ·ñ´ò¿ªÖжÏÅäÖÃ*/
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// NVIC_DisableIRQ(RS485_READ_DATA_UARTX_IRQn);
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NVIC_SetPriority(RS485_READ_DATA_UARTX_IRQn,2);//ÖжÏÓÅÏȼ¶ÅäÖÃ
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NVIC_EnableIRQ(RS485_READ_DATA_UARTX_IRQn); //ÖжϷþÎñº¯Êý¿ª
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UARTx_CSR_RXEN_Setable(RS485_READ_DATA_UARTX, ENABLE); //´ò¿ª½ÓÊÕʹÄÜ
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UARTx_CSR_TXEN_Setable(RS485_READ_DATA_UARTX, ENABLE); //´ò¿ª·¢ËÍʹÄÜ
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UARTx_ISR_RXBF_Clr(RS485_READ_DATA_UARTX);
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}
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void RS485_read_data_RX_DMA_CH3_Init(void)
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{
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DMA_InitTypeDef DMA_InitStructure;//DMA³õʼ»¯²ÎÊý½á¹¹Ìå
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CMU_PERCLK_SetableEx(DMACLK, ENABLE);//DMAʱÖÓʹÄÜ
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DMA_GCR_DMAEN_Setable(ENABLE);//DMA×ÜʹÄÜ
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DMA_InitStructure.CHx = RS485_READ_DATA_DMA_CHX;//DMAͨµÀºÅÉèÖÃ
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DMA_InitStructure.CHxPRI = DMA_CHxCR_CHxPRI_HIGH;//ͨµÀÓÅÏȼ¶ÉèÖÃ
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DMA_InitStructure.CHxINC = DMA_CHxCR_CHxINC_INCREASE;//ͨµÀµØÖ·Ôö³¤·½Ïò
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DMA_InitStructure.CHxSSEL = DMA_CHxCR_CH3SSEL_UART1_RX;//ÍâÉèͨµÀÑ¡Ôñ
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DMA_InitStructure.CHxDIR = DMA_CHxCR_DIR_TO_RAM;//Êý¾Ý´«Êä·½ÏòÉèÖÃ
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DMA_InitStructure.CHxTSIZE = RS485_READ_DATA_RECV_BUFF_LEN_MAX - 1;//ͨµÀ´«Ê䳤¶È
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DMA_InitStructure.CHxRAMAD = (uint32)RS485_read_data_recv_buff;//Ä¿±êµØÖ·
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DMA_InitStructure.CHxBDW = DMA_CHxCR_BDW_8BITS;//ͨµÀ´«Êä´ø¿í
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DMA_InitStructure.CHxFTIE = DISABLE; //ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ
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DMA_InitStructure.CHxHTIE = DISABLE; //ͨµÀ´«Êä°ë³ÌÖÕ¶ËʹÄÜ
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DMA_InitStructure.CHxEN = ENABLE; //ͨµÀʹÄÜ
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NVIC_DisableIRQ(DMA_IRQn);
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// NVIC_SetPriority(DMA_IRQn,3);//ÖжÏÓÅÏȼ¶ÅäÖÃ
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// NVIC_EnableIRQ(DMA_IRQn);
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// DMA_CHxCR_CHxFTIE_Setable(MODBUS_DMA_RX_CHANNEL,ENABLE);//ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ
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DMA_ISR_DMACHFT_Clr(RS485_READ_DATA_DMA_CHX);
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DMA_Init(&DMA_InitStructure);//DMAÅäÖòÎÊýдÈë
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}
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void RS485_read_data_RX_DMA_CH3_reload(void)
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{
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DMA_ISR_DMACHFT_Clr(RS485_READ_DATA_DMA_CHX);
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DMA_CHxCR_ChxEN_Setable(RS485_READ_DATA_DMA_CHX, DISABLE); //ͨµÀʧÄÜ
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memset(RS485_read_data_recv_buff,0,sizeof(RS485_read_data_recv_buff));
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DMA_CHxMAR_Write(RS485_READ_DATA_DMA_CHX, (uint32)RS485_read_data_recv_buff);
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DMA_CHxCR_ChxEN_Setable(RS485_READ_DATA_DMA_CHX, ENABLE); //ͨµÀʹÄÜ
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}
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//ÉÏλ»ú½Ó¿Ú
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void up_comm_uart_Init(uint32_t BaudRate,UART_ParityBitTypeDef ParityBit,UART_StopBitTypeDef StopBit)
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{
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UART_SInitTypeDef UART_para;//UART³õʼ»¯½á¹¹Ìå
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CMU_ClocksType CMU_Clocks;//ϵͳ¸÷ʱÖÓƵÂʽṹÌå ÔÚ´ËÓë¼ÆË㲨ÌØÂÊÓйØ
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/*UART0 IO ÅäÖÃ*/
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CMU_PERCLK_SetableEx(PADCLK, ENABLE); //PADʱÖÓ£¨GPIO£©Ê¹Äܺ¯Êý
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AltFunIO(UP_COMM_TX_PORT, UP_COMM_TX_PIN, ALTFUN_NORMAL);
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AltFunIO(UP_COMM_RX_PORT, UP_COMM_RX_PIN, ALTFUN_NORMAL);
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OutputIO(UP_COMM_RE_PORT,UP_COMM_RE_PIN,OUT_PUSHPULL);
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UP_COMM_RE_RECV_EN;
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//UART¹¤×÷ʱÖÓÔ´Ñ¡Ôñ Ö»ÓÐUART0¡¢1ÐèҪѡÔñ ÆäËûUART¶Ë¿ÚÔݲ»ÐèÒª Ö±½Ó×¢Êͼ´¿É
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if(UP_COMM_UARTX==UART0)
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UART_para.ClockSrc = CMU_OPCCR1_UART0CKS_APBCLK; //UART0¹¤×÷ʱÖÓÑ¡Ôñ
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else if(UP_COMM_UARTX==UART1)
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UART_para.ClockSrc = CMU_OPCCR1_UART1CKS_APBCLK; //UART1¹¤×÷ʱÖÓÑ¡Ôñ
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UART_para.BaudRate = BaudRate;
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UART_para.ParityBit = ParityBit; //ÆæżУÑé
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if(ParityBit==NONE)
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UART_para.DataBit = Eight8Bit; //Êý¾ÝλÊý
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else
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UART_para.DataBit = Nine9Bit; //Êý¾ÝλÊý
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UART_para.StopBit = StopBit; //ֹͣλ
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CMU_GetClocksFreq(&CMU_Clocks); //»ñȡϵͳ¸÷ʱÖÓƵÂÊ
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UART_SInit(UP_COMM_UARTX, &UART_para,&CMU_Clocks); //³õʼ»¯uart
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// UARTx_IER_RXBF_IE_Setable(UP_COMM_UARTX, ENABLE);//½ÓÊÕ»º´æÂúÖжÏʹÄÜ ÐèҪʹÓýÓÊÕÖжϴò¿ª´Ë´¦ÉèÖÃ
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// UARTx_IER_TXSE_IE_Setable(UP_COMM_UARTX, ENABLE)£»//·¢ËÍ»º´æ¿ÕÇÒ·¢ËÍÒÆλ¼Ä´æÆ÷¿ÕÖжÏʹÄÜ ÐèҪʹÓ÷¢ËÍÖжϴò¿ª´Ë´¦ÉèÖÃ
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// NVIC_DisableIRQ(UP_COMM_UARTX_IRQn);
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// UARTx_TODR_RXTO_LEN_Set(UP_COMM_UARTX, 255);//Ö»ÓÐuart0ºÍuart1ÓнÓÊÕ³¬Ê±ÖжÏ
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// UARTx_ISR_RXTO_Clr(UP_COMM_UARTX);
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// UARTx_IER_RXTO_IE_Setable(UP_COMM_UARTX, ENABLE);
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//// NVIC_EnableIRQ(UP_COMM_UARTX_IRQn);
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// UARTx_CSR_RXTOEN_Setable(UP_COMM_UARTX, ENABLE);
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/*NVICÖжÏÓÅÏȼ¶ÒÔ¼°ÊÇ·ñ´ò¿ªÖжÏÅäÖÃ*/
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NVIC_DisableIRQ(UP_COMM_UARTX_IRQn);
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// NVIC_SetPriority(UP_COMM_UARTX_IRQn,4);//ÖжÏÓÅÏȼ¶ÅäÖÃ
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// NVIC_EnableIRQ(UP_COMM_UARTX_IRQn); //ÖжϷþÎñº¯Êý¿ª
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UARTx_CSR_RXEN_Setable(UP_COMM_UARTX, ENABLE); //´ò¿ª½ÓÊÕʹÄÜ
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UARTx_CSR_TXEN_Setable(UP_COMM_UARTX, ENABLE); //´ò¿ª·¢ËÍʹÄÜ
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UARTx_ISR_RXBF_Clr(UP_COMM_UARTX);
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}
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void up_comm_RX_DMA_CH2_Init(void)
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{
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DMA_InitTypeDef DMA_InitStructure;//DMA³õʼ»¯²ÎÊý½á¹¹Ìå
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CMU_PERCLK_SetableEx(DMACLK, ENABLE);//DMAʱÖÓʹÄÜ
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DMA_GCR_DMAEN_Setable(ENABLE);//DMA×ÜʹÄÜ
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DMA_InitStructure.CHx = UP_COMM_DMA_CHX;//DMAͨµÀºÅÉèÖÃ
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DMA_InitStructure.CHxPRI = DMA_CHxCR_CHxPRI_HIGH;//ͨµÀÓÅÏȼ¶ÉèÖÃ
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DMA_InitStructure.CHxINC = DMA_CHxCR_CHxINC_INCREASE;//ͨµÀµØÖ·Ôö³¤·½Ïò
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DMA_InitStructure.CHxSSEL = DMA_CHxCR_CH2SSEL_UART5_RX;//ÍâÉèͨµÀÑ¡Ôñ
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DMA_InitStructure.CHxDIR = DMA_CHxCR_DIR_TO_RAM;//Êý¾Ý´«Êä·½ÏòÉèÖÃ
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DMA_InitStructure.CHxTSIZE = UP_COMM_RECV_BUFF_LEN_MAX - 1;//ͨµÀ´«Ê䳤¶È
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DMA_InitStructure.CHxRAMAD = (uint32)up_comm_recv_buff;//Ä¿±êµØÖ·
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DMA_InitStructure.CHxBDW = DMA_CHxCR_BDW_8BITS;//ͨµÀ´«Êä´ø¿í
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DMA_InitStructure.CHxFTIE = DISABLE; //ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ
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DMA_InitStructure.CHxHTIE = DISABLE; //ͨµÀ´«Êä°ë³ÌÖÕ¶ËʹÄÜ
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DMA_InitStructure.CHxEN = ENABLE; //ͨµÀʹÄÜ
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NVIC_DisableIRQ(DMA_IRQn);
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// NVIC_SetPriority(DMA_IRQn,3);//ÖжÏÓÅÏȼ¶ÅäÖÃ
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// NVIC_EnableIRQ(DMA_IRQn);
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// DMA_CHxCR_CHxFTIE_Setable(MODBUS_DMA_RX_CHANNEL,ENABLE);//ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ
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DMA_ISR_DMACHFT_Clr(UP_COMM_DMA_CHX);
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DMA_Init(&DMA_InitStructure);//DMAÅäÖòÎÊýдÈë
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}
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void up_comm_RX_DMA_CH2_reload(void)
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{
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DMA_ISR_DMACHFT_Clr(UP_COMM_DMA_CHX);
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DMA_CHxCR_ChxEN_Setable(UP_COMM_DMA_CHX, DISABLE); //ͨµÀʧÄÜ
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memset(up_comm_recv_buff,0,sizeof(up_comm_recv_buff));
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DMA_CHxMAR_Write(UP_COMM_DMA_CHX, (uint32)up_comm_recv_buff);
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DMA_CHxCR_ChxEN_Setable(UP_COMM_DMA_CHX, ENABLE); //ͨµÀʹÄÜ
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}
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void WRC_uart_Init(uint32_t BaudRate,UART_ParityBitTypeDef ParityBit,UART_StopBitTypeDef StopBit)
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{
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UART_SInitTypeDef UART_para;//UART³õʼ»¯½á¹¹Ìå
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CMU_ClocksType CMU_Clocks;//ϵͳ¸÷ʱÖÓƵÂʽṹÌå ÔÚ´ËÓë¼ÆË㲨ÌØÂÊÓйØ
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/*UART0 IO ÅäÖÃ*/
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CMU_PERCLK_SetableEx(PADCLK, ENABLE); //PADʱÖÓ£¨GPIO£©Ê¹Äܺ¯Êý
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AltFunIO(WRC_TX_PORT, WRC_TX_PIN, ALTFUN_NORMAL);
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AltFunIO(WRC_RX_PORT, WRC_RX_PIN, ALTFUN_NORMAL);
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//UART¹¤×÷ʱÖÓÔ´Ñ¡Ôñ Ö»ÓÐUART0¡¢1ÐèҪѡÔñ ÆäËûUART¶Ë¿ÚÔݲ»ÐèÒª Ö±½Ó×¢Êͼ´¿É
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if(WRC_UARTX==UART0)
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UART_para.ClockSrc = CMU_OPCCR1_UART0CKS_APBCLK; //UART0¹¤×÷ʱÖÓÑ¡Ôñ
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else if(WRC_UARTX==UART1)
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UART_para.ClockSrc = CMU_OPCCR1_UART1CKS_APBCLK; //UART1¹¤×÷ʱÖÓÑ¡Ôñ
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UART_para.BaudRate = BaudRate;
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UART_para.ParityBit = ParityBit; //ÆæżУÑé
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if(ParityBit==NONE)
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UART_para.DataBit = Eight8Bit; //Êý¾ÝλÊý
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else
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UART_para.DataBit = Nine9Bit; //Êý¾ÝλÊý
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UART_para.StopBit = StopBit; //ֹͣλ
|
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CMU_GetClocksFreq(&CMU_Clocks); //»ñȡϵͳ¸÷ʱÖÓƵÂÊ
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UART_SInit(WRC_UARTX, &UART_para,&CMU_Clocks); //³õʼ»¯uart
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// UARTx_IER_RXBF_IE_Setable(WRC_UARTX, ENABLE);//½ÓÊÕ»º´æÂúÖжÏʹÄÜ ÐèҪʹÓýÓÊÕÖжϴò¿ª´Ë´¦ÉèÖÃ
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// UARTx_IER_TXSE_IE_Setable(WRC_UARTX, ENABLE)£»//·¢ËÍ»º´æ¿ÕÇÒ·¢ËÍÒÆλ¼Ä´æÆ÷¿ÕÖжÏʹÄÜ ÐèҪʹÓ÷¢ËÍÖжϴò¿ª´Ë´¦ÉèÖÃ
|
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NVIC_DisableIRQ(WRC_UARTX_IRQn);
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UARTx_TODR_RXTO_LEN_Set(WRC_UARTX, 255);//Ö»ÓÐuart0ºÍuart1ÓнÓÊÕ³¬Ê±ÖжÏ
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UARTx_ISR_RXTO_Clr(WRC_UARTX);
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UARTx_IER_RXTO_IE_Setable(WRC_UARTX, ENABLE);
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// NVIC_EnableIRQ(WRC_UARTX_IRQn);
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UARTx_CSR_RXTOEN_Setable(WRC_UARTX, ENABLE);
|
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/*NVICÖжÏÓÅÏȼ¶ÒÔ¼°ÊÇ·ñ´ò¿ªÖжÏÅäÖÃ*/
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// NVIC_DisableIRQ(WRC_UARTX_IRQn);
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NVIC_SetPriority(WRC_UARTX_IRQn,2);//ÖжÏÓÅÏȼ¶ÅäÖÃ
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NVIC_EnableIRQ(WRC_UARTX_IRQn); //ÖжϷþÎñº¯Êý¿ª
|
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UARTx_CSR_RXEN_Setable(WRC_UARTX, ENABLE); //´ò¿ª½ÓÊÕʹÄÜ
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UARTx_CSR_TXEN_Setable(WRC_UARTX, ENABLE); //´ò¿ª·¢ËÍʹÄÜ
|
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UARTx_ISR_RXBF_Clr(WRC_UARTX);
|
}
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|
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void WRC_RX_DMA_CH3_Init(void)
|
{
|
DMA_InitTypeDef DMA_InitStructure;//DMA³õʼ»¯²ÎÊý½á¹¹Ìå
|
|
CMU_PERCLK_SetableEx(DMACLK, ENABLE);//DMAʱÖÓʹÄÜ
|
DMA_GCR_DMAEN_Setable(ENABLE);//DMA×ÜʹÄÜ
|
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DMA_InitStructure.CHx = WRC_DMA_CHX;//DMAͨµÀºÅÉèÖÃ
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DMA_InitStructure.CHxPRI = DMA_CHxCR_CHxPRI_HIGH;//ͨµÀÓÅÏȼ¶ÉèÖÃ
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DMA_InitStructure.CHxINC = DMA_CHxCR_CHxINC_INCREASE;//ͨµÀµØÖ·Ôö³¤·½Ïò
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DMA_InitStructure.CHxSSEL = DMA_CHxCR_CH3SSEL_UART1_RX;//ÍâÉèͨµÀÑ¡Ôñ
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DMA_InitStructure.CHxDIR = DMA_CHxCR_DIR_TO_RAM;//Êý¾Ý´«Êä·½ÏòÉèÖÃ
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DMA_InitStructure.CHxTSIZE = WRC_RECV_BUFF_LEN_MAX - 1;//ͨµÀ´«Ê䳤¶È
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DMA_InitStructure.CHxRAMAD = (uint32)WRC_recv_buff;//Ä¿±êµØÖ·
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DMA_InitStructure.CHxBDW = DMA_CHxCR_BDW_8BITS;//ͨµÀ´«Êä´ø¿í
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DMA_InitStructure.CHxFTIE = DISABLE; //ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ
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DMA_InitStructure.CHxHTIE = DISABLE; //ͨµÀ´«Êä°ë³ÌÖÕ¶ËʹÄÜ
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DMA_InitStructure.CHxEN = ENABLE; //ͨµÀʹÄÜ
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NVIC_DisableIRQ(DMA_IRQn);
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// NVIC_SetPriority(DMA_IRQn,3);//ÖжÏÓÅÏȼ¶ÅäÖÃ
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// NVIC_EnableIRQ(DMA_IRQn);
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// DMA_CHxCR_CHxFTIE_Setable(MODBUS_DMA_RX_CHANNEL,ENABLE);//ͨµÀ´«ÊäÍê³ÉÖжÏʹÄÜ
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DMA_ISR_DMACHFT_Clr(WRC_DMA_CHX);
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DMA_Init(&DMA_InitStructure);//DMAÅäÖòÎÊýдÈë
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}
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void WRC_RX_DMA_CH3_reload(void)
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{
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DMA_ISR_DMACHFT_Clr(WRC_DMA_CHX);
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DMA_CHxCR_ChxEN_Setable(WRC_DMA_CHX, DISABLE); //ͨµÀʧÄÜ
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memset(WRC_recv_buff,0,sizeof(WRC_recv_buff));
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DMA_CHxMAR_Write(WRC_DMA_CHX, (uint32)WRC_recv_buff);
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DMA_CHxCR_ChxEN_Setable(WRC_DMA_CHX, ENABLE); //ͨµÀʹÄÜ
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}
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/*ÆÕͨ£¨×èÈûʽ£©·¢ËÍÊý¾Ý*/
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void UARTx_SendData_Normal(UART_Type* UARTx,uint8_t * pSendData,uint16_t send_len)
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{
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for(uint16_t i= 0; i < send_len; i++)
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{
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UARTx_TXBUF_Write(UARTx, pSendData[i]); //½«·¢ËÍÊý¾ÝдÈë·¢ËͼĴæÆ÷
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while(RESET == UARTx_ISR_TXSE_Chk(UARTx)); //µÈ´ý·¢ËÍÍê³É
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}
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}
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void UARTx_SendData_IT(void)
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{
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}
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void UARTx_SendData_DMA(void)
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{
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}
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