/**
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******************************************************************************
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* @file fm33a0xxev_bt.h
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* @author FM33A0XXEV Application Team
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* @version V1.0.0
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* @date 16-April-2020
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* @brief This file contains all the functions prototypes for the BT firmware library.
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __FM33A0XXEV_BT_H
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#define __FM33A0XXEV_BT_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "FM33A0XXEV.h"
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#define BTx_CR1_CHEN_Pos 7 /* ¸ß8λ¼ÆÊýÆ÷£¨BT1H»òBT2H£©Æô¶¯¿ØÖÆ */
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#define BTx_CR1_CHEN_Msk (0x1U << BTx_CR1_CHEN_Pos)
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#define BTx_CR1_CLEN_Pos 6 /* µÍ8λ¼ÆÊýÆ÷£¨BT1L»òBT2L£©Æô¶¯¿ØÖÆ
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(Counter-Lowend enable)
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1£ºÆô¶¯µÍ8bit¼ÆÊýÆ÷£¬ÔÚ¼ÆÊýÆ÷ģʽÏÂÆô¶¯Ê±½«Ô¤ÖÃÊýÖµºÍ¼ÓÔØÖµ·Ö±ð¼ÓÔØÖÁ¼ÆÊýÆ÷ºÍ±È½Ï¼Ä´æÆ÷£»²¶×½Ä£Ê½ÏÂÆô¶¯Ê±¼ÆÊýÆ÷ÓÉÁ㿪ʼ×ÔÓɼÆÊý£¬¼ÆÊýµ½0xFFFFºó²úÉúÒç³öÐźÅÈ»ºóÓÉÁ㿪ʼÖØмÆÊý£¬²¶×½¹¦ÄÜÖ»¹¤×÷ÔÚ16λģʽ£»ÔÚ16λµÄ¶¨Ê±/¼ÆÊýºÍ²¶×½Ä£Ê½ÏÂCHEN×÷Ϊ¼ÆÊýÆ÷µÄÆô¶¯¿ØÖÆ£¬CLEN×Ô¶¯Ê§Ð§
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0£ºÍ£Ö¹µÍ8bit¼ÆÊýÆ÷¼ÆÊý */
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#define BTx_CR1_CLEN_Msk (0x1U << BTx_CR1_CLEN_Pos)
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/* Æô¶¯µÍ8bit¼ÆÊýÆ÷£¬ÔÚ¼ÆÊýÆ÷ģʽÏÂÆô¶¯Ê±½«Ô¤ÖÃÊýÖµºÍ¼ÓÔØÖµ·Ö±ð¼ÓÔØÖÁ¼ÆÊýÆ÷ºÍ±È½Ï¼Ä´æÆ÷£»²¶×½Ä£Ê½ÏÂÆô¶¯Ê±¼ÆÊýÆ÷ÓÉÁ㿪ʼ×ÔÓɼÆÊý£¬¼ÆÊýµ½0xFFFFºó²úÉúÒç³öÐźÅÈ»ºóÓÉÁ㿪ʼÖØмÆÊý£¬²¶×½¹¦ÄÜÖ»¹¤×÷ÔÚ16λģʽ£»ÔÚ16λµÄ¶¨Ê±/¼ÆÊýºÍ²¶×½Ä£Ê½ÏÂCHEN×÷Ϊ¼ÆÊýÆ÷µÄÆô¶¯¿ØÖÆ£¬CLEN×Ô¶¯Ê§Ð§ */
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/* Í£Ö¹µÍ8bit¼ÆÊýÆ÷¼ÆÊý */
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#define BTx_CR1_MODE_Pos 5 /* ¹¤×÷ģʽѡÔñ (work mode)
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1£º16λ²¶×½Ä£Ê½
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0£º8λ¶¨Ê±/¼ÆÊýģʽ£¬Èô¸ßλ¼ÆÊýÆ÷¼ÆÊýÔ´Ñ¡ÔñΪµÍλ¼ÆÊýÆ÷µÄÒç³öÐźţ¬Ôò¿ÉʵÏÖ16λ¶¨Ê±/¼ÆÊýģʽ */
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#define BTx_CR1_MODE_Msk (0x1U << BTx_CR1_MODE_Pos)
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#define BTx_CR1_MODE_CAPTURE (0x1U << BTx_CR1_MODE_Pos) /* 16λ²¶×½Ä£Ê½ */
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#define BTx_CR1_MODE_COUNTER (0x0U << BTx_CR1_MODE_Pos) /* 8λ¶¨Ê±/¼ÆÊýģʽ£¬Èô¸ßλ¼ÆÊýÆ÷¼ÆÊýÔ´Ñ¡ÔñΪµÍλ¼ÆÊýÆ÷µÄÒç³öÐźţ¬Ôò¿ÉʵÏÖ16λ¶¨Ê±/¼ÆÊýģʽ */
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#define BTx_CR1_EDGESEL_Pos 4 /* ¼ÆÊýģʽϵļÆÊýÑغÍÖÜÆÚ²¶×½Ê±µÄ²¶×½ÑØÑ¡Ôñλ (edge select)
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1£º¼ÆÊýģʽ²ÉÑù¼ÆÊýԴϽµÑØ£¬ÖÜÆÚ²¶×½Ä£Ê½Ê±ÏÂÑز¶×½
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0£º¼ÆÊýģʽ²ÉÑù¼ÆÊýÔ´ÉÏÉýÑØ£¬ÖÜÆÚ²¶×½Ä£Ê½Ê±ÉÏÑز¶×½
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×¢£º²»Ö§³ÖϵͳʱÖÓµÄϽµÑؼÆÊý£¬²¶×½Ô´ºÍ¼ÆÊýԴΪϵͳʱÖÓʱѡÔñϽµÑؽ«²»»áÓÐЧ¼ÆÊý¡£ */
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#define BTx_CR1_EDGESEL_Msk (0x1U << BTx_CR1_EDGESEL_Pos)
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#define BTx_CR1_EDGESEL_FALLING (0x1U << BTx_CR1_EDGESEL_Pos) /* ¼ÆÊýģʽ²ÉÑù¼ÆÊýԴϽµÑØ£¬ÖÜÆÚ²¶×½Ä£Ê½Ê±ÏÂÑز¶×½ */
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#define BTx_CR1_EDGESEL_RISING (0x0U << BTx_CR1_EDGESEL_Pos) /* ¼ÆÊýģʽ²ÉÑù¼ÆÊýÔ´ÉÏÉýÑØ£¬ÖÜÆÚ²¶×½Ä£Ê½Ê±ÉÏÑز¶×½ */
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#define BTx_CR1_CAPMOD_Pos 3 /* ²¶×½Ä£Ê½¿ØÖÆ£¨Ö»ÔÚ²¶×½Ä£Ê½ÏÂÓÐЧ£©(capture mode)
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1£ºÂö³å¿í¶È²¶×½
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0£ºÂö³åÖÜÆÚ²¶×½ */
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#define BTx_CR1_CAPMOD_Msk (0x1U << BTx_CR1_CAPMOD_Pos)
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#define BTx_CR1_CAPMOD_PULSE (0x1U << BTx_CR1_CAPMOD_Pos) /* Âö³å¿í¶È²¶×½ */
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#define BTx_CR1_CAPMOD_CYCLE (0x0U << BTx_CR1_CAPMOD_Pos) /* Âö³åÖÜÆÚ²¶×½ */
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#define BTx_CR1_CAPCLR_Pos 2 /* ´øÇåÁ㲶׽ģʽ¿ØÖÆ (capture clear)
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1£º²»ÂÛÔÚÂö³å¿í¶È»¹ÊÇÖÜÆÚ²¶×½Çé¿öÏ£¬²¶×½µ½µÚÒ»¸öÑغ󽫼ÆÊýÆ÷ÇåÁã²úÉúÖжϣ¬²¶×½µ½µÚ¶þ¸öÑغóËø´æ£¨Ëø´æµ½¸ßµÍλԤÖÃÊý¼Ä´æÆ÷£©¼ÆÊýÖµ²¢Í¬Ê±ÇåÁã¼ÆÊýÆ÷
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0£º²¶×½²»ÇåÁ㣬¼ÆÊýÆ÷Ò»Ö±×ÔÓɼÆÊý */
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#define BTx_CR1_CAPCLR_Msk (0x1U << BTx_CR1_CAPCLR_Pos)
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/* ²»ÂÛÔÚÂö³å¿í¶È»¹ÊÇÖÜÆÚ²¶×½Çé¿öÏ£¬²¶×½µ½µÚÒ»¸öÑغ󽫼ÆÊýÆ÷ÇåÁã²úÉúÖжϣ¬²¶×½µ½µÚ¶þ¸öÑغóËø´æ£¨Ëø´æµ½¸ßµÍλԤÖÃÊý¼Ä´æÆ÷£©¼ÆÊýÖµ²¢Í¬Ê±ÇåÁã¼ÆÊýÆ÷ */
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/* ²¶×½²»ÇåÁ㣬¼ÆÊýÆ÷Ò»Ö±×ÔÓɼÆÊý */
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#define BTx_CR1_CAPONCE_Pos 1 /* µ¥´Î²¶×½¿ØÖÆ (capture once)
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1£ºµ¥´Î²¶×½ÓÐЧ£¬ÔÚ²¶×½µ½Ò»´ÎÂö³å¿í¶È»òÂö³åÖÜÆÚºó¼ÆÊýÆ÷Í£Ö¹£¬ÈôÐèÒªÔٴβ¶×½ÐèÖØÐÂÆô¶¯
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0£ºÁ¬Ðø²¶×½ */
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#define BTx_CR1_CAPONCE_Msk (0x1U << BTx_CR1_CAPONCE_Pos)
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#define BTx_CR1_CAPONCE_SINGLE (0x1U << BTx_CR1_CAPONCE_Pos) /* µ¥´Î²¶×½ÓÐЧ£¬ÔÚ²¶×½µ½Ò»´ÎÂö³å¿í¶È»òÂö³åÖÜÆÚºó¼ÆÊýÆ÷Í£Ö¹£¬ÈôÐèÒªÔٴβ¶×½ÐèÖØÐÂÆô¶¯ */
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#define BTx_CR1_CAPONCE_CONTINUE (0x0U << BTx_CR1_CAPONCE_Pos) /* Á¬Ðø²¶×½ */
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#define BTx_CR1_PWM_Pos 0 /* PWMģʽÊä³ö (pulse width modulation)
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1£ºPWMÊä³öʹÄÜ
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0£ºPWM Êä³ö²»Ê¹ÄÜ */
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#define BTx_CR1_PWM_Msk (0x1U << BTx_CR1_PWM_Pos)
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/* PWMÊä³öʹÄÜ */
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/* PWM Êä³ö²»Ê¹ÄÜ */
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#define BTx_CR2_SIG2SEL_Pos 7 /* ¼ÆÊýÆ÷ÄÚ²¿¼ÆÊýÔ´ÐźÅÑ¡Ôñ (signal group2 select)
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1£ºÄÚ²¿¼ÆÊýÔ´ÐźÅÑ¡ÔñGroup2
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0£ºÄÚ²¿¼ÆÊýÔ´ÐźÅÑ¡ÔñGroup1 */
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#define BTx_CR2_SIG2SEL_Msk (0x1U << BTx_CR2_SIG2SEL_Pos)
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#define BTx_CR2_SIG2SEL_GROUP2 (0x1U << BTx_CR2_SIG2SEL_Pos) /* ÄÚ²¿¼ÆÊýÔ´ÐźÅÑ¡ÔñGroup2 */
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#define BTx_CR2_SIG2SEL_GROUP1 (0x0U << BTx_CR2_SIG2SEL_Pos) /* ÄÚ²¿¼ÆÊýÔ´ÐźÅÑ¡ÔñGroup1 */
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#define BTx_CR2_SIG1SEL_Pos 6 /* ¼ÆÊýÆ÷ÄÚ²¿²¶×½Ô´ÐźÅÑ¡Ôñ (signal group1 select)
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1£ºÄÚ²¿²¶×½Ô´ÐźÅÑ¡ÔñGroup1
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0£ºÄÚ²¿²¶×½Ô´ÐźÅÑ¡ÔñGroup2 */
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#define BTx_CR2_SIG1SEL_Msk (0x1U << BTx_CR2_SIG1SEL_Pos)
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#define BTx_CR2_SIG1SEL_GROUP1 (0x1U << BTx_CR2_SIG1SEL_Pos) /* ÄÚ²¿²¶×½Ô´ÐźÅÑ¡ÔñGroup1 */
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#define BTx_CR2_SIG1SEL_GROUP2 (0x0U << BTx_CR2_SIG1SEL_Pos) /* ÄÚ²¿²¶×½Ô´ÐźÅÑ¡ÔñGroup2 */
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#define BTx_CR2_CNTHSEL_Pos 4 /* ¸ß8λ¼ÆÊýÆ÷¼ÆÊýÔ´Ñ¡Ôñ (Counter Highend source select)
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00/11£ºÑ¡ÔñET1µÄµÍλ¼ÆÊýÆ÷µÄÒç³öÐźţ¬ÓëµÍλ¼ÆÊýÆ÷×é³É16λ¼ÆÊýÆ÷
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01£ºÑ¡ÔñÄÚ²¿²¶×½Ô´ÐźÅ
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10£ºÑ¡ÔñÄÚ²¿¼ÆÊýÔ´ÐźŻòÍⲿDIRÊäÈë×éºÏÐźŠ*/
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#define BTx_CR2_CNTHSEL_Msk (0x3U << BTx_CR2_CNTHSEL_Pos)
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#define BTx_CR2_CNTHSEL_COUNTER (0x0U << BTx_CR2_CNTHSEL_Pos) /* Ñ¡ÔñET1µÄµÍλ¼ÆÊýÆ÷µÄÒç³öÐźţ¬ÓëµÍλ¼ÆÊýÆ÷×é³É16λ¼ÆÊýÆ÷ */
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#define BTx_CR2_CNTHSEL_CAPTURE (0x1U << BTx_CR2_CNTHSEL_Pos) /* Ñ¡ÔñÄÚ²¿²¶×½Ô´ÐźŠ*/
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#define BTx_CR2_CNTHSEL_INNER (0x2U << BTx_CR2_CNTHSEL_Pos) /* Ñ¡ÔñÄÚ²¿¼ÆÊýÔ´ÐźŻòÍⲿDIRÊäÈë×éºÏÐźŠ*/
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#define BTx_CR2_DIREN_Pos 3 /* ÍⲿÊäÈëDIR¿ØÖÆʹÄÜ¡£Í¨³£µçÁ¿Âö³åÊä³öʱͬʱ»áÊä³öÒ»¸öÓɸߵ͵çƽָʾÕý·´ÏòµÄ·½ÏòÐźÅDIR¡£µç·½«Í¨¹ýDIRÐźŵçƽµÄ¸ßµÍ£¬·Ö±ð¿ØÖƸßλ¼ÆÊýÆ÷ºÍµÍλ¼ÆÊýÆ÷¼ÆÊýʹÄÜ£¬ÒÔʵÏÖÕë¶ÔÕýÏò¡¢·´ÏòÂö³åµÄ¸÷ÖÖ¼ÆÊý¹¦ÄÜ (direction bit enable)
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1£ºÍⲿÊäÈëµÄDIRÐźÅÓÐЧ£¬´Ëʱ¸ßµÍλ¼ÆÊýÆ÷ÊÇ·ñ¼ÆÊý¿ÉÓÉÍⲿÊäÈëµÄDIRÐźſØÖÆ¡£
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0£ºÍⲿÊäÈëµÄDIRÐźÅÎÞЧ£¬´Ëʱ¸ßµÍλ¼ÆÊýÆ÷ÊÇ·ñ¼ÆÊý½«ÓÉÄÚ²¿¿ØÖÆÐźſØÖÆ¡£ */
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#define BTx_CR2_DIREN_Msk (0x1U << BTx_CR2_DIREN_Pos)
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/* ÍⲿÊäÈëµÄDIRÐźÅÓÐЧ£¬´Ëʱ¸ßµÍλ¼ÆÊýÆ÷ÊÇ·ñ¼ÆÊý¿ÉÓÉÍⲿÊäÈëµÄDIRÐźſØÖÆ¡£ */
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/* ÍⲿÊäÈëµÄDIRÐźÅÎÞЧ£¬´Ëʱ¸ßµÍλ¼ÆÊýÆ÷ÊÇ·ñ¼ÆÊý½«ÓÉÄÚ²¿¿ØÖÆÐźſØÖÆ¡£ */
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#define BTx_CR2_STDIR_Pos 2 /* ÄÚ²¿DIR¿ØÖÆÐźţ¬µ±DIRENΪ0£¬¼´ÍⲿÊäÈëDIR¿ØÖÆÎÞЧʱ£¬¿ÉÓɸÃÐźŴúÌæDIRÊäÈ룬ֱ½Ó¿ØÖÆÄÚ²¿¼ÆÊýÆ÷µÄ¼ÆÊý¡£µ±ÐèÒªÍⲿDIRÊäÈ룬¼´DIRENΪ1ʱ£¬¸ÃλӦÉèÖÃΪ0 (set direction)
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1£ºÄÚ²¿DIRÐźÅΪ¸ßµçƽ£¬Ôò¸ß8λ¼ÆÊýÆ÷¼ÆÊý */
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#define BTx_CR2_STDIR_Msk (0x1U << BTx_CR2_STDIR_Pos)
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/* ÄÚ²¿DIRÐźÅΪ¸ßµçƽ£¬Ôò¸ß8λ¼ÆÊýÆ÷¼ÆÊý */
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#define BTx_CR2_SRCSEL_Pos 1 /* µÍλ¼ÆÊýÆ÷¼ÆÊýʹÄÜ¿ØÖÆÑ¡ÔñÐźŠ(source select)
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1µÍλ¼ÆÊýÆ÷¼ÆÊýʹÄܶËÑ¡Ôò³£Ê¹ÄÜ¡£´ËʱµÍλ¼ÆÊýÆ÷¼ÆÊý²»ÊÜDIR¿ØÖÆ£¬¿É½«Õý·´ÏòËùÓÐÂö³åÒ»²¢¼ÆÊý
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0£ºµÍλ¼ÆÊýÆ÷¼ÆÊýʹÄܶËÑ¡ÔòÓɼĴæÆ÷STDIR»òÍⲿEX_SIG2ÊäÈë¿ØÖÆ¡£ */
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#define BTx_CR2_SRCSEL_Msk (0x1U << BTx_CR2_SRCSEL_Pos)
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/* µÍλ¼ÆÊýÆ÷¼ÆÊýʹÄܶËÑ¡ÔòÓɼĴæÆ÷STDIR»òÍⲿEX_SIG2ÊäÈë¿ØÖÆ¡£ */
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#define BTx_CR2_DIRPO_Pos 0 /* ÊäÈëÐźÅ2¼«ÐÔÑ¡Ôñ (direction polarity)
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1£º¶ÔÍⲿÊäÈëDIRÐźÅEX_SIG2·´Ïò
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0£º¶ÔÍⲿÊäÈëDIRÐźÅEX_SIG2²»·´Ïò */
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#define BTx_CR2_DIRPO_Msk (0x1U << BTx_CR2_DIRPO_Pos)
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#define BTx_CR2_DIRPO_REVERSE (0x1U << BTx_CR2_DIRPO_Pos) /* ¶ÔÍⲿÊäÈëDIRÐźÅEX_SIG2·´Ïò */
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#define BTx_CR2_DIRPO_NON (0x0U << BTx_CR2_DIRPO_Pos) /* ¶ÔÍⲿÊäÈëDIRÐźÅEX_SIG2²»·´Ïò */
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#define BTx_CFGR1_RTCSEL2_Pos 6 /* RTCOUT2ÐźÅÑ¡Ôñ¿ØÖÆ2 (RTCOUT2 source select)
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00 = 32768Hz£¬XTLFʱÖÓÊä³ö
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01 = RTCSec£¬ÓÉRTCÄ£¿éÊä³öµÄÃëÐźÅ
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10 = RTCMin£¬ÓÉRTCÄ£¿éÊä³öµÄ·ÖÖÓÐźÅ
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11 = RFU */
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#define BTx_CFGR1_RTCSEL2_Msk (0x3U << BTx_CFGR1_RTCSEL2_Pos)
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#define BTx_CFGR1_RTCSEL2_32768HZ (0x0U << BTx_CFGR1_RTCSEL2_Pos)
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#define BTx_CFGR1_RTCSEL2_RTC_SEC (0x1U << BTx_CFGR1_RTCSEL2_Pos)
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#define BTx_CFGR1_RTCSEL2_RTC_MIN (0x2U << BTx_CFGR1_RTCSEL2_Pos)
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#define BTx_CFGR1_RTCSEL1_Pos 4 /* RTCOUT1ÐźÅÑ¡Ôñ¿ØÖÆ1 (RTCOUT1 source select)
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00 = 32768Hz£¬XTLFʱÖÓÊä³ö
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01 = RTCSec£¬ÓÉRTCÄ£¿éÊä³öµÄÃëÐźÅ
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10 = RTCMin£¬ÓÉRTCÄ£¿éÊä³öµÄ·ÖÖÓÐźÅ
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11 = RFU */
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#define BTx_CFGR1_RTCSEL1_Msk (0x3U << BTx_CFGR1_RTCSEL1_Pos)
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#define BTx_CFGR1_RTCSEL1_32768HZ (0x0U << BTx_CFGR1_RTCSEL1_Pos)
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#define BTx_CFGR1_RTCSEL1_RTC_SEC (0x1U << BTx_CFGR1_RTCSEL1_Pos)
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#define BTx_CFGR1_RTCSEL1_RTC_MIN (0x2U << BTx_CFGR1_RTCSEL1_Pos)
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#define BTx_CFGR1_GRP2SEL_Pos 2 /* Group2ÐźÅÑ¡Ôñ¿ØÖÆ (Group2 source select)
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00 = APBCLK
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01 = RTCOUT2
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10 = IN_SIG2£¬ÄÚ²¿ÊäÈëÐźÅ2
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11 = EX_SIG2£¬ÍⲿÊäÈëÐźÅ2
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×¢£º²»Ö§³ÖAPBCLKµÄϽµÑز¶×½ºÍ¼ÆÊý£¬²¶×½Ô´ºÍ¼ÆÊýԴΪAPBCLKʱѡÔñϽµÑؽ«²»»áÓÐЧ²¶×½ºÍ¼ÆÊý¡£ */
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#define BTx_CFGR1_GRP2SEL_Msk (0x3U << BTx_CFGR1_GRP2SEL_Pos)
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#define BTx_CFGR1_GRP2SEL_APBCLK (0x0U << BTx_CFGR1_GRP2SEL_Pos) /* ²»Ö§³ÖAPBCLKµÄϽµÑز¶×½ºÍ¼ÆÊý£¬²¶×½Ô´ºÍ¼ÆÊýԴΪAPBCLKʱѡÔñϽµÑؽ«²»»áÓÐЧ²¶×½ºÍ¼ÆÊý¡£ */
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#define BTx_CFGR1_GRP2SEL_RTCOUT2 (0x1U << BTx_CFGR1_GRP2SEL_Pos)
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#define BTx_CFGR1_GRP2SEL_IN_SIG2 (0x2U << BTx_CFGR1_GRP2SEL_Pos)
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#define BTx_CFGR1_GRP2SEL_EX_SIG2 (0x3U << BTx_CFGR1_GRP2SEL_Pos)
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#define BTx_CFGR1_GRP1SEL_Pos 0 /* Group1ÐźÅÑ¡Ôñ¿ØÖÆ£¨¿É×÷Ϊ²¶×½Ä£Ê½Ï²ÉÑùʱÖÓÑ¡Ôñ£¬Í¬Ê±¿É×÷ΪÐźŲ¶×½Ô´£©(Group1 source select)
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00 = APBCLK
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01 = RTCOUT1
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10 = IN_SIG1£¬ÄÚ²¿ÊäÈëÐźÅ1
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11 = EX_SIG1£¬ÍⲿÊäÈëÐźÅ1
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×¢£º²»Ö§³ÖAPBCLKµÄϽµÑز¶×½ºÍ¼ÆÊý£¬²¶×½Ô´ºÍ¼ÆÊýԴΪAPBCLKʱѡÔñϽµÑؽ«²»»áÓÐЧ²¶×½ºÍ¼ÆÊý¡£ */
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#define BTx_CFGR1_GRP1SEL_Msk (0x3U << BTx_CFGR1_GRP1SEL_Pos)
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#define BTx_CFGR1_GRP1SEL_APBCLK (0x0U << BTx_CFGR1_GRP1SEL_Pos) /* ²»Ö§³ÖAPBCLKµÄϽµÑز¶×½ºÍ¼ÆÊý£¬²¶×½Ô´ºÍ¼ÆÊýԴΪAPBCLKʱѡÔñϽµÑؽ«²»»áÓÐЧ²¶×½ºÍ¼ÆÊý¡£ */
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#define BTx_CFGR1_GRP1SEL_RTCOUT1 (0x1U << BTx_CFGR1_GRP1SEL_Pos)
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#define BTx_CFGR1_GRP1SEL_IN_SIG1 (0x2U << BTx_CFGR1_GRP1SEL_Pos)
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#define BTx_CFGR1_GRP1SEL_EX_SIG1 (0x3U << BTx_CFGR1_GRP1SEL_Pos)
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#define BTx_CFGR2_EXSEL2_Pos 6 /* ÍⲿÊäÈëÐźÅÑ¡Ôñ¿ØÖÆ2 (external source select2)
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00 = BT1_IN0/BT2_IN0
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01 = BT1_IN1/BT2_IN1
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10 = BT1_IN2/BT2_IN2
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11 = BT1_IN3/BT2_IN3 */
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#define BTx_CFGR2_EXSEL2_Msk (0x3U << BTx_CFGR2_EXSEL2_Pos)
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#define BTx_CFGR2_EXSEL2_IN0 (0x0U << BTx_CFGR2_EXSEL2_Pos)
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#define BTx_CFGR2_EXSEL2_IN1 (0x1U << BTx_CFGR2_EXSEL2_Pos)
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#define BTx_CFGR2_EXSEL2_IN2 (0x2U << BTx_CFGR2_EXSEL2_Pos)
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#define BTx_CFGR2_EXSEL2_IN3 (0x3U << BTx_CFGR2_EXSEL2_Pos)
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#define BTx_CFGR2_EXSEL1_Pos 4 /* ÍⲿÊäÈëÐźÅÑ¡Ôñ¿ØÖÆ1 (external source select1)
|
00 = BT1_IN0/BT2_IN0
|
01 = BT1_IN1/BT2_IN1
|
10 = BT1_IN2/BT2_IN2
|
11 = BT1_IN3/BT2_IN3 */
|
#define BTx_CFGR2_EXSEL1_Msk (0x3U << BTx_CFGR2_EXSEL1_Pos)
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#define BTx_CFGR2_EXSEL1_IN0 (0x0U << BTx_CFGR2_EXSEL1_Pos)
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#define BTx_CFGR2_EXSEL1_IN1 (0x1U << BTx_CFGR2_EXSEL1_Pos)
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#define BTx_CFGR2_EXSEL1_IN2 (0x2U << BTx_CFGR2_EXSEL1_Pos)
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#define BTx_CFGR2_EXSEL1_IN3 (0x3U << BTx_CFGR2_EXSEL1_Pos)
|
|
#define BTx_CFGR2_INSEL2_Pos 2 /* ÄÚ²¿ÊäÈëÐźÅÑ¡Ôñ¿ØÖÆ2 (internal source select 2)
|
00 = UART_RX3/UART_RX3
|
01 = UART_RX4/UART_RX4
|
10 = UART_RX5/UART_RX5
|
11 = RCLP/BT1_OUT */
|
#define BTx_CFGR2_INSEL2_Msk (0x3U << BTx_CFGR2_INSEL2_Pos)
|
#define BTx_CFGR2_INSEL2_RX3 (0x0U << BTx_CFGR2_INSEL2_Pos)
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#define BTx_CFGR2_INSEL2_RX4 (0x1U << BTx_CFGR2_INSEL2_Pos)
|
#define BTx_CFGR2_INSEL2_RX5 (0x2U << BTx_CFGR2_INSEL2_Pos)
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#define BTx_CFGR2_INSEL2_RCLP (0x3U << BTx_CFGR2_INSEL2_Pos)
|
|
#define BTx_CFGR2_INSEL1_Pos 0 /* ÄÚ²¿ÊäÈëÐźÅÑ¡Ôñ¿ØÖÆ1 (internal source select 1)
|
00 = UART_RX0/UART_RX0
|
01 = UART_RX1/UART_RX1
|
10 = UART_RX2/UART_RX2
|
11 = RCLP/RCLP */
|
#define BTx_CFGR2_INSEL1_Msk (0x3U << BTx_CFGR2_INSEL1_Pos)
|
#define BTx_CFGR2_INSEL1_RX0 (0x0U << BTx_CFGR2_INSEL1_Pos)
|
#define BTx_CFGR2_INSEL1_RX1 (0x1U << BTx_CFGR2_INSEL1_Pos)
|
#define BTx_CFGR2_INSEL1_RX2 (0x2U << BTx_CFGR2_INSEL1_Pos)
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#define BTx_CFGR2_INSEL1_RCLP (0x3U << BTx_CFGR2_INSEL1_Pos)
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#define BTx_PRES_PRESCALE_Pos 0 /* ÊäÈëGroup1µÄÔ¤·ÖƵ¼Ä´æÆ÷ (Group1 input signal prescaler)
|
·ÖƵÊý=£¨X+1£©£¬¼´00±íʾ1·ÖƵ£¬FF±íʾ256·ÖƵ¡£Ô¤·ÖƵºóµÄÐźŶ¼Îªµ¥ÖÜÆÚÂö³åµÄÐÎʽ£¬Õ¼¿Õ±È1:X */
|
#define BTx_PRES_PRESCALE_Msk (0xffU << BTx_PRES_PRESCALE_Pos)
|
|
#define BTx_LOADCR_LHEN_Pos 4 /* ¸ßλ¼ÓÔØ¿ØÖÆ (Counter highend load enable)
|
д1½«Ô¤ÖÃÊý¼Ä´æÆ÷ET1PRESETHºÍ¼ÓÔؼĴæÆ÷ET1LOADH·Ö±ð¼ÓÔص½¼ÆÊýÖµ¼Ä´æÆ÷ET1CNTHºÍ±È½Ï¼Ä´æÆ÷ET1CMPH£¬Ð´0ÎÞЧ£¬¸ÃλӲ¼þ×Ô¶¯Çå0¡£ÔÚ16λµÄ¶¨Ê±/¼ÆÊýÏÂLHEN×÷Ϊ¼ÆÊýÆ÷µÄ¼ÓÔØ¿ØÖÆ£¬LLEN×Ô¶¯Ê§Ð§ */
|
#define BTx_LOADCR_LHEN_Msk (0x1U << BTx_LOADCR_LHEN_Pos)
|
|
#define BTx_LOADCR_LLEN_Pos 0 /* µÍλ¼ÓÔØ¿ØÖÆ (Counter lowend load enable)
|
д1½«Ô¤ÖÃÊý¼Ä´æÆ÷PRESETLºÍ¼ÓÔؼĴæÆ÷LOADL·Ö±ð¼ÓÔص½¼ÆÊýÖµ¼Ä´æÆ÷ET1CNTLºÍ±È½Ï¼Ä´æÆ÷ET1CMPL£¬Ð´0ÎÞЧ£¬¸ÃλӲ¼þ×Ô¶¯Çå0¡£ÔÚ16λµÄ¶¨Ê±/¼ÆÊýÏÂLHEN×÷Ϊ¼ÆÊýÆ÷µÄ¼ÓÔØ¿ØÖÆ£¬LLEN×Ô¶¯Ê§Ð§ */
|
#define BTx_LOADCR_LLEN_Msk (0x1U << BTx_LOADCR_LLEN_Pos)
|
|
#define BTx_CNTL_CNTL_Pos 0 /* ¼ÆÊýÆ÷µÍλ¼ÆÊýÖµ¼Ä´æÆ÷ (counter lowend)
|
LLENÓÐЧʱ¼ÓÔØÔ¤ÖÃÊýµ½¸Ã¼Ä´æÆ÷¡£ */
|
#define BTx_CNTL_CNTL_Msk (0xffU << BTx_CNTL_CNTL_Pos)
|
|
#define BTx_CNTH_CNTH_Pos 0 /* ¼ÆÊýÆ÷¸ßλ¼ÆÊýÖµ¼Ä´æÆ÷ (counter highend)
|
LHENÓÐЧʱ¼ÓÔØÔ¤ÖÃÊýµ½¸Ã¼Ä´æÆ÷¡£ */
|
#define BTx_CNTH_CNTH_Msk (0xffU << BTx_CNTH_CNTH_Pos)
|
|
#define BTx_PRESET_PRESETH_Pos 8 /* ¼ÆÊýÆ÷¸ßλԤÖÃÊý¼Ä´æÆ÷ (preset highend)
|
ÓÃÓÚ±£´æ¸ßλ¼ÆÊýÆ÷³õÖµ£¬»ò±£´æ²¶×½½á¹û¸ß8bit */
|
#define BTx_PRESET_PRESETH_Msk (0xffU << BTx_PRESET_PRESETH_Pos)
|
|
#define BTx_PRESET_PRESETL_Pos 0 /* ¼ÆÊýÆ÷µÍλԤÖÃÊý¼Ä´æÆ÷ (preset lowend)
|
ÓÃÓÚ±£´æµÍλ¼ÆÊýÆ÷³õÖµ£¬»ò±£´æ²¶×½½á¹ûµÍ8bit */
|
#define BTx_PRESET_PRESETL_Msk (0xffU << BTx_PRESET_PRESETL_Pos)
|
|
#define BTx_LOADL_LOADL_Pos 0 /* ¼ÆÊýÆ÷µÍλ¼ÓÔؼĴæÆ÷ (load lowend counter)
|
ÔÚ¼ÆÊýÆ¥Åä»òÖ´ÐмÓÔØÃüÁîʱ½«¼ÓÔؼĴæÆ÷µÄÖµ¼ÓÔØÖÁ±È½Ï¹¤×÷¼Ä´æÆ÷¡£ */
|
#define BTx_LOADL_LOADL_Msk (0xffU << BTx_LOADL_LOADL_Pos)
|
|
#define BTx_LOADH_LOADH_Pos 0 /* ¼ÆÊýÆ÷¸ßλ¼ÓÔؼĴæÆ÷ (load highend counter)
|
ÔÚ¼ÆÊýÆ¥Åä»òÖ´ÐмÓÔØÃüÁîʱ½«¼ÓÔؼĴæÆ÷µÄÖµ¼ÓÔØÖÁ±È½Ï¹¤×÷¼Ä´æÆ÷¡£µ±¹¤×÷ÔÚ8λ¶¨Ê±/¼ÆÊýÆ÷ģʽʱ£¬¸Ã¸ßλ¼ÓÔؼĴæÆ÷²»Ö§³Ö¼ÓÔØֵΪ0x00µÄÉèÖᣠ*/
|
#define BTx_LOADH_LOADH_Msk (0xffU << BTx_LOADH_LOADH_Pos)
|
|
#define BTx_CMPL_CMPL_Pos 0 /* ¼ÆÊýÆ÷µÍλ±È½Ï¼Ä´æÆ÷ (compare lowend )
|
¼ÓÔؼĴæÆ÷µÄÖµ¼ÓÔغó½«Ð´Èë¸Ã¼Ä´æÆ÷£¬¸Ã¼Ä´æÆ÷Óë¼ÆÊýÆ÷±È½Ï£¬Èô¼ÆÊýÖµ´óÓÚµÈÓڸüĴæÆ÷µÄÖµ£¬Ôò²úÉú¼ÆÊýÆ¥ÅäÐźÅÖÁÊä³ö¿ØÖÆÄ£¿é£¬²¢²úÉúÏàÓ¦Öжϡ£ */
|
#define BTx_CMPL_CMPL_Msk (0xffU << BTx_CMPL_CMPL_Pos)
|
|
#define BTx_CMPH_CMPH_Pos 0 /* ¼ÆÊýÆ÷¸ßλ±È½Ï¼Ä´æÆ÷ (compare highend)
|
¼ÓÔؼĴæÆ÷µÄÖµ¼ÓÔغó½«Ð´Èë¸Ã¼Ä´æÆ÷£¬¸Ã¼Ä´æÆ÷Óë¼ÆÊýÆ÷±È½Ï£¬Èô¼ÆÊýÖµ´óÓÚµÈÓڸüĴæÆ÷µÄÖµ£¬Ôò²úÉú¼ÆÊýÆ¥ÅäÐźÅÖÁÊä³ö¿ØÖÆÄ£¿é£¬²¢²úÉúÏàÓ¦Öжϡ£ */
|
#define BTx_CMPH_CMPH_Msk (0xffU << BTx_CMPH_CMPH_Pos)
|
|
#define BTx_OUTCNT_OUTCNT_Pos 0 /* ¼ÆÊýÆ÷Êä³öÂö³å¿í¶È¼ÆÊýÆ÷ (output pulse width counter)
|
¸Ã¼Ä´æÆ÷ÓÃÓÚµ÷ÕûÊä³öÂö³å¿í¶È¡£¼ÆÊýʱÖÓΪ32768Hz£¬¶ÔÓ¦µÄÊä³öÂö³å¿í¶È·¶Î§Îª30.5uS~125mS¡£Êä³öÂö³å¿í¶È=(OUTCNT+1)/32768Ãë */
|
#define BTx_OUTCNT_OUTCNT_Msk (0xfffU << BTx_OUTCNT_OUTCNT_Pos)
|
|
#define BTx_OCR_OUTCLR_Pos 5
|
#define BTx_OCR_OUTCLR_Msk (0x1U << BTx_OCR_OUTCLR_Pos)
|
#define BTx_OCR_OUTCLR_INVALID (0x0U << BTx_OCR_OUTCLR_Pos)
|
#define BTx_OCR_OUTCLR_CLEAR (0x1U << BTx_OCR_OUTCLR_Pos)
|
|
#define BTx_OCR_OUTINV_Pos 4
|
#define BTx_OCR_OUTINV_Msk (0x1U << BTx_OCR_OUTINV_Pos)
|
#define BTx_OCR_OUTINV_NORMAL (0x0U << BTx_OCR_OUTINV_Pos)
|
#define BTx_OCR_OUTINV_REVERSE (0x1U << BTx_OCR_OUTINV_Pos)
|
|
#define BTx_OCR_OUTMOD_Pos 3
|
#define BTx_OCR_OUTMOD_Msk (0x1U << BTx_OCR_OUTMOD_Pos)
|
#define BTx_OCR_OUTMOD_PULSE_SHIFT (0x0U << BTx_OCR_OUTMOD_Pos)
|
#define BTx_OCR_OUTMOD_NEG (0x1U << BTx_OCR_OUTMOD_Pos)
|
|
#define BTx_OCR_OUTSEL_Pos 0
|
#define BTx_OCR_OUTSEL_Msk (0x7U << BTx_OCR_OUTSEL_Pos)
|
#define BTx_OCR_OUTSEL_HIGH (0x0U << BTx_OCR_OUTSEL_Pos)
|
#define BTx_OCR_OUTSEL_LOW (0x1U << BTx_OCR_OUTSEL_Pos)
|
#define BTx_OCR_OUTSEL_GROUP1 (0x2U << BTx_OCR_OUTSEL_Pos)
|
#define BTx_OCR_OUTSEL_GROUP2 (0x3U << BTx_OCR_OUTSEL_Pos)
|
#define BTx_OCR_OUTSEL_PWM (0x4U << BTx_OCR_OUTSEL_Pos)
|
|
#define BTx_IER_CMPHIE_Pos 4 /* À©Õ¹¶¨Ê±Æ÷¸ßλ±È½Ï·¢ÉúÐźŠ(compare highend interrupt enable)
|
1 = ÖжÏʹÄÜ
|
0 = ÖжϽûÖ¹ */
|
#define BTx_IER_CMPHIE_Msk (0x1U << BTx_IER_CMPHIE_Pos)
|
|
#define BTx_IER_CMPLIE_Pos 3 /* À©Õ¹¶¨Ê±Æ÷µÍλ±È½Ï·¢ÉúÐźŠ(compare lowend interrupt enable)
|
1 = ÖжÏʹÄÜ
|
0 = ÖжϽûÖ¹ */
|
#define BTx_IER_CMPLIE_Msk (0x1U << BTx_IER_CMPLIE_Pos)
|
|
#define BTx_IER_OVHIE_Pos 2 /* ¶¨Ê±Æ÷¸ßλÒç³öÐźŠ(highend overflow interrupt enable)
|
1 = ÖжÏʹÄÜ
|
0 = ÖжϽûÖ¹ */
|
#define BTx_IER_OVHIE_Msk (0x1U << BTx_IER_OVHIE_Pos)
|
|
#define BTx_IER_OVLIE_Pos 1 /* ¶¨Ê±Æ÷µÍλÒç³öÐźŠ(lowend overflow interrupt enable)
|
1 = ÖжÏʹÄÜ
|
0 = ÖжϽûÖ¹ */
|
#define BTx_IER_OVLIE_Msk (0x1U << BTx_IER_OVLIE_Pos)
|
|
#define BTx_IER_CAPIE_Pos 0 /* ¶¨Ê±Æ÷²¶×½²úÉúÐźŠ(capture interrupt enable)
|
1 = ÖжÏʹÄÜ
|
0 = ÖжϽûÖ¹ */
|
#define BTx_IER_CAPIE_Msk (0x1U << BTx_IER_CAPIE_Pos)
|
|
#define BTx_ISR_EDGESTA_Pos 5 /* ²¶×½ÑØ״̬
|
1 = ²¶×½µ½ÏÂÑØ
|
0 = ²¶×½µ½ÉÏÑØ */
|
#define BTx_ISR_EDGESTA_Msk (0x1U << BTx_ISR_EDGESTA_Pos)
|
|
#define BTx_ISR_CMPHIF_Pos 4 /* ¶¨Ê±Æ÷¸ßλ±È½Ï·¢ÉúÐźŠ(compare highend interrupt flag)
|
1 = µ±Ç°¼ÆÊýÆ÷µÄÖµ´óÓÚµÈÓڱȽϼĴæÆ÷µÄÖµ£¬¸ÃÐźŽ«ÖØмÓÔØеļÓÔؼĴæÆ÷µÄÖµµ½¹¤×÷¼Ä´æÆ÷¡£
|
0 = µ±Ç°¼ÆÊýÆ÷µÄֵСÓڱȽϼĴæÆ÷µÄÖµ */
|
#define BTx_ISR_CMPHIF_Msk (0x1U << BTx_ISR_CMPHIF_Pos)
|
|
#define BTx_ISR_CMPLIF_Pos 3 /* ¶¨Ê±Æ÷µÍλ±È½Ï·¢ÉúÐźŠ(compare lowend interrupt flag)
|
1 = µ±Ç°¼ÆÊýÆ÷µÄÖµ´óÓÚµÈÓڱȽϼĴæÆ÷µÄÖµ£¬¸ÃÐźŽ«ÖØмÓÔØеļÓÔؼĴæÆ÷µÄÖµµ½¹¤×÷¼Ä´æÆ÷¡£
|
0 = µ±Ç°¼ÆÊýÆ÷µÄֵСÓڱȽϼĴæÆ÷µÄÖµ */
|
#define BTx_ISR_CMPLIF_Msk (0x1U << BTx_ISR_CMPLIF_Pos)
|
|
#define BTx_ISR_OVHIF_Pos 2 /* ¶¨Ê±Æ÷¸ßλÒç³öÐźŠ(highend overflow interrupt flag)
|
1 = ²úÉú¼ÆÊýÒç³ö
|
0 = δ²úÉúÒç³ö */
|
#define BTx_ISR_OVHIF_Msk (0x1U << BTx_ISR_OVHIF_Pos)
|
|
#define BTx_ISR_OVLIF_Pos 1 /* ¶¨Ê±Æ÷µÍλÒç³öÐźŠ(lowend overflow interrupt flag)
|
1 = ²úÉú¼ÆÊýÒç³ö
|
0 = δ²úÉúÒç³ö */
|
#define BTx_ISR_OVLIF_Msk (0x1U << BTx_ISR_OVLIF_Pos)
|
|
#define BTx_ISR_CAPIF_Pos 0 /* ¶¨Ê±Æ÷²¶×½²úÉúÐźŠ(capture interrupt flag)
|
1 = ²¶×½µ½Ö¸¶¨µÄÑØ
|
0 = δ²¶×½µ½Ö¸¶¨µÄÑØ */
|
#define BTx_ISR_CAPIF_Msk (0x1U << BTx_ISR_CAPIF_Pos)
|
//Macro_End
|
|
/* Exported functions --------------------------------------------------------*/
|
extern void BTx_Deinit(BT_Type* BTx);
|
|
/* ¸ß8λ¼ÆÊýÆ÷£¨BT1H»òBT2H£©Æô¶¯¿ØÖÆ Ïà¹Øº¯Êý */
|
extern void BTx_CR1_CHEN_Setable(BT_Type* BTx, FunState NewState);
|
extern FunState BTx_CR1_CHEN_Getable(BT_Type* BTx);
|
|
/* µÍ8λ¼ÆÊýÆ÷£¨BT1L»òBT2L£©Æô¶¯¿ØÖÆ
|
(Counter-Lowend enable)
|
1£ºÆô¶¯µÍ8bit¼ÆÊýÆ÷£¬ÔÚ¼ÆÊýÆ÷ģʽÏÂÆô¶¯Ê±½«Ô¤ÖÃÊýÖµºÍ¼ÓÔØÖµ·Ö±ð¼ÓÔØÖÁ¼ÆÊýÆ÷ºÍ±È½Ï¼Ä´æÆ÷£»²¶×½Ä£Ê½ÏÂÆô¶¯Ê±¼ÆÊýÆ÷ÓÉÁ㿪ʼ×ÔÓɼÆÊý£¬¼ÆÊýµ½0xFFFFºó²úÉúÒç³öÐźÅÈ»ºóÓÉÁ㿪ʼÖØмÆÊý£¬²¶×½¹¦ÄÜÖ»¹¤×÷ÔÚ16λģʽ£»ÔÚ16λµÄ¶¨Ê±/¼ÆÊýºÍ²¶×½Ä£Ê½ÏÂCHEN×÷Ϊ¼ÆÊýÆ÷µÄÆô¶¯¿ØÖÆ£¬CLEN×Ô¶¯Ê§Ð§
|
0£ºÍ£Ö¹µÍ8bit¼ÆÊýÆ÷¼ÆÊý Ïà¹Øº¯Êý */
|
extern void BTx_CR1_CLEN_Setable(BT_Type* BTx, FunState NewState);
|
extern FunState BTx_CR1_CLEN_Getable(BT_Type* BTx);
|
|
/* ¹¤×÷ģʽѡÔñ (work mode)
|
1£º16λ²¶×½Ä£Ê½
|
0£º8λ¶¨Ê±/¼ÆÊýģʽ£¬Èô¸ßλ¼ÆÊýÆ÷¼ÆÊýÔ´Ñ¡ÔñΪµÍλ¼ÆÊýÆ÷µÄÒç³öÐźţ¬Ôò¿ÉʵÏÖ16λ¶¨Ê±/¼ÆÊýģʽ Ïà¹Øº¯Êý */
|
extern void BTx_CR1_MODE_Set(BT_Type* BTx, uint32_t SetValue);
|
extern uint32_t BTx_CR1_MODE_Get(BT_Type* BTx);
|
|
/* ¼ÆÊýģʽϵļÆÊýÑغÍÖÜÆÚ²¶×½Ê±µÄ²¶×½ÑØÑ¡Ôñλ (edge select)
|
1£º¼ÆÊýģʽ²ÉÑù¼ÆÊýԴϽµÑØ£¬ÖÜÆÚ²¶×½Ä£Ê½Ê±ÏÂÑز¶×½
|
0£º¼ÆÊýģʽ²ÉÑù¼ÆÊýÔ´ÉÏÉýÑØ£¬ÖÜÆÚ²¶×½Ä£Ê½Ê±ÉÏÑز¶×½
|
×¢£º²»Ö§³ÖϵͳʱÖÓµÄϽµÑؼÆÊý£¬²¶×½Ô´ºÍ¼ÆÊýԴΪϵͳʱÖÓʱѡÔñϽµÑؽ«²»»áÓÐЧ¼ÆÊý¡£ Ïà¹Øº¯Êý */
|
extern void BTx_CR1_EDGESEL_Set(BT_Type* BTx, uint32_t SetValue);
|
extern uint32_t BTx_CR1_EDGESEL_Get(BT_Type* BTx);
|
|
/* ²¶×½Ä£Ê½¿ØÖÆ£¨Ö»ÔÚ²¶×½Ä£Ê½ÏÂÓÐЧ£©(capture mode)
|
1£ºÂö³å¿í¶È²¶×½
|
0£ºÂö³åÖÜÆÚ²¶×½ Ïà¹Øº¯Êý */
|
extern void BTx_CR1_CAPMOD_Set(BT_Type* BTx, uint32_t SetValue);
|
extern uint32_t BTx_CR1_CAPMOD_Get(BT_Type* BTx);
|
|
/* ´øÇåÁ㲶׽ģʽ¿ØÖÆ (capture clear)
|
1£º²»ÂÛÔÚÂö³å¿í¶È»¹ÊÇÖÜÆÚ²¶×½Çé¿öÏ£¬²¶×½µ½µÚÒ»¸öÑغ󽫼ÆÊýÆ÷ÇåÁã²úÉúÖжϣ¬²¶×½µ½µÚ¶þ¸öÑغóËø´æ£¨Ëø´æµ½¸ßµÍλԤÖÃÊý¼Ä´æÆ÷£©¼ÆÊýÖµ²¢Í¬Ê±ÇåÁã¼ÆÊýÆ÷
|
0£º²¶×½²»ÇåÁ㣬¼ÆÊýÆ÷Ò»Ö±×ÔÓɼÆÊý Ïà¹Øº¯Êý */
|
extern void BTx_CR1_CAPCLR_Setable(BT_Type* BTx, FunState NewState);
|
extern FunState BTx_CR1_CAPCLR_Getable(BT_Type* BTx);
|
|
/* µ¥´Î²¶×½¿ØÖÆ (capture once)
|
1£ºµ¥´Î²¶×½ÓÐЧ£¬ÔÚ²¶×½µ½Ò»´ÎÂö³å¿í¶È»òÂö³åÖÜÆÚºó¼ÆÊýÆ÷Í£Ö¹£¬ÈôÐèÒªÔٴβ¶×½ÐèÖØÐÂÆô¶¯
|
0£ºÁ¬Ðø²¶×½ Ïà¹Øº¯Êý */
|
extern void BTx_CR1_CAPONCE_Set(BT_Type* BTx, uint32_t SetValue);
|
extern uint32_t BTx_CR1_CAPONCE_Get(BT_Type* BTx);
|
|
/* PWMģʽÊä³ö (pulse width modulation)
|
1£ºPWMÊä³öʹÄÜ
|
0£ºPWM Êä³ö²»Ê¹ÄÜ Ïà¹Øº¯Êý */
|
extern void BTx_CR1_PWM_Setable(BT_Type* BTx, FunState NewState);
|
extern FunState BTx_CR1_PWM_Getable(BT_Type* BTx);
|
|
/* ¼ÆÊýÆ÷ÄÚ²¿¼ÆÊýÔ´ÐźÅÑ¡Ôñ (signal group2 select)
|
1£ºÄÚ²¿¼ÆÊýÔ´ÐźÅÑ¡ÔñGroup2
|
0£ºÄÚ²¿¼ÆÊýÔ´ÐźÅÑ¡ÔñGroup1 Ïà¹Øº¯Êý */
|
extern void BTx_CR2_SIG2SEL_Set(BT_Type* BTx, uint32_t SetValue);
|
extern uint32_t BTx_CR2_SIG2SEL_Get(BT_Type* BTx);
|
|
/* ¼ÆÊýÆ÷ÄÚ²¿²¶×½Ô´ÐźÅÑ¡Ôñ (signal group1 select)
|
1£ºÄÚ²¿²¶×½Ô´ÐźÅÑ¡ÔñGroup1
|
0£ºÄÚ²¿²¶×½Ô´ÐźÅÑ¡ÔñGroup2 Ïà¹Øº¯Êý */
|
extern void BTx_CR2_SIG1SEL_Set(BT_Type* BTx, uint32_t SetValue);
|
extern uint32_t BTx_CR2_SIG1SEL_Get(BT_Type* BTx);
|
|
/* ¸ß8λ¼ÆÊýÆ÷¼ÆÊýÔ´Ñ¡Ôñ (Counter Highend source select)
|
00/11£ºÑ¡ÔñET1µÄµÍλ¼ÆÊýÆ÷µÄÒç³öÐźţ¬ÓëµÍλ¼ÆÊýÆ÷×é³É16λ¼ÆÊýÆ÷
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01£ºÑ¡ÔñÄÚ²¿²¶×½Ô´ÐźÅ
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10£ºÑ¡ÔñÄÚ²¿¼ÆÊýÔ´ÐźŻòÍⲿDIRÊäÈë×éºÏÐźŠÏà¹Øº¯Êý */
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extern void BTx_CR2_CNTHSEL_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_CR2_CNTHSEL_Get(BT_Type* BTx);
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/* ÍⲿÊäÈëDIR¿ØÖÆʹÄÜ¡£Í¨³£µçÁ¿Âö³åÊä³öʱͬʱ»áÊä³öÒ»¸öÓɸߵ͵çƽָʾÕý·´ÏòµÄ·½ÏòÐźÅDIR¡£µç·½«Í¨¹ýDIRÐźŵçƽµÄ¸ßµÍ£¬·Ö±ð¿ØÖƸßλ¼ÆÊýÆ÷ºÍµÍλ¼ÆÊýÆ÷¼ÆÊýʹÄÜ£¬ÒÔʵÏÖÕë¶ÔÕýÏò¡¢·´ÏòÂö³åµÄ¸÷ÖÖ¼ÆÊý¹¦ÄÜ (direction bit enable)
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1£ºÍⲿÊäÈëµÄDIRÐźÅÓÐЧ£¬´Ëʱ¸ßµÍλ¼ÆÊýÆ÷ÊÇ·ñ¼ÆÊý¿ÉÓÉÍⲿÊäÈëµÄDIRÐźſØÖÆ¡£
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0£ºÍⲿÊäÈëµÄDIRÐźÅÎÞЧ£¬´Ëʱ¸ßµÍλ¼ÆÊýÆ÷ÊÇ·ñ¼ÆÊý½«ÓÉÄÚ²¿¿ØÖÆÐźſØÖÆ¡£ Ïà¹Øº¯Êý */
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extern void BTx_CR2_DIREN_Setable(BT_Type* BTx, FunState NewState);
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extern FunState BTx_CR2_DIREN_Getable(BT_Type* BTx);
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/* ÄÚ²¿DIR¿ØÖÆÐźţ¬µ±DIRENΪ0£¬¼´ÍⲿÊäÈëDIR¿ØÖÆÎÞЧʱ£¬¿ÉÓɸÃÐźŴúÌæDIRÊäÈ룬ֱ½Ó¿ØÖÆÄÚ²¿¼ÆÊýÆ÷µÄ¼ÆÊý¡£µ±ÐèÒªÍⲿDIRÊäÈ룬¼´DIRENΪ1ʱ£¬¸ÃλӦÉèÖÃΪ0 (set direction)
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1£ºÄÚ²¿DIRÐźÅΪ¸ßµçƽ£¬Ôò¸ß8λ¼ÆÊýÆ÷¼ÆÊý Ïà¹Øº¯Êý */
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extern void BTx_CR2_STDIR_Setable(BT_Type* BTx, FunState NewState);
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extern FunState BTx_CR2_STDIR_Getable(BT_Type* BTx);
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/* µÍλ¼ÆÊýÆ÷¼ÆÊýʹÄÜ¿ØÖÆÑ¡ÔñÐźŠ(source select)
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1µÍλ¼ÆÊýÆ÷¼ÆÊýʹÄܶËÑ¡Ôò³£Ê¹ÄÜ¡£´ËʱµÍλ¼ÆÊýÆ÷¼ÆÊý²»ÊÜDIR¿ØÖÆ£¬¿É½«Õý·´ÏòËùÓÐÂö³åÒ»²¢¼ÆÊý
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0£ºµÍλ¼ÆÊýÆ÷¼ÆÊýʹÄܶËÑ¡ÔòÓɼĴæÆ÷STDIR»òÍⲿEX_SIG2ÊäÈë¿ØÖÆ¡£ Ïà¹Øº¯Êý */
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extern void BTx_CR2_SRCSEL_Setable(BT_Type* BTx, FunState NewState);
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extern FunState BTx_CR2_SRCSEL_Getable(BT_Type* BTx);
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/* ÊäÈëÐźÅ2¼«ÐÔÑ¡Ôñ (direction polarity)
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1£º¶ÔÍⲿÊäÈëDIRÐźÅEX_SIG2·´Ïò
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0£º¶ÔÍⲿÊäÈëDIRÐźÅEX_SIG2²»·´Ïò Ïà¹Øº¯Êý */
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extern void BTx_CR2_DIRPO_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_CR2_DIRPO_Get(BT_Type* BTx);
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/* RTCOUT2ÐźÅÑ¡Ôñ¿ØÖÆ2 (RTCOUT2 source select)
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00 = 32768Hz£¬XTLFʱÖÓÊä³ö
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01 = RTCSec£¬ÓÉRTCÄ£¿éÊä³öµÄÃëÐźÅ
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10 = RTCMin£¬ÓÉRTCÄ£¿éÊä³öµÄ·ÖÖÓÐźÅ
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11 = RFU Ïà¹Øº¯Êý */
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extern void BTx_CFGR1_RTCSEL2_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_CFGR1_RTCSEL2_Get(BT_Type* BTx);
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/* RTCOUT1ÐźÅÑ¡Ôñ¿ØÖÆ1 (RTCOUT1 source select)
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00 = 32768Hz£¬XTLFʱÖÓÊä³ö
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01 = RTCSec£¬ÓÉRTCÄ£¿éÊä³öµÄÃëÐźÅ
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10 = RTCMin£¬ÓÉRTCÄ£¿éÊä³öµÄ·ÖÖÓÐźÅ
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11 = RFU Ïà¹Øº¯Êý */
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extern void BTx_CFGR1_RTCSEL1_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_CFGR1_RTCSEL1_Get(BT_Type* BTx);
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/* Group2ÐźÅÑ¡Ôñ¿ØÖÆ (Group2 source select)
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00 = APBCLK
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01 = RTCOUT2
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10 = IN_SIG2£¬ÄÚ²¿ÊäÈëÐźÅ2
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11 = EX_SIG2£¬ÍⲿÊäÈëÐźÅ2
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×¢£º²»Ö§³ÖAPBCLKµÄϽµÑز¶×½ºÍ¼ÆÊý£¬²¶×½Ô´ºÍ¼ÆÊýԴΪAPBCLKʱѡÔñϽµÑؽ«²»»áÓÐЧ²¶×½ºÍ¼ÆÊý¡£ Ïà¹Øº¯Êý */
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extern void BTx_CFGR1_GRP2SEL_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_CFGR1_GRP2SEL_Get(BT_Type* BTx);
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/* Group1ÐźÅÑ¡Ôñ¿ØÖÆ£¨¿É×÷Ϊ²¶×½Ä£Ê½Ï²ÉÑùʱÖÓÑ¡Ôñ£¬Í¬Ê±¿É×÷ΪÐźŲ¶×½Ô´£©(Group1 source select)
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00 = APBCLK
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01 = RTCOUT1
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10 = IN_SIG1£¬ÄÚ²¿ÊäÈëÐźÅ1
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11 = EX_SIG1£¬ÍⲿÊäÈëÐźÅ1
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×¢£º²»Ö§³ÖAPBCLKµÄϽµÑز¶×½ºÍ¼ÆÊý£¬²¶×½Ô´ºÍ¼ÆÊýԴΪAPBCLKʱѡÔñϽµÑؽ«²»»áÓÐЧ²¶×½ºÍ¼ÆÊý¡£ Ïà¹Øº¯Êý */
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extern void BTx_CFGR1_GRP1SEL_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_CFGR1_GRP1SEL_Get(BT_Type* BTx);
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/* ÍⲿÊäÈëÐźÅÑ¡Ôñ¿ØÖÆ2 (external source select2)
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00 = BT1_IN0/BT2_IN0
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01 = BT1_IN1/BT2_IN1
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10 = BT1_IN2/BT2_IN2
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11 = BT1_IN3/BT2_IN3 Ïà¹Øº¯Êý */
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extern void BTx_CFGR2_EXSEL2_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_CFGR2_EXSEL2_Get(BT_Type* BTx);
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/* ÍⲿÊäÈëÐźÅÑ¡Ôñ¿ØÖÆ1 (external source select1)
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00 = BT1_IN0/BT2_IN0
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01 = BT1_IN1/BT2_IN1
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10 = BT1_IN2/BT2_IN2
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11 = BT1_IN3/BT2_IN3 Ïà¹Øº¯Êý */
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extern void BTx_CFGR2_EXSEL1_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_CFGR2_EXSEL1_Get(BT_Type* BTx);
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/* ÄÚ²¿ÊäÈëÐźÅÑ¡Ôñ¿ØÖÆ2 (internal source select 2)
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00 = UART_RX3/UART_RX3
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01 = UART_RX4/UART_RX4
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10 = UART_RX5/UART_RX5
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11 = RCLP/BT1_OUT Ïà¹Øº¯Êý */
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extern void BTx_CFGR2_INSEL2_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_CFGR2_INSEL2_Get(BT_Type* BTx);
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/* ÄÚ²¿ÊäÈëÐźÅÑ¡Ôñ¿ØÖÆ1 (internal source select 1)
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00 = UART_RX0/UART_RX0
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01 = UART_RX1/UART_RX1
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10 = UART_RX2/UART_RX2
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11 = RCLP/RCLP Ïà¹Øº¯Êý */
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extern void BTx_CFGR2_INSEL1_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_CFGR2_INSEL1_Get(BT_Type* BTx);
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/* ÊäÈëGroup1µÄÔ¤·ÖƵ¼Ä´æÆ÷ (Group1 input signal prescaler)
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·ÖƵÊý=£¨X+1£©£¬¼´00±íʾ1·ÖƵ£¬FF±íʾ256·ÖƵ¡£Ô¤·ÖƵºóµÄÐźŶ¼Îªµ¥ÖÜÆÚÂö³åµÄÐÎʽ£¬Õ¼¿Õ±È1:X Ïà¹Øº¯Êý */
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extern void BTx_PRES_Write(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_PRES_Read(BT_Type* BTx);
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/* ¸ßλ¼ÓÔØ¿ØÖÆ (Counter highend load enable)
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д1½«Ô¤ÖÃÊý¼Ä´æÆ÷ET1PRESETHºÍ¼ÓÔؼĴæÆ÷ET1LOADH·Ö±ð¼ÓÔص½¼ÆÊýÖµ¼Ä´æÆ÷ET1CNTHºÍ±È½Ï¼Ä´æÆ÷ET1CMPH£¬Ð´0ÎÞЧ£¬¸ÃλӲ¼þ×Ô¶¯Çå0¡£ÔÚ16λµÄ¶¨Ê±/¼ÆÊýÏÂLHEN×÷Ϊ¼ÆÊýÆ÷µÄ¼ÓÔØ¿ØÖÆ£¬LLEN×Ô¶¯Ê§Ð§ Ïà¹Øº¯Êý */
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extern void BTx_LOADCR_LHEN_Setable(BT_Type* BTx, FunState NewState);
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extern FunState BTx_LOADCR_LHEN_Getable(BT_Type* BTx);
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/* µÍλ¼ÓÔØ¿ØÖÆ (Counter lowend load enable)
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д1½«Ô¤ÖÃÊý¼Ä´æÆ÷PRESETLºÍ¼ÓÔؼĴæÆ÷LOADL·Ö±ð¼ÓÔص½¼ÆÊýÖµ¼Ä´æÆ÷ET1CNTLºÍ±È½Ï¼Ä´æÆ÷ET1CMPL£¬Ð´0ÎÞЧ£¬¸ÃλӲ¼þ×Ô¶¯Çå0¡£ÔÚ16λµÄ¶¨Ê±/¼ÆÊýÏÂLHEN×÷Ϊ¼ÆÊýÆ÷µÄ¼ÓÔØ¿ØÖÆ£¬LLEN×Ô¶¯Ê§Ð§ Ïà¹Øº¯Êý */
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extern void BTx_LOADCR_LLEN_Setable(BT_Type* BTx, FunState NewState);
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extern FunState BTx_LOADCR_LLEN_Getable(BT_Type* BTx);
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/* ¼ÆÊýÆ÷µÍλ¼ÆÊýÖµ¼Ä´æÆ÷ (counter lowend)
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LLENÓÐЧʱ¼ÓÔØÔ¤ÖÃÊýµ½¸Ã¼Ä´æÆ÷¡£ Ïà¹Øº¯Êý */
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extern uint32_t BTx_CNTL_Read(BT_Type* BTx);
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/* ¼ÆÊýÆ÷¸ßλ¼ÆÊýÖµ¼Ä´æÆ÷ (counter highend)
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LHENÓÐЧʱ¼ÓÔØÔ¤ÖÃÊýµ½¸Ã¼Ä´æÆ÷¡£ Ïà¹Øº¯Êý */
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extern uint32_t BTx_CNTH_Read(BT_Type* BTx);
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/* ¼ÆÊýÆ÷¸ßλԤÖÃÊý¼Ä´æÆ÷ (preset highend)
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ÓÃÓÚ±£´æ¸ßλ¼ÆÊýÆ÷³õÖµ£¬»ò±£´æ²¶×½½á¹û¸ß8bit Ïà¹Øº¯Êý */
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extern void BTx_PRESET_PRESETH_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_PRESET_PRESETH_Get(BT_Type* BTx);
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/* ¼ÆÊýÆ÷µÍλԤÖÃÊý¼Ä´æÆ÷ (preset lowend)
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ÓÃÓÚ±£´æµÍλ¼ÆÊýÆ÷³õÖµ£¬»ò±£´æ²¶×½½á¹ûµÍ8bit Ïà¹Øº¯Êý */
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extern void BTx_PRESET_PRESETL_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_PRESET_PRESETL_Get(BT_Type* BTx);
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/* ¼ÆÊýÆ÷µÍλ¼ÓÔؼĴæÆ÷ (load lowend counter)
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ÔÚ¼ÆÊýÆ¥Åä»òÖ´ÐмÓÔØÃüÁîʱ½«¼ÓÔؼĴæÆ÷µÄÖµ¼ÓÔØÖÁ±È½Ï¹¤×÷¼Ä´æÆ÷¡£ Ïà¹Øº¯Êý */
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extern void BTx_LOADL_Write(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_LOADL_Read(BT_Type* BTx);
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/* ¼ÆÊýÆ÷¸ßλ¼ÓÔؼĴæÆ÷ (load highend counter)
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ÔÚ¼ÆÊýÆ¥Åä»òÖ´ÐмÓÔØÃüÁîʱ½«¼ÓÔؼĴæÆ÷µÄÖµ¼ÓÔØÖÁ±È½Ï¹¤×÷¼Ä´æÆ÷¡£µ±¹¤×÷ÔÚ8λ¶¨Ê±/¼ÆÊýÆ÷ģʽʱ£¬¸Ã¸ßλ¼ÓÔؼĴæÆ÷²»Ö§³Ö¼ÓÔØֵΪ0x00µÄÉèÖᣠÏà¹Øº¯Êý */
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extern void BTx_LOADH_Write(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_LOADH_Read(BT_Type* BTx);
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/* ¼ÆÊýÆ÷µÍλ±È½Ï¼Ä´æÆ÷ (compare lowend )
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¼ÓÔؼĴæÆ÷µÄÖµ¼ÓÔغó½«Ð´Èë¸Ã¼Ä´æÆ÷£¬¸Ã¼Ä´æÆ÷Óë¼ÆÊýÆ÷±È½Ï£¬Èô¼ÆÊýÖµ´óÓÚµÈÓڸüĴæÆ÷µÄÖµ£¬Ôò²úÉú¼ÆÊýÆ¥ÅäÐźÅÖÁÊä³ö¿ØÖÆÄ£¿é£¬²¢²úÉúÏàÓ¦Öжϡ£ Ïà¹Øº¯Êý */
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extern void BTx_CMPL_Write(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_CMPL_Read(BT_Type* BTx);
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/* ¼ÆÊýÆ÷¸ßλ±È½Ï¼Ä´æÆ÷ (compare highend)
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¼ÓÔؼĴæÆ÷µÄÖµ¼ÓÔغó½«Ð´Èë¸Ã¼Ä´æÆ÷£¬¸Ã¼Ä´æÆ÷Óë¼ÆÊýÆ÷±È½Ï£¬Èô¼ÆÊýÖµ´óÓÚµÈÓڸüĴæÆ÷µÄÖµ£¬Ôò²úÉú¼ÆÊýÆ¥ÅäÐźÅÖÁÊä³ö¿ØÖÆÄ£¿é£¬²¢²úÉúÏàÓ¦Öжϡ£ Ïà¹Øº¯Êý */
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extern void BTx_CMPH_Write(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_CMPH_Read(BT_Type* BTx);
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/* ¼ÆÊýÆ÷Êä³öÂö³å¿í¶È¼ÆÊýÆ÷ (output pulse width counter)
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¸Ã¼Ä´æÆ÷ÓÃÓÚµ÷ÕûÊä³öÂö³å¿í¶È¡£¼ÆÊýʱÖÓΪ32768Hz£¬¶ÔÓ¦µÄÊä³öÂö³å¿í¶È·¶Î§Îª30.5uS~125mS¡£Êä³öÂö³å¿í¶È=(OUTCNT+1)/32768Ãë Ïà¹Øº¯Êý */
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extern void BTx_OUTCNT_Write(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_OUTCNT_Read(BT_Type* BTx);
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extern void BTx_OCR_OUTCLR_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_OCR_OUTCLR_Get(BT_Type* BTx);
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extern void BTx_OCR_OUTINV_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_OCR_OUTINV_Get(BT_Type* BTx);
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extern void BTx_OCR_OUTMOD_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_OCR_OUTMOD_Get(BT_Type* BTx);
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extern void BTx_OCR_OUTSEL_Set(BT_Type* BTx, uint32_t SetValue);
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extern uint32_t BTx_OCR_OUTSEL_Get(BT_Type* BTx);
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/* À©Õ¹¶¨Ê±Æ÷¸ßλ±È½Ï·¢ÉúÐźŠ(compare highend interrupt enable)
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1 = ÖжÏʹÄÜ
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0 = ÖжϽûÖ¹ Ïà¹Øº¯Êý */
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extern void BTx_IER_CMPHIE_Setable(BT_Type* BTx, FunState NewState);
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extern FunState BTx_IER_CMPHIE_Getable(BT_Type* BTx);
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/* À©Õ¹¶¨Ê±Æ÷µÍλ±È½Ï·¢ÉúÐźŠ(compare lowend interrupt enable)
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1 = ÖжÏʹÄÜ
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0 = ÖжϽûÖ¹ Ïà¹Øº¯Êý */
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extern void BTx_IER_CMPLIE_Setable(BT_Type* BTx, FunState NewState);
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extern FunState BTx_IER_CMPLIE_Getable(BT_Type* BTx);
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/* ¶¨Ê±Æ÷¸ßλÒç³öÐźŠ(highend overflow interrupt enable)
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1 = ÖжÏʹÄÜ
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0 = ÖжϽûÖ¹ Ïà¹Øº¯Êý */
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extern void BTx_IER_OVHIE_Setable(BT_Type* BTx, FunState NewState);
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extern FunState BTx_IER_OVHIE_Getable(BT_Type* BTx);
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/* ¶¨Ê±Æ÷µÍλÒç³öÐźŠ(lowend overflow interrupt enable)
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1 = ÖжÏʹÄÜ
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0 = ÖжϽûÖ¹ Ïà¹Øº¯Êý */
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extern void BTx_IER_OVLIE_Setable(BT_Type* BTx, FunState NewState);
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extern FunState BTx_IER_OVLIE_Getable(BT_Type* BTx);
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/* ¶¨Ê±Æ÷²¶×½²úÉúÐźŠ(capture interrupt enable)
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1 = ÖжÏʹÄÜ
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0 = ÖжϽûÖ¹ Ïà¹Øº¯Êý */
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extern void BTx_IER_CAPIE_Setable(BT_Type* BTx, FunState NewState);
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extern FunState BTx_IER_CAPIE_Getable(BT_Type* BTx);
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/* ²¶×½ÑØ״̬
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1 = ²¶×½µ½ÏÂÑØ
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0 = ²¶×½µ½ÉÏÑØ */
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extern FlagStatus BTx_ISR_EDGESTA_Chk(BT_Type* BTx);
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/* ¶¨Ê±Æ÷¸ßλ±È½Ï·¢ÉúÐźŠ(compare highend interrupt flag)
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1 = µ±Ç°¼ÆÊýÆ÷µÄÖµ´óÓÚµÈÓڱȽϼĴæÆ÷µÄÖµ£¬¸ÃÐźŽ«ÖØмÓÔØеļÓÔؼĴæÆ÷µÄÖµµ½¹¤×÷¼Ä´æÆ÷¡£
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0 = µ±Ç°¼ÆÊýÆ÷µÄֵСÓڱȽϼĴæÆ÷µÄÖµ Ïà¹Øº¯Êý */
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extern void BTx_ISR_CMPHIF_Clr(BT_Type* BTx);
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extern FlagStatus BTx_ISR_CMPHIF_Chk(BT_Type* BTx);
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/* ¶¨Ê±Æ÷µÍλ±È½Ï·¢ÉúÐźŠ(compare lowend interrupt flag)
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1 = µ±Ç°¼ÆÊýÆ÷µÄÖµ´óÓÚµÈÓڱȽϼĴæÆ÷µÄÖµ£¬¸ÃÐźŽ«ÖØмÓÔØеļÓÔؼĴæÆ÷µÄÖµµ½¹¤×÷¼Ä´æÆ÷¡£
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0 = µ±Ç°¼ÆÊýÆ÷µÄֵСÓڱȽϼĴæÆ÷µÄÖµ Ïà¹Øº¯Êý */
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extern void BTx_ISR_CMPLIF_Clr(BT_Type* BTx);
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extern FlagStatus BTx_ISR_CMPLIF_Chk(BT_Type* BTx);
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/* ¶¨Ê±Æ÷¸ßλÒç³öÐźŠ(highend overflow interrupt flag)
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1 = ²úÉú¼ÆÊýÒç³ö
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0 = δ²úÉúÒç³ö Ïà¹Øº¯Êý */
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extern void BTx_ISR_OVHIF_Clr(BT_Type* BTx);
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extern FlagStatus BTx_ISR_OVHIF_Chk(BT_Type* BTx);
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/* ¶¨Ê±Æ÷µÍλÒç³öÐźŠ(lowend overflow interrupt flag)
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1 = ²úÉú¼ÆÊýÒç³ö
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0 = δ²úÉúÒç³ö Ïà¹Øº¯Êý */
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extern void BTx_ISR_OVLIF_Clr(BT_Type* BTx);
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extern FlagStatus BTx_ISR_OVLIF_Chk(BT_Type* BTx);
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/* ¶¨Ê±Æ÷²¶×½²úÉúÐźŠ(capture interrupt flag)
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1 = ²¶×½µ½Ö¸¶¨µÄÑØ
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0 = δ²¶×½µ½Ö¸¶¨µÄÑØ Ïà¹Øº¯Êý */
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extern void BTx_ISR_CAPIF_Clr(BT_Type* BTx);
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extern FlagStatus BTx_ISR_CAPIF_Chk(BT_Type* BTx);
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//Announce_End
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#ifdef __cplusplus
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}
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#endif
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#endif /*__FM33A0XXEV_BT_H */
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