#include "tim.h"
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#include "master_slave_inter.h"
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#include "power_manage.h"
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#include "valve_control.h"
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#include "multi_button.h"
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#include "gpio.h"
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uint8_t first_power_tim_cnt_g = 5;
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//void BSTIM_IRQHandler(void)
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//{
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//
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// if(BSTIM_ISR_UIF_Chk()!=RESET) //¿ª/¹Ø·§Ê±¼ä
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// {
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// BSTIM_ISR_UIF_Clr();
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// if (__SYS_STATUS_BYTES_GET(valve_state) == VALVE_CLOSING || __SYS_STATUS_BYTES_GET(valve_state) == VALVE_OPENING)
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// {
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// valve_signal_complete_g = SET; //µ½Î»ÐźÅ
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// VALVE_SLEEP;
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// VALVE_PWR_OFF; // ¹Ø±ÕµçÔ´
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// if(sys_bst_flag == 0)
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// SYS_BST_DIS;
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// }
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// }
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//
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//}
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void BTx_IRQHandler(void)
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{
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if( BTx_ISR_CMPHIF_Chk(BT1)==SET) //¼ì¶¨ÖÜÆÚ
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{
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BTx_ISR_CMPLIF_Clr(BT1);
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BTx_ISR_CMPHIF_Clr(BT1);
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sys_time_g.sys_cal_run_period = SET;//ÐÄÌøʱ¼ä
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}else if(BTx_ISR_CMPHIF_Chk(BT2)==SET)
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{
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BTx_ISR_CMPLIF_Clr(BT2);
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BTx_ISR_CMPHIF_Clr(BT2);
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++first_power_tim_cnt_g;
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if(first_power_tim_cnt_g % 5 == 0)
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{
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pwr_vol_g.lith_flag = LMS_PERIOD;//Ê×´ÎÉϵ磬µçѹ¶à´Î¼ì²â´¦Àí
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if(++first_power_get_cnt_g >= FIRST_POWER_TIM_MAX)
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BTx_CR1_CHEN_Setable(BT2,DISABLE);
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}
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}
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}
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void LPTIM_IRQHandler(void) //°´¼üÖÜÆÚ¼ì²â
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{
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if(SET == LPTIM_ISR_OVIF_Chk() && ENABLE == LPTIM_CR_EN_Getable())
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{
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LPTIM_ISR_OVIF_Clr(); /* Çå³ý¼ÆÊýÆ÷Öжϱê־λ */
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button_ticks();//Ö´ÐÐButtonɨÃè
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}
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}
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/******************************************
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* func: BasicTimer16_Init£¨ÓÃÓڼ춨ÖÜÆÚʱ¼ä¿ØÖÆ£©
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£¨×ʱ¼ä£º65535 * 256 / APB1£¨12Mhz£© = 1.39808Ã룩
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* desc: ͨÓö¨Ê±Æ÷¼¶Áª16λ³õʼ»¯
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* input: BTx £ºÑ¡ÔñͨÓö¨Ê±Æ÷1 or 2
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Psc £º8λµÄÔ¤·ÖÅäϵÊý 1~256
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Arr : 16λµÄÖØ×°ÔØÖµ 1~65535
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* output: none
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* return: none
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*****************************************/
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void BasicTimer16_Init(BT_Type* BTx,uint8_t Psc,uint16_t Arr)
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{
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if((BTx != BT1) && (BTx != BT2))
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return;
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if(BTx == BT1)
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CMU_PERCLK_SetableEx(BT1CLK, ENABLE);
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else
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CMU_PERCLK_SetableEx(BT2CLK, ENABLE);
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BTx_CR1_MODE_Set(BTx,BTx_CR1_MODE_COUNTER); //¼ÆÊýÆ÷ 8λ¶¨Ê±¼ÆÊýģʽ
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BTx_CR1_EDGESEL_Set(BTx,BTx_CR1_EDGESEL_FALLING); //ϽµÑØ ¼ÆÊýÔ´
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BTx_CR2_SIG2SEL_Set(BTx,BTx_CR2_SIG2SEL_GROUP1); //¼ÆÊýÔ´Ñ¡Ôñgroup1
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BTx_CFGR1_GRP1SEL_Set(BTx,BTx_CFGR1_GRP1SEL_APBCLK); //¼ÆÊýÔ´Ñ¡Ôñgroup1-APB
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BTx_PRES_Write(BTx,Psc - 1); //Ô¤·ÖƵ
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BTx_LOADL_Write(BTx,Arr & 0x00ff); //×°ÔØÖµ 8000(=0x1F40),¶¨Ê±³¤¶ÈΪ8000*100/8000000=100ms
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BTx_LOADH_Write(BTx,(Arr & 0xff00) >> 8);
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BTx_CR2_CNTHSEL_Set(BTx,BTx_CR2_CNTHSEL_COUNTER); //¸ßλÊÇÊäÈëԴΪµÍλ¼ÆÊýÆ÷£¬×é³É16λ¼ÆÊýÆ÷
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BTx_CR2_STDIR_Setable(BTx,DISABLE); //ÄÚ²¿DIR¿ØÖÆÐźţ¬µ±DIRENΪ0£¬¼´ÍⲿÊäÈëDIR¿ØÖÆÎÞЧʱ£¬¿ÉÓɸÃÐźŴúÌæDIRÊäÈ룬ֱ½Ó¿ØÖÆÄÚ²¿¼ÆÊýÆ÷µÄ¼ÆÊý¡£µ±ÐèÒªÍⲿDIRÊäÈ룬¼´DIRENΪ1ʱ£¬¸ÃλӦÉèÖÃΪ0 (set direction)
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BTx_ISR_CMPHIF_Clr(BTx);
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BTx_LOADCR_LLEN_Setable(BTx,ENABLE); //¼ÓÔؼĴæÆ÷LʹÄÜ
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BTx_LOADCR_LHEN_Setable(BTx,ENABLE); //¼ÓÔؼĴæÆ÷HʹÄÜ
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NVIC_DisableIRQ(BTx_IRQn);
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NVIC_SetPriority(BTx_IRQn,1);
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NVIC_EnableIRQ(BTx_IRQn);
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BTx_IER_CMPHIE_Setable(BTx,ENABLE); //¶¨Ê±Æ÷¸ßλ±È½ÏʹÄÜ
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BTx_IER_OVHIE_Setable(BTx,ENABLE); //¶¨Ê±Æ÷¸ßλÒç³öʹÄÜ
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// BTx_CR1_CHEN_Setable(BTx,ENABLE); //¿ªÆô16λ¼ÆÊý
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}
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/******************************************
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* func: TxtendTimer16_Init £¨ÓÃÓÚ°´¼üÆô¶¯Ä³¹¦ÄÜʧ°ÜµÄ³ÖÐøÏÔʾʱ¼ä£¬È磺Çл»Ä£Ê½£¬Ô¶´«Éϱ¨µÈ£©
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£¨×ʱ¼ä£º65535 * 256 / APB1£¨12Mhz£© = 1.39808Ã룩
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* desc: À©Õ¹¶¨Ê±Æ÷16λ³õʼ»¯
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* input: ETx £ºÑ¡ÔñÀ©Õ¹¶¨Ê±Æ÷1 or 2 or 3 or 4
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Psc £º8λµÄÔ¤·ÖÅäϵÊý 1~256
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Arr : 16λµÄÖØ×°ÔØÖµ 1~65535
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* output: none
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* return: none
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*****************************************/
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void TxtendTimer16_Init(ET_Type* ETx,uint8_t Psc,uint16_t Arr)
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{
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if((ETx != ET1) && (ETx == ET2) && (ETx == ET3) && (ETx == ET4)) return;
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if(ETx == ET1)
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CMU_PERCLK_SetableEx(ET1CLK, ENABLE);
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else if(ETx == ET2)
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CMU_PERCLK_SetableEx(ET2CLK, ENABLE);
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else if(ETx == ET3)
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CMU_PERCLK_SetableEx(ET3CLK, ENABLE);
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else
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CMU_PERCLK_SetableEx(ET4CLK, ENABLE);
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ETx_CR_MOD_Set(ETx,ETx_CR_MOD_COUNTER); //¶¨Ê±Æ÷ģʽ
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ETx_CR_CASEN_Set(ETx,ETx_CR_CASEN_16BITS); //16λ¶¨Ê±Æ÷
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ETx_CR_EDGESEL_Set(ETx,ETx_CR_EDGESEL_FALLING); //ϽµÑØ
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//ETx_CR_PWM_Setable(ETx,ENABLE);
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//ETx_CR_OPOL_Set(ETx,0x01<<10);
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ETx_INSR_SIG1SEL_Set(ETx,ETx_INSR_SIG1SEL_GROUP1); //group1 ´Ë´¦×¢ÒâÔÚ²»Í¬ETÖУ¬ÏàͬµÄÅäÖÃʱÖÓÔ´Ñ¡Ôñ²»¾¡Ïàͬ£¬Òò´ËÔ¤¶¨ÒåÓÐÇø·Ö
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if(ETx==ET1)
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ETx_INSR_GRP1SEL_Set(ETx, ETx_INSR_GRP1SEL_ET1_APBCLK); //APB
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else if(ETx==ET2)
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ETx_INSR_GRP1SEL_Set(ETx, ETx_INSR_GRP1SEL_ET2_APBCLK); //APB
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else if(ETx==ET3)
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ETx_INSR_GRP1SEL_Set(ETx, ETx_INSR_GRP1SEL_ET3_APBCLK); //APB
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else
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ETx_INSR_GRP1SEL_Set(ETx, ETx_INSR_GRP1SEL_ET4_APBCLK); //APB
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ETx_PSCR1_Write(ETx,Psc - 1); //¼ÆÊýÔ´Ô¤·ÖƵ10
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ETx_IVR_Write(ETx,0xFFFF - Arr); //¼ÆÊýÔ´³õÖµ
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ETx_ISR_OVIF_Clr(ET1);
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// NVIC_DisableIRQ(ETx_IRQn);
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// NVIC_SetPriority(ETx_IRQn,3);
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// NVIC_EnableIRQ(ETx_IRQn);
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// ETx_IER_OVIE_Setable(ETx,ENABLE);
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}
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/******************************************
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* func: BsTimer_Init£¨ÓÃÓÚ¿ª/¹Ø·§Ê±¼ä£©
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* desc: »ù±¾¶¨Ê±Æ÷³õʼ»¯
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* input: Psc £º16λµÄÔ¤·ÖÅäϵÊý 1~65536
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Arr : 32λµÄÖØ×°ÔØÖµ
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* output: none
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* return: none
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*****************************************/
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void BsTimer_Init(uint16_t Psc,uint32_t Arr)
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{
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CMU_PERCLK_SetableEx(BSTIMCLK, ENABLE); //ÍâÉè×ÜÏßʱÖÓʹÄÜ
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CMU_OPCCR2_BSTCKS_Set(CMU_OPCCR2_BSTCKS_SYSCLK); //Ñ¡Ôñ¹¤×÷ʱÖÓÔ´
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CMU_OPCCR2_BSTCKE_Setable(ENABLE); //¹¤×÷ʱÖÓԴʹÄÜ
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BSTIM_CR1_ARPE_Setable(ENABLE); //ԤװÔØʹÄÜ
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BSTIM_CR1_OPM_Set(BSTIM_CR1_OPM_STOP); //Update Event·¢Éúʱ¼ÆÊýÆ÷Í£Ö¹£¨×Ô¶¯ÇåÁãCEN£©
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BSTIM_PSCR_Write(Psc - 1);
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BSTIM_ARR_Write(Arr - 1);
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NVIC_DisableIRQ(BSTIM_IRQn );
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NVIC_SetPriority(BSTIM_IRQn ,2); //ÖжÏÓÅÏȼ¶ÅäÖÃ
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NVIC_EnableIRQ(BSTIM_IRQn );
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/*½â¾ö¿ªÆô¶¨Ê±Æ÷»áÖ±½Ó½øÈëÒ»´ÎÖжϵÄÎÊÌâ*/
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BSTIM_CR1_CEN_Setable(ENABLE); //¼ÆÊýÆ÷ʹÄÜ
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BSTIM_ISR_UIF_Clr();
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BSTIM_IER_UIE_Setable(ENABLE); //UpdateÖжÏʹÄÜ
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}
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/******************************************
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* func: LowPowerTimer_Init£¨°´¼ü¼ì²â£©
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* desc: µÍ¹¦ºÄ¶¨Ê±Æ÷³õʼ»¯
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* input: Arr : 32λµÄÖØ×°ÔØÖµ
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* output: none
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* return: none
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*****************************************/
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void LowPowerTimer_Init(uint32_t Arr)
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{
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CMU_PERCLK_SetableEx(LPTCLK, ENABLE); //ÍâÉè×ÜÏßʱÖÓʹÄÜ
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CMU_OPCCR2_LPTCKS_Set(CMU_OPCCR2_LPTCKS_APBCLK);//Ñ¡Ôñ¹¤×÷ʱÖÓÔ´
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CMU_OPCCR2_LPTCKE_Setable(ENABLE); //¹¤×÷ʱÖÓԴʹÄÜ
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LPTIM_CFGR_ETR_AFEN_Setable(DISABLE);//ETRÊäÈëÂ˲¨
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LPTIM_CFGR_PSCSEL_Set(LPTIM_CFGR_PSCSEL_CLKSEL); //ʱÖÓÑ¡Ôñ
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LPTIM_CFGR_DIVSEL_Set(LPTIM_CFGR_DIVSEL_DIV128); //ʱÖÓ·ÖƵѡÔñ
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LPTIM_CFGR_ONST_Set(LPTIM_CFGR_ONST_CONTINUE); //·¢Éú¼ÆÊýÆ÷²»Í£Ö¹
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LPTIM_CFGR_TMODE_Set(LPTIM_CFGR_TMODE_COUNTER);//ÆÕͨ¶¨Ê±Æ÷ģʽ
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LPTIM_ARR_Write(Arr - 1);
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LPTIM_ISR_OVIF_Clr(); /* Çå³ý¼ÆÊýÆ÷Öжϱê־λ */
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LPTIM_IER_OVIE_Setable(ENABLE); /* ¿ªÆô¼ÆÊýÆ÷ÖÐ¶Ï */
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NVIC_DisableIRQ(LPTIM_IRQn);
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NVIC_SetPriority(LPTIM_IRQn,2);//ÖжÏÓÅÏȼ¶ÅäÖÃ
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NVIC_EnableIRQ(LPTIM_IRQn);
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LPTIM_CR_EN_Setable(ENABLE); /* ʹÄܼÆÊýÆ÷: */
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}
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