forked from SZV10X_Software/SZV103_FM33A0xxEV_SiZhu

jinlicong
2024-04-25 a12102b90bda2f409babc8c241bfc66118a8cb70
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#include "tim.h"
#include "rs485_read_data.h"
 
#include "gpio.h"
 
uint8_t first_power_tim_cnt_g = 5;
 
 
void BTx_IRQHandler(void)
{
//    if(    BTx_ISR_CMPHIF_Chk(BT1)==SET) //¼ì¶¨ÖÜÆÚ
//    {    
//        BTx_ISR_CMPLIF_Clr(BT1);
//        BTx_ISR_CMPHIF_Clr(BT1);
//        sys_time_g.sys_cal_run_period = SET;//ÐÄÌøÊ±¼ä
//    }else if(BTx_ISR_CMPHIF_Chk(BT2)==SET)
//    {
//        BTx_ISR_CMPLIF_Clr(BT2);
//        BTx_ISR_CMPHIF_Clr(BT2);
//        ++first_power_tim_cnt_g;
//        if(first_power_tim_cnt_g % 5 == 0)
//        {
//            pwr_vol_g.lith_flag = LMS_PERIOD;//Ê×´ÎÉϵ磬µçѹ¶à´Î¼ì²â´¦Àí
//            if(++first_power_get_cnt_g >= FIRST_POWER_TIM_MAX)
//                BTx_CR1_CHEN_Setable(BT2,DISABLE);
//        }
//            
//    }
}
 
void BSTIM_IRQHandler(void)
{   
    if(BSTIM_ISR_UIF_Chk()!=RESET)    
    {
      BSTIM_ISR_UIF_Clr();
    
  }
}
 
void LPTIM_IRQHandler(void) //°´¼üÖÜÆÚ¼ì²â
{
    if(SET == LPTIM_ISR_OVIF_Chk() && ENABLE == LPTIM_CR_EN_Getable())
    {
        LPTIM_ISR_OVIF_Clr(); /* Çå³ý¼ÆÊýÆ÷Öжϱê־λ */
//        button_ticks();//Ö´ÐÐButtonɨÃè
    }
}
 
/******************************************
 * func:    BasicTimer16_Init£¨ÓÃÓڼ춨ÖÜÆÚʱ¼ä¿ØÖÆ£©
                        £¨×ʱ¼ä£º65535 * 256 / APB1£¨12Mhz£© = 1.39808Ã룩
 * desc:    Í¨Óö¨Ê±Æ÷¼¶Áª16λ³õʼ»¯
 * input:   BTx £ºÑ¡ÔñͨÓö¨Ê±Æ÷1 or 2
                        Psc £º8λµÄÔ¤·ÖÅäϵÊý 1~256
                        Arr : 16λµÄÖØ×°ÔØÖµ 1~65535
 * output:  none
 * return:  none
 *****************************************/
void BasicTimer16_Init(BT_Type* BTx,uint8_t Psc,uint16_t Arr)
{
    if((BTx != BT1) && (BTx != BT2))
        return;       
    if(BTx == BT1)
        CMU_PERCLK_SetableEx(BT1CLK, ENABLE); 
    else
        CMU_PERCLK_SetableEx(BT2CLK, ENABLE);
    
    BTx_CR1_MODE_Set(BTx,BTx_CR1_MODE_COUNTER);                        //¼ÆÊýÆ÷  8λ¶¨Ê±¼ÆÊýģʽ                    
    BTx_CR1_EDGESEL_Set(BTx,BTx_CR1_EDGESEL_FALLING);                //ϽµÑØ   ¼ÆÊýÔ´  
    BTx_CR2_SIG2SEL_Set(BTx,BTx_CR2_SIG2SEL_GROUP1);                         //¼ÆÊýÔ´Ñ¡Ôñgroup1
    BTx_CFGR1_GRP1SEL_Set(BTx,BTx_CFGR1_GRP1SEL_APBCLK);            //¼ÆÊýÔ´Ñ¡Ôñgroup1-APB 
  
    BTx_PRES_Write(BTx,Psc - 1);                                        //Ô¤·ÖƵ
    BTx_LOADL_Write(BTx,Arr & 0x00ff);                                    //×°ÔØÖµ 8000(=0x1F40),¶¨Ê±³¤¶ÈΪ8000*100/8000000=100ms
    BTx_LOADH_Write(BTx,(Arr & 0xff00) >> 8);
    
    BTx_CR2_CNTHSEL_Set(BTx,BTx_CR2_CNTHSEL_COUNTER);                //¸ßλÊÇÊäÈëԴΪµÍλ¼ÆÊýÆ÷£¬×é³É16λ¼ÆÊýÆ÷
    BTx_CR2_STDIR_Setable(BTx,DISABLE);                            //ÄÚ²¿DIR¿ØÖÆÐźţ¬µ±DIRENΪ0£¬¼´ÍⲿÊäÈëDIR¿ØÖÆÎÞЧʱ£¬¿ÉÓɸÃÐźŴúÌæDIRÊäÈ룬ֱ½Ó¿ØÖÆÄÚ²¿¼ÆÊýÆ÷µÄ¼ÆÊý¡£µ±ÐèÒªÍⲿDIRÊäÈ룬¼´DIRENΪ1ʱ£¬¸ÃλӦÉèÖÃΪ0 (set direction)
    BTx_ISR_CMPHIF_Clr(BTx);
    BTx_LOADCR_LLEN_Setable(BTx,ENABLE);      //¼ÓÔØ¼Ä´æÆ÷LʹÄÜ
    BTx_LOADCR_LHEN_Setable(BTx,ENABLE);        //¼ÓÔØ¼Ä´æÆ÷HʹÄÜ
  
 
    NVIC_DisableIRQ(BTx_IRQn);
    NVIC_SetPriority(BTx_IRQn,1);
    NVIC_EnableIRQ(BTx_IRQn);
    
    BTx_IER_CMPHIE_Setable(BTx,ENABLE);    //¶¨Ê±Æ÷¸ßλ±È½ÏʹÄÜ
    BTx_IER_OVHIE_Setable(BTx,ENABLE);    //¶¨Ê±Æ÷¸ßλÒç³öʹÄÜ    
    
//    BTx_CR1_CHEN_Setable(BTx,ENABLE);    //¿ªÆô16λ¼ÆÊý
}
 
/******************************************
 * func:    TxtendTimer16_Init £¨ÓÃÓÚ°´¼üÆô¶¯Ä³¹¦ÄÜʧ°ÜµÄ³ÖÐøÏÔʾʱ¼ä£¬È磺Çл»Ä£Ê½£¬Ô¶´«Éϱ¨µÈ£©
                        £¨×ʱ¼ä£º65535 * 256 / APB1£¨12Mhz£© = 1.39808Ã룩
 * desc:    À©Õ¹¶¨Ê±Æ÷16λ³õʼ»¯
 * input:   ETx £ºÑ¡ÔñÀ©Õ¹¶¨Ê±Æ÷1 or 2 or 3 or 4
                        Psc £º8λµÄÔ¤·ÖÅäϵÊý 1~256
                        Arr : 16λµÄÖØ×°ÔØÖµ 1~65535
 * output:  none
 * return:  none
 *****************************************/
void TxtendTimer16_Init(ET_Type* ETx,uint8_t Psc,uint16_t Arr)
{
    if((ETx != ET1) && (ETx == ET2) && (ETx == ET3) && (ETx == ET4))    return;
    
    if(ETx == ET1)
        CMU_PERCLK_SetableEx(ET1CLK, ENABLE); 
    else if(ETx == ET2)
        CMU_PERCLK_SetableEx(ET2CLK, ENABLE); 
    else if(ETx == ET3)
        CMU_PERCLK_SetableEx(ET3CLK, ENABLE); 
    else 
        CMU_PERCLK_SetableEx(ET4CLK, ENABLE); 
    ETx_CR_MOD_Set(ETx,ETx_CR_MOD_COUNTER);                                //¶¨Ê±Æ÷ģʽ
    ETx_CR_CASEN_Set(ETx,ETx_CR_CASEN_16BITS);                            //16λ¶¨Ê±Æ÷
    ETx_CR_EDGESEL_Set(ETx,ETx_CR_EDGESEL_FALLING);                        //ϽµÑØ    
    //ETx_CR_PWM_Setable(ETx,ENABLE);
    //ETx_CR_OPOL_Set(ETx,0x01<<10);
    
    ETx_INSR_SIG1SEL_Set(ETx,ETx_INSR_SIG1SEL_GROUP1);                    //group1 ´Ë´¦×¢ÒâÔÚ²»Í¬ETÖУ¬ÏàͬµÄÅäÖÃʱÖÓÔ´Ñ¡Ôñ²»¾¡Ïàͬ£¬Òò´ËÔ¤¶¨ÒåÓÐÇø·Ö
    if(ETx==ET1)
        ETx_INSR_GRP1SEL_Set(ETx,    ETx_INSR_GRP1SEL_ET1_APBCLK);        //APB
    else if(ETx==ET2)
        ETx_INSR_GRP1SEL_Set(ETx,    ETx_INSR_GRP1SEL_ET2_APBCLK);        //APB
    else if(ETx==ET3)
        ETx_INSR_GRP1SEL_Set(ETx,    ETx_INSR_GRP1SEL_ET3_APBCLK);        //APB
    else
        ETx_INSR_GRP1SEL_Set(ETx,    ETx_INSR_GRP1SEL_ET4_APBCLK);        //APB    
    ETx_PSCR1_Write(ETx,Psc - 1);                                            //¼ÆÊýÔ´Ô¤·ÖƵ10
    ETx_IVR_Write(ETx,0xFFFF - Arr);                                        //¼ÆÊýÔ´³õÖµ 
    
    ETx_ISR_OVIF_Clr(ET1);
    
//        NVIC_DisableIRQ(ETx_IRQn);
//        NVIC_SetPriority(ETx_IRQn,3);
//        NVIC_EnableIRQ(ETx_IRQn);
//        ETx_IER_OVIE_Setable(ETx,ENABLE);
}
 
 
/******************************************
 * func:    BsTimer_Init£¨ÓÃÓÚ¿ª/¹Ø·§Ê±¼ä£©
 * desc:    »ù±¾¶¨Ê±Æ÷³õʼ»¯
 * input:   Psc £º16λµÄÔ¤·ÖÅäϵÊý 1~65536
                        Arr : 32λµÄÖØ×°ÔØÖµ
 * output:  none
 * return:  none
 *****************************************/
void BsTimer_Init(uint16_t Psc,uint32_t Arr)
{
        CMU_PERCLK_SetableEx(BSTIMCLK, ENABLE);             //ÍâÉè×ÜÏßʱÖÓʹÄÜ
    CMU_OPCCR2_BSTCKS_Set(CMU_OPCCR2_BSTCKS_SYSCLK);    //Ñ¡Ôñ¹¤×÷ʱÖÓÔ´
    CMU_OPCCR2_BSTCKE_Setable(ENABLE);                    //¹¤×÷ʱÖÓԴʹÄÜ
 
    BSTIM_CR1_ARPE_Setable(ENABLE);                     //Ô¤×°ÔØÊ¹ÄÜ
    BSTIM_CR1_OPM_Set(BSTIM_CR1_OPM_STOP);                  //Update Event·¢Éúʱ¼ÆÊýÆ÷Í£Ö¹£¨×Ô¶¯ÇåÁãCEN£©
 
    BSTIM_PSCR_Write(Psc - 1);
    BSTIM_ARR_Write(Arr - 1);  
        
    NVIC_DisableIRQ(BSTIM_IRQn );
    NVIC_SetPriority(BSTIM_IRQn ,2);                    //ÖжÏÓÅÏȼ¶ÅäÖÃ
    NVIC_EnableIRQ(BSTIM_IRQn );
        
        /*½â¾ö¿ªÆô¶¨Ê±Æ÷»áÖ±½Ó½øÈëÒ»´ÎÖжϵÄÎÊÌâ*/
    BSTIM_CR1_CEN_Setable(ENABLE);                      //¼ÆÊýÆ÷ʹÄÜ
        BSTIM_ISR_UIF_Clr();
        BSTIM_IER_UIE_Setable(ENABLE);                      //UpdateÖжÏʹÄÜ    
        
}
 
/******************************************
 * func:    LowPowerTimer_Init£¨°´¼ü¼ì²â£©
 * desc:    µÍ¹¦ºÄ¶¨Ê±Æ÷³õʼ»¯
 * input:   Arr : 32λµÄÖØ×°ÔØÖµ
 * output:  none
 * return:  none
 *****************************************/
void LowPowerTimer_Init(uint32_t Arr)
{
    CMU_PERCLK_SetableEx(LPTCLK, ENABLE); //ÍâÉè×ÜÏßʱÖÓʹÄÜ
  CMU_OPCCR2_LPTCKS_Set(CMU_OPCCR2_LPTCKS_APBCLK);//Ñ¡Ôñ¹¤×÷ʱÖÓÔ´
  CMU_OPCCR2_LPTCKE_Setable(ENABLE);     //¹¤×÷ʱÖÓԴʹÄÜ
 
  LPTIM_CFGR_ETR_AFEN_Setable(DISABLE);//ETRÊäÈëÂ˲¨
  LPTIM_CFGR_PSCSEL_Set(LPTIM_CFGR_PSCSEL_CLKSEL);  //ʱÖÓÑ¡Ôñ
  LPTIM_CFGR_DIVSEL_Set(LPTIM_CFGR_DIVSEL_DIV128);  //ʱÖÓ·ÖÆµÑ¡Ôñ
  LPTIM_CFGR_ONST_Set(LPTIM_CFGR_ONST_CONTINUE); //·¢Éú¼ÆÊýÆ÷²»Í£Ö¹
  LPTIM_CFGR_TMODE_Set(LPTIM_CFGR_TMODE_COUNTER);//ÆÕͨ¶¨Ê±Æ÷ģʽ
 
  LPTIM_ARR_Write(Arr - 1); 
 
  LPTIM_ISR_OVIF_Clr(); /* Çå³ý¼ÆÊýÆ÷Öжϱê־λ */
  LPTIM_IER_OVIE_Setable(ENABLE);  /* ¿ªÆô¼ÆÊýÆ÷ÖжϠ*/
 
  NVIC_DisableIRQ(LPTIM_IRQn);
  NVIC_SetPriority(LPTIM_IRQn,2);//ÖжÏÓÅÏȼ¶ÅäÖÃ
  NVIC_EnableIRQ(LPTIM_IRQn);
 
  LPTIM_CR_EN_Setable(ENABLE);   /* Ê¹ÄܼÆÊýÆ÷: */    
}