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@CJPapG $ @ ..\\Drivers\\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: armasm [4d35fa] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM __asm___16_fm33a0xxev_cmu_c_a224406a____REV16 P 9 ..\\Core\\Include\\ core_cminstr.h ..\\Drivers\\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: armasm [4d35fa] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM __asm___16_fm33a0xxev_cmu_c_a224406a____REVSH P 9 ..\\Core\\Include\\ core_cminstr.h 0 ÿÿÿÿarmcc+ |
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..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM " ?ªCMU_SYSCLKCR_SLP_ENEXTI_Setable " iNewState 1 0 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >°%
|
CMU_SYSCLKCR_SLP_ENEXTI_Getable 1 ___result 1 4 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?³7CMU_SYSCLKCR_APBPRES_Set iSetValue v Xtmpreg v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >¨@
|
CMU_SYSCLKCR_APBPRES_Get v ^__result v P
|
4 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?³KCMU_SYSCLKCR_AHBPRES_Set iSetValue v Xtmpreg v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >¨T
|
CMU_SYSCLKCR_AHBPRES_Get v ^__result v P
|
4 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?´^CMU_SYSCLKCR_STCLKSEL_Set iSetValue v Xtmpreg v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM
|
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|
CMU_SYSCLKCR_STCLKSEL_Get v
|
^__result v P 4 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?µmCMU_SYSCLKCR_SYSCLKSEL_Set iSetValue v Xtmpreg v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM
|
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|
CMU_SYSCLKCR_SYSCLKSEL_Get v
|
^__result v P 0 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?¯CMU_RCHFCR_FSEL_Set iSetValue v Xtmpreg v P $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >¤
|
CMU_RCHFCR_FSEL_Get v ^__result v P
|
$ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?¥CMU_RCHFCR_RCHFEN_Setable iNewState 1 , ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >«
|
CMU_RCHFCR_RCHFEN_Getable 1 ___result 1 4 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?³®CMU_RCHFTR_RCHFTRIM_Set iSetValue v Xtmpreg v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >¨·
|
CMU_RCHFTR_RCHFTRIM_Get v ^__result v P 0 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?°¼CMU_PLLLCR_PLLDB_Set iSetValue v Xtmpreg v P $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM
|
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|
CMU_PLLLCR_PLLDB_Get v
|
^__result v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >§Í CMU_PLLLCR_LOCKED_Chk õ ___result õ $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?¤ÜCMU_PLLLCR_PLLEN_Setable iNewState 1 ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >ªè
|
CMU_PLLLCR_PLLEN_Getable 1 ___result 1 0 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?±÷CMU_PLLHCR_PLLHDB_Set iSetValue v Xtmpreg v P $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM
|
>¦
|
CMU_PLLHCR_PLLHDB_Get v
|
^__result v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >§ CMU_PLLHCR_LOCKED_Chk õ ___result õ 0 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?²CMU_PLLHCR_REFPRSC_Set iSetValue v Xtmpreg v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM
|
>§¦
|
CMU_PLLHCR_REFPRSC_Get v
|
^__result v P 0 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?¯®CMU_PLLHCR_OSEL_Set iSetValue v Xtmpreg v P $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM
|
>¤·
|
CMU_PLLHCR_OSEL_Get v
|
^__result v P 0 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?°¿CMU_PLLHCR_INSEL_Set iSetValue v Xtmpreg v P $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM
|
>¥È
|
CMU_PLLHCR_INSEL_Get v
|
^__result v P ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?¡ÐCMU_PLLHCR_EN_Setable iNewState 1 ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >§Ü
|
CMU_PLLHCR_EN_Getable 1 ___result 1 4 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?³ëCMU_XTHFCR_XTHF_CFG_Set iSetValue v Xtmpreg v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >¨ô
|
CMU_XTHFCR_XTHF_CFG_Get v ^__result v P
|
$ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?¥üCMU_XTHFCR_XTHFEN_Setable iNewState 1 , ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >«
|
CMU_XTHFCR_XTHFEN_Getable 1 ___result 1 $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?¥CMU_IER_SYSCSE_IE_Setable iNewState 1 , ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >«
|
CMU_IER_SYSCSE_IE_Getable 1 ___result 1 $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?¤¬CMU_IER_HFDET_IE_Setable iNewState 1 ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >ª¸
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CMU_IER_HFDET_IE_Getable 1 ___result 1 $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >¤È CMU_ISR_HFDETO_Chk õ ___result õ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?ÖCMU_ISR_SYSCSE_IF_Clr ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >§Û CMU_ISR_SYSCSE_IF_Chk õ ___result õ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?èCMU_ISR_HFDET_IF_Clr $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >¦í CMU_ISR_HFDET_IF_Chk õ ___result õ $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?¦úCMU_OPCCR1_EXTICKE_Setable iNewState 1 , ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >¬
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CMU_OPCCR1_EXTICKE_Getable 1 ___result 1 4 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?´CMU_OPCCR1_EXTICKSEL_Set iSetValue v Xtmpreg v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >©
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CMU_OPCCR1_EXTICKSEL_Get v ^__result v P
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( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM " ?©¢CMU_OPCCR1_LPUART1CKE_Setable " iNewState 1 0 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >¯®
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CMU_OPCCR1_LPUART1CKE_Getable 1 ___result 1 ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM " ?©»CMU_OPCCR1_LPUART0CKE_Setable " iNewState 1 0 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >¯Ç
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CMU_OPCCR1_LPUART0CKE_Getable 1 ___result 1 4 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?µØCMU_OPCCR1_LPUART1CKS_Set iSetValue v Xtmpreg v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >ªá
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CMU_OPCCR1_LPUART1CKS_Get v ^__result v P
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4 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?µëCMU_OPCCR1_LPUART0CKS_Set iSetValue v Xtmpreg v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >ªô
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CMU_OPCCR1_LPUART0CKS_Get v ^__result v P
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$ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM " ?¦úCMU_OPCCR1_I2C1CKE_Setable " iNewState 1 , ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >¬
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CMU_OPCCR1_I2C1CKE_Getable 1 ___result 1 $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM " ?¦CMU_OPCCR1_I2C0CKE_Setable " iNewState 1 , ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >¬
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CMU_OPCCR1_I2C0CKE_Getable 1 ___result 1 0 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?²°CMU_OPCCR1_I2C1CKS_Set iSetValue v Xtmpreg v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >§¹
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CMU_OPCCR1_I2C1CKS_Get v ^__result v P
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0 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?²ÄCMU_OPCCR1_I2C0CKS_Set iSetValue v Xtmpreg v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >§Í
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CMU_OPCCR1_I2C0CKS_Get v ^__result v P
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( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM " ?§ÓCMU_OPCCR1_UART1CKE_Setable " iNewState 1 , ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >ß
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CMU_OPCCR1_UART1CKE_Getable 1 ___result 1 ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM " ?§ìCMU_OPCCR1_UART0CKE_Setable " iNewState 1 , ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >ø
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CMU_OPCCR1_UART0CKE_Getable 1 ___result 1 4 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?³CMU_OPCCR1_UART1CKS_Set iSetValue v Xtmpreg v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM
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>¨
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CMU_OPCCR1_UART1CKS_Get v
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^__result v P 4 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?³CMU_OPCCR1_UART0CKS_Set iSetValue v Xtmpreg v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM
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>¨¥
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CMU_OPCCR1_UART0CKS_Get v
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^__result v P 0 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?²²CMU_OPCCR2_RNGPRSC_Set iSetValue v Xtmpreg v P ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >§»
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CMU_OPCCR2_RNGPRSC_Get v ^__result v P
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$ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM " ?¥ÁCMU_OPCCR2_NVMCKE_Setable " iNewState 1 , ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >«Í
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CMU_OPCCR2_NVMCKE_Getable 1 ___result 1 $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM " ?¥ÚCMU_OPCCR2_RNGCKE_Setable " iNewState 1 , ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >«æ
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CMU_OPCCR2_RNGCKE_Getable 1 ___result 1 $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM " ?¥óCMU_OPCCR2_LPTCKE_Setable " iNewState 1 , ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >«ÿ
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CMU_OPCCR2_LPTCKE_Getable 1 ___result 1 0 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?±CMU_OPCCR2_LPTCKS_Set iSetValue v Xtmpreg v P $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >¦
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CMU_OPCCR2_LPTCKS_Get v ^__result v P
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$ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?¥CMU_OPCCR2_BSTCKE_Setable iNewState 1 , ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM >««
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CMU_OPCCR2_BSTCKE_Getable 1 ___result 1 0 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?±¼CMU_OPCCR2_BSTCKS_Set iSetValue v Xtmpreg v P $ ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM
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CMU_OPCCR2_BSTCKS_Get v
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^__result v P ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?ÊCMU_Deinit ( ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ?¨çCMU_GetClocksFreq ipara Z " Xtmp32 v S X ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM d ?×ÒCMU_PERCLK_SetableEx d iperiph_def v f iNewState 1 H Zp_reg f " ZTempREG v 5 ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ? CMU_RCHF_Init ipara j " ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM $ ? CMU_PLL_H_Init $ ipara p " ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ? CMU_SysClk_Init ipara v " , ..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM P ?®¨ CMU_Init_RCHF_Trim P iClkMode W 6 ZTemp32 v # < 2 ..\Drivers\fm33a0xxev_cmu.c \ 3 ..\Drivers\ fm33a0xxev_cmu.c 53 ` 3 ..\Drivers\ fm33a0xxev_cmu.c &3~ ` 3 ..\Drivers\ fm33a0xxev_cmu.c 7& T 3 ..\Drivers\ fm33a0xxev_cmu.c Á & d 3 ..\Drivers\ fm33a0xxev_cmu.c Ë & T 3 ..\Drivers\ fm33a0xxev_cmu.c Õ & d 3 ..\Drivers\ fm33a0xxev_cmu.c Þ T 3 ..\Drivers\ fm33a0xxev_cmu.c è d 3 ..\Drivers\ fm33a0xxev_cmu.c í T 3 ..\Drivers\ fm33a0xxev_cmu.c ÷ d 3 ..\Drivers\ fm33a0xxev_cmu.c & T 3 ..\Drivers\ fm33a0xxev_cmu.c & \ 3 ..\Drivers\ fm33a0xxev_cmu.c 5- ` 3 ..\Drivers\ fm33a0xxev_cmu.c -~ d 3 ..\Drivers\ fm33a0xxev_cmu.c ® T 3 ..\Drivers\ fm33a0xxev_cmu.c ¸ d 3 ..\Drivers\ fm33a0xxev_cmu.c ¼ T 3 ..\Drivers\ fm33a0xxev_cmu.c Æ ` 3 ..\Drivers\ fm33a0xxev_cmu.c Î-~ \ 3 ..\Drivers\ fm33a0xxev_cmu.c Ý5- ` 3 ..\Drivers\ fm33a0xxev_cmu.c é-~ d 3 ..\Drivers\ fm33a0xxev_cmu.c ÷ T 3 ..\Drivers\ fm33a0xxev_cmu.c ` 3 ..\Drivers\ fm33a0xxev_cmu.c -~ d 3 ..\Drivers\ fm33a0xxev_cmu.c T 3 ..\Drivers\ fm33a0xxev_cmu.c § d 3 ..\Drivers\ fm33a0xxev_cmu.c ® T 3 ..\Drivers\ fm33a0xxev_cmu.c ¸ d 3 ..\Drivers\ fm33a0xxev_cmu.c ¿ T 3 ..\Drivers\ fm33a0xxev_cmu.c É \ 3 ..\Drivers\ fm33a0xxev_cmu.c Ñ5- ` 3 ..\Drivers\ fm33a0xxev_cmu.c Ý-~ d 3 ..\Drivers\ fm33a0xxev_cmu.c ë& T 3 ..\Drivers\ fm33a0xxev_cmu.c õ& \ 3 ..\Drivers\ fm33a0xxev_cmu.c ý5- ` 3 ..\Drivers\ fm33a0xxev_cmu.c -~ \ 3 ..\Drivers\ fm33a0xxev_cmu.c 5- ` 3 ..\Drivers\ fm33a0xxev_cmu.c ¡-~ \ 3 ..\Drivers\ fm33a0xxev_cmu.c 5- ` 3 ..\Drivers\ fm33a0xxev_cmu.c ¹-~ ` 3 ..\Drivers\ fm33a0xxev_cmu.c É3~ T 3 ..\Drivers\ fm33a0xxev_cmu.c × ` 3 ..\Drivers\ fm33a0xxev_cmu.c Ü-~ T 3 ..\Drivers\ fm33a0xxev_cmu.c é ` 3 ..\Drivers\ fm33a0xxev_cmu.c î-~ \ 3 ..\Drivers\ fm33a0xxev_cmu.c û5- ` 3 ..\Drivers\ fm33a0xxev_cmu.c -~ d 3 ..\Drivers\ fm33a0xxev_cmu.c T 3 ..\Drivers\ fm33a0xxev_cmu.c & \ 3 ..\Drivers\ fm33a0xxev_cmu.c £53 ` 3 ..\Drivers\ fm33a0xxev_cmu.c ¯3~ \ 3 ..\Drivers\ fm33a0xxev_cmu.c ¼53 ` 3 ..\Drivers\ fm33a0xxev_cmu.c È3~ d 3 ..\Drivers\ fm33a0xxev_cmu.c Ø& T 3 ..\Drivers\ fm33a0xxev_cmu.c â& d 3 ..\Drivers\ fm33a0xxev_cmu.c ë& T 3 ..\Drivers\ fm33a0xxev_cmu.c õ& \ 3 ..\Drivers\ fm33a0xxev_cmu.c û53 ` 3 ..\Drivers\ fm33a0xxev_cmu.c 3~ \ 3 ..\Drivers\ fm33a0xxev_cmu.c 53 ` 3 ..\Drivers\ fm33a0xxev_cmu.c 3~ d 3 ..\Drivers\ fm33a0xxev_cmu.c °& T 3 ..\Drivers\ fm33a0xxev_cmu.c º& d 3 ..\Drivers\ fm33a0xxev_cmu.c Ä& T 3 ..\Drivers\ fm33a0xxev_cmu.c Î& \ 3 ..\Drivers\ fm33a0xxev_cmu.c Ô53 ` 3 ..\Drivers\ fm33a0xxev_cmu.c à3~ \ 3 ..\Drivers\ fm33a0xxev_cmu.c í53 ` 3 ..\Drivers\ fm33a0xxev_cmu.c ù3~ d 3 ..\Drivers\ fm33a0xxev_cmu.c T 3 ..\Drivers\ fm33a0xxev_cmu.c d 3 ..\Drivers\ fm33a0xxev_cmu.c T 3 ..\Drivers\ fm33a0xxev_cmu.c ¦ d 3 ..\Drivers\ fm33a0xxev_cmu.c ²& T 3 ..\Drivers\ fm33a0xxev_cmu.c ¼& \ 3 ..\Drivers\ fm33a0xxev_cmu.c Â53 ` 3 ..\Drivers\ fm33a0xxev_cmu.c Î3~ \ 3 ..\Drivers\ fm33a0xxev_cmu.c Û53 ` 3 ..\Drivers\ fm33a0xxev_cmu.c ç3~ \ 3 ..\Drivers\ fm33a0xxev_cmu.c ô53 ` 3 ..\Drivers\ fm33a0xxev_cmu.c 3~ d 3 ..\Drivers\ fm33a0xxev_cmu.c & T 3 ..\Drivers\ fm33a0xxev_cmu.c & \ 3 ..\Drivers\ fm33a0xxev_cmu.c 5- ` 3 ..\Drivers\ fm33a0xxev_cmu.c ¬-~ d 3 ..\Drivers\ fm33a0xxev_cmu.c ¼ T 3 ..\Drivers\ fm33a0xxev_cmu.c Æ L 3 ..\Drivers\ fm33a0xxev_cmu.c Ù 3 ..\Drivers\ fm33a0xxev_cmu.c ç! #"!! @t @t @t 3 ..\Drivers\ fm33a0xxev_cmu.c Òvq# \ 3 ..\Drivers\ fm33a0xxev_cmu.c h 3 ..\Drivers\ fm33a0xxev_cmu.c d 3 ..\Drivers\ fm33a0xxev_cmu.c 3 ..\Drivers\ fm33a0xxev_cmu.c ¨ !!#'# " } " P } P } P Q } } P Q } } P Q
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T } P } 4 N S P P T __DATE__ "May 20 2024" __TIME__ "10:52:04" __STDC__ 1 __STDC_VERSION__ 199901L __STDC_HOSTED__ 1 __STDC_ISO_10646__ 200607 __EDG__ 1 __EDG_VERSION__ 407 __EDG_SIZE_TYPE__ unsigned int __EDG_PTRDIFF_TYPE__ int __GNUC__ 4 __GNUC_STDC_INLINE__ 1 __GNUC_MINOR__ 7 __GNUC_PATCHLEVEL__ 0 __VERSION__ "4.7 (EDG gcc mode)" __CHAR16_TYPE__ unsigned short __CHAR32_TYPE__ unsigned int __USER_LABEL_PREFIX__ __CHAR_UNSIGNED__ 1 __WCHAR_UNSIGNED__ 1 __SIZE_TYPE__ unsigned int __PTRDIFF_TYPE__ int __WCHAR_TYPE__ unsigned short __WINT_TYPE__ unsigned short __INTMAX_TYPE__ long long __UINTMAX_TYPE__ unsigned long long __sizeof_int 4 __sizeof_long 4 __sizeof_ptr 4 __ARMCC_VERSION 5060960 __TARGET_CPU_CORTEX_M0 1 __TARGET_FPU_SOFTVFP 1 __TARGET_FPU_SOFTVFP 1 __MICROLIB 1 __UVISION_VERSION 538 _RTE_ 1 _RTE_ 1 __VTOR_PRESENT 1 __CC_ARM 1 __arm 1 __arm__ 1 __TARGET_ARCH_6S_M 1 __TARGET_ARCH_ARM 0 __TARGET_ARCH_THUMB 3 __TARGET_ARCH_A64 0 __TARGET_ARCH_AARCH32 1 __TARGET_PROFILE_M 1 __TARGET_FEATURE_HALFWORD 1 __TARGET_FEATURE_THUMB 1 __TARGET_FEATURE_DMB 1 __TARGET_FEATURE_EXTENSION_REGISTER_COUNT 0 __APCS_INTERWORK 1 __thumb 1 __thumb__ 1 __t32__ 1 __OPTIMISE_SPACE 1 __OPTIMIZE_SIZE__ 1 __OPTIMISE_LEVEL 0 __SOFTFP__ 1 2 , ã CMU_SYSCLKCR_SLP_ENEXTI_Setable 2 4 ã CMU_SYSCLKCR_SLP_ENEXTI_Getable + 8 ã CMU_SYSCLKCR_APBPRES_Set + , ã CMU_SYSCLKCR_APBPRES_Get + 8 ã CMU_SYSCLKCR_AHBPRES_Set + , ã CMU_SYSCLKCR_AHBPRES_Get , 8 ã CMU_SYSCLKCR_STCLKSEL_Set , , ã CMU_SYSCLKCR_STCLKSEL_Get - 8 ã CMU_SYSCLKCR_SYSCLKSEL_Set - , ã CMU_SYSCLKCR_SYSCLKSEL_Get & 4 ã CMU_RCHFCR_FSEL_Set & ( ã CMU_RCHFCR_FSEL_Get , ( ã CMU_RCHFCR_RCHFEN_Setable , 0 ã CMU_RCHFCR_RCHFEN_Getable * 8 ã CMU_RCHFTR_RCHFTRIM_Set * , ã CMU_RCHFTR_RCHFTRIM_Get ' 4 ã CMU_PLLLCR_PLLDB_Set ' ( ã CMU_PLLLCR_PLLDB_Get ( , ã CMU_PLLLCR_LOCKED_Chk + ( ã CMU_PLLLCR_PLLEN_Setable + , ã CMU_PLLLCR_PLLEN_Getable ( 4 ã CMU_PLLHCR_PLLHDB_Set ( ( ã CMU_PLLHCR_PLLHDB_Get ( , ã CMU_PLLHCR_LOCKED_Chk ) 4 ã CMU_PLLHCR_REFPRSC_Set ) , ã CMU_PLLHCR_REFPRSC_Get & 4 ã CMU_PLLHCR_OSEL_Set & ( ã CMU_PLLHCR_OSEL_Get ' 4 ã CMU_PLLHCR_INSEL_Set ' ( ã CMU_PLLHCR_INSEL_Get ( $ ã CMU_PLLHCR_EN_Setable ( , ã CMU_PLLHCR_EN_Getable * 8 ã CMU_XTHFCR_XTHF_CFG_Set * , ã CMU_XTHFCR_XTHF_CFG_Get , ( ã CMU_XTHFCR_XTHFEN_Setable , 0 ã CMU_XTHFCR_XTHFEN_Getable , ( ã CMU_IER_SYSCSE_IE_Setable , 0 ã CMU_IER_SYSCSE_IE_Getable + ( ã CMU_IER_HFDET_IE_Setable + , ã CMU_IER_HFDET_IE_Getable % ( ã CMU_ISR_HFDETO_Chk ( ã CMU_ISR_SYSCSE_IF_Clr ( , ã CMU_ISR_SYSCSE_IF_Chk ' ã CMU_ISR_HFDET_IF_Clr ' ( ã CMU_ISR_HFDET_IF_Chk - ( ã CMU_OPCCR1_EXTICKE_Setable - 0 ã CMU_OPCCR1_EXTICKE_Getable + 8 ã CMU_OPCCR1_EXTICKSEL_Set + , ã CMU_OPCCR1_EXTICKSEL_Get 0 , ã CMU_OPCCR1_LPUART1CKE_Setable 0 4 ã CMU_OPCCR1_LPUART1CKE_Getable 0 , ã CMU_OPCCR1_LPUART0CKE_Setable 0 4 ã CMU_OPCCR1_LPUART0CKE_Getable , 8 ã CMU_OPCCR1_LPUART1CKS_Set , , ã CMU_OPCCR1_LPUART1CKS_Get , 8 ã CMU_OPCCR1_LPUART0CKS_Set , , ã CMU_OPCCR1_LPUART0CKS_Get - ( ã CMU_OPCCR1_I2C1CKE_Setable - 0 ã CMU_OPCCR1_I2C1CKE_Getable - ( ã CMU_OPCCR1_I2C0CKE_Setable - 0 ã CMU_OPCCR1_I2C0CKE_Getable ) 4 ã CMU_OPCCR1_I2C1CKS_Set ) , ã CMU_OPCCR1_I2C1CKS_Get ) 4 ã CMU_OPCCR1_I2C0CKS_Set ) , ã CMU_OPCCR1_I2C0CKS_Get . , ã CMU_OPCCR1_UART1CKE_Setable . 0 ã CMU_OPCCR1_UART1CKE_Getable . , ã CMU_OPCCR1_UART0CKE_Setable . 0 ã CMU_OPCCR1_UART0CKE_Getable * 8 ã CMU_OPCCR1_UART1CKS_Set * , ã CMU_OPCCR1_UART1CKS_Get * 8 ã CMU_OPCCR1_UART0CKS_Set * , ã CMU_OPCCR1_UART0CKS_Get ) 4 ã CMU_OPCCR2_RNGPRSC_Set ) , ã CMU_OPCCR2_RNGPRSC_Get , ( ã CMU_OPCCR2_NVMCKE_Setable , 0 ã CMU_OPCCR2_NVMCKE_Getable , ( ã CMU_OPCCR2_RNGCKE_Setable , 0 ã CMU_OPCCR2_RNGCKE_Getable , ( ã CMU_OPCCR2_LPTCKE_Setable , 0 ã CMU_OPCCR2_LPTCKE_Getable ( 4 ã CMU_OPCCR2_LPTCKS_Set ( ( ã CMU_OPCCR2_LPTCKS_Get , ( ã CMU_OPCCR2_BSTCKE_Setable , 0 ã CMU_OPCCR2_BSTCKE_Getable ( 4 ã CMU_OPCCR2_BSTCKS_Set ( ( ã CMU_OPCCR2_BSTCKS_Get ã CMU_Deinit $ , ã CMU_GetClocksFreq ' \ ã CMU_PERCLK_SetableEx ã CMU_RCHF_Init ! ã CMU_PLL_H_Init " ã CMU_SysClk_Init % 0 ã CMU_Init_RCHF_Trim A % . C D E __stdint_h __ARMCLIB_VERSION 5060044 __INT64 __int64 __INT64_C_SUFFIX__ ll __PASTE2(x,y) x ## y __PASTE(x,y) __PASTE2(x, y) __INT64_C(x) __ESCAPE__(__PASTE(x, __INT64_C_SUFFIX__)) __UINT64_C(x) __ESCAPE__(__PASTE(x ## u, __INT64_C_SUFFIX__)) __LONGLONG long long #__STDINT_DECLS %__CLIBNS ,__CLIBNS sINT8_MIN -128 tINT16_MIN -32768 uINT32_MIN (~0x7fffffff) vINT64_MIN __INT64_C(~0x7fffffffffffffff) yINT8_MAX 127 zINT16_MAX 32767 {INT32_MAX 2147483647 |INT64_MAX __INT64_C(9223372036854775807) UINT8_MAX 255 UINT16_MAX 65535 UINT32_MAX 4294967295u UINT64_MAX __UINT64_C(18446744073709551615) INT_LEAST8_MIN -128 INT_LEAST16_MIN -32768 INT_LEAST32_MIN (~0x7fffffff) INT_LEAST64_MIN __INT64_C(~0x7fffffffffffffff) INT_LEAST8_MAX 127 INT_LEAST16_MAX 32767 INT_LEAST32_MAX 2147483647 INT_LEAST64_MAX __INT64_C(9223372036854775807) UINT_LEAST8_MAX 255 UINT_LEAST16_MAX 65535 UINT_LEAST32_MAX 4294967295u UINT_LEAST64_MAX __UINT64_C(18446744073709551615) INT_FAST8_MIN (~0x7fffffff) INT_FAST16_MIN (~0x7fffffff) INT_FAST32_MIN (~0x7fffffff) INT_FAST64_MIN __INT64_C(~0x7fffffffffffffff) ¡INT_FAST8_MAX 2147483647 ¢INT_FAST16_MAX 2147483647 £INT_FAST32_MAX 2147483647 ¤INT_FAST64_MAX __INT64_C(9223372036854775807) §UINT_FAST8_MAX 4294967295u ¨UINT_FAST16_MAX 4294967295u ©UINT_FAST32_MAX 4294967295u ªUINT_FAST64_MAX __UINT64_C(18446744073709551615) ²INTPTR_MIN INT32_MIN ¹INTPTR_MAX INT32_MAX ÀUINTPTR_MAX UINT32_MAX ÆINTMAX_MIN __ESCAPE__(~0x7fffffffffffffffll) ÉINTMAX_MAX __ESCAPE__(9223372036854775807ll) ÌUINTMAX_MAX __ESCAPE__(18446744073709551615ull) ÕPTRDIFF_MIN INT32_MIN ÖPTRDIFF_MAX INT32_MAX ÚSIG_ATOMIC_MIN (~0x7fffffff) ÛSIG_ATOMIC_MAX 2147483647 áSIZE_MAX UINT32_MAX çWCHAR_MIN èWCHAR_MAX îWCHAR_MIN 0 ïWCHAR_MAX 65535 óWINT_MIN (~0x7fffffff) ôWINT_MAX 2147483647 ûINT8_C(x) (x) üINT16_C(x) (x) ýINT32_C(x) (x) þINT64_C(x) __INT64_C(x) UINT8_C(x) (x ## u) UINT16_C(x) (x ## u) UINT32_C(x) (x ## u) UINT64_C(x) __UINT64_C(x) INTMAX_C(x) __ESCAPE__(x ## ll) UINTMAX_C(x) __ESCAPE__(x ## ull) ²__INT64 ³__LONGLONG X O D:\Program Files\MDK5\ARM\ARMCC\Bin\..\include\ stdint.h t D:\Program Files\MDK5\ARM\ARMCC\Bin\..\include\stdint.h Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] signed char short int long long unsigned char unsigned short unsigned int unsigned long long Pint8_t § 8 Pint16_t ¶ 9 Pint32_t ¿ : Pint64_t Æ ; Puint8_t Ó > Puint16_t ä ? Puint32_t ö @ Puint64_t A Pint_least8_t § G Pint_least16_t ¶ H Pint_least32_t ¿ I Pint_least64_t Æ J Puint_least8_t Ó M Puint_least16_t ä N Puint_least32_t ö O Puint_least64_t P Pint_fast8_t ¿ U Pint_fast16_t ¿ V Pint_fast32_t ¿ W Pint_fast64_t Æ X Puint_fast8_t ö [ Puint_fast16_t ö \ Puint_fast32_t ö ] Puint_fast64_t ^ Pintptr_t ¿ e Puintptr_t ö f Pintmax_t Æ j!Puintmax_t k!Pu8 Ó µ Pu16 ä ¶ Pu32 ö · Puint8 Ó ¹ Puint16 ä º Puint32 ö » G H I '__CORE_CMINSTR_H <__NOP __nop D__WFI __wfi L__WFE __wfe S__SEV __sev \__ISB() do { __schedule_barrier(); __isb(0xF); __schedule_barrier(); } while (0) g__DSB() do { __schedule_barrier(); __dsb(0xF); __schedule_barrier(); } while (0) r__DMB() do { __schedule_barrier(); __dmb(0xF); __schedule_barrier(); } while (0) __REV __rev ©__ROR __ror ´__BKPT(value) __breakpoint(value) Ú__CLZ __clz @ 6 ..\Core\Include\ core_cminstr.h (
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..\Core\Include\core_cminstr.h Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ;¨Á9__RBIT v $v value a__result v \result v \s 9 K L M '__CORE_CMFUNC_H @ 5 ..\Core\Include\ core_cmfunc.h
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..\Core\Include\core_cmfunc.h Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM ;¡@__get_CONTROL v a__result v Y__regControl v P <ÚM__set_CONTROL $v control Y__regControl v P ;Z__get_IPSR v a__result v Y__regIPSR v P ;Îg__get_APSR v a__result v Y__regAPSR v P ;t__get_xPSR v a__result v Y__regXPSR v P ;Ñ__get_PSP v a__result v Y__regProcessStackPointer v P <__set_PSP $v topOfProcStack Y__regProcessStackPointer v P ;à__get_MSP v a__result v Y__regMainStackPointer v P <¦¨__set_MSP $v topOfMainStack Y__regMainStackPointer v P ;çµ__get_PRIMASK v a__result v Y__regPriMask v P <¡Â__set_PRIMASK $v priMask Y__regPriMask v P O P Q __CORE_CM0PLUS_H_GENERIC "@__CM0PLUS_CMSIS_VERSION_MAIN ( 5U) A__CM0PLUS_CMSIS_VERSION_SUB ( 0U) B__CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | __CM0PLUS_CMSIS_VERSION_SUB ) E__CORTEX_M (0U) Q__ASM __asm R__INLINE __inline S__STATIC_INLINE static __inline T__NO_RETURN __declspec(noreturn) U__USED __attribute__((used)) V__WEAK __attribute__((weak)) W__UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x))) __FPU_USED 0U ÆÇÒ__CORE_CM0PLUS_H_DEPENDANT ÿ__I volatile const __O volatile __IO volatile
__IM volatile const __OM volatile __IOM volatile ³APSR_N_Pos 31U ´APSR_N_Msk (1UL << APSR_N_Pos) ¶APSR_Z_Pos 30U ·APSR_Z_Msk (1UL << APSR_Z_Pos) ¹APSR_C_Pos 29U ºAPSR_C_Msk (1UL << APSR_C_Pos) ¼APSR_V_Pos 28U ½APSR_V_Msk (1UL << APSR_V_Pos) ÎIPSR_ISR_Pos 0U ÏIPSR_ISR_Msk (0x1FFUL ) æxPSR_N_Pos 31U çxPSR_N_Msk (1UL << xPSR_N_Pos) éxPSR_Z_Pos 30U êxPSR_Z_Msk (1UL << xPSR_Z_Pos) ìxPSR_C_Pos 29U íxPSR_C_Msk (1UL << xPSR_C_Pos) ïxPSR_V_Pos 28U ðxPSR_V_Msk (1UL << xPSR_V_Pos) òxPSR_T_Pos 24U óxPSR_T_Msk (1UL << xPSR_T_Pos) õxPSR_ISR_Pos 0U öxPSR_ISR_Msk (0x1FFUL ) CONTROL_SPSEL_Pos 1U CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) CONTROL_nPRIV_Pos 0U CONTROL_nPRIV_Msk (1UL ) ÈSCB_CPUID_IMPLEMENTER_Pos 24U ÉSCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) ËSCB_CPUID_VARIANT_Pos 20U ÌSCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) ÎSCB_CPUID_ARCHITECTURE_Pos 16U ÏSCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) ÑSCB_CPUID_PARTNO_Pos 4U ÒSCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) ÔSCB_CPUID_REVISION_Pos 0U ÕSCB_CPUID_REVISION_Msk (0xFUL ) ØSCB_ICSR_NMIPENDSET_Pos 31U ÙSCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) ÛSCB_ICSR_PENDSVSET_Pos 28U ÜSCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) ÞSCB_ICSR_PENDSVCLR_Pos 27U ßSCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) áSCB_ICSR_PENDSTSET_Pos 26U âSCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) äSCB_ICSR_PENDSTCLR_Pos 25U åSCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) çSCB_ICSR_ISRPREEMPT_Pos 23U èSCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) êSCB_ICSR_ISRPENDING_Pos 22U ëSCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) íSCB_ICSR_VECTPENDING_Pos 12U îSCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) ðSCB_ICSR_VECTACTIVE_Pos 0U ñSCB_ICSR_VECTACTIVE_Msk (0x1FFUL ) õSCB_VTOR_TBLOFF_Pos 8U öSCB_VTOR_TBLOFF_Msk (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos) úSCB_AIRCR_VECTKEY_Pos 16U ûSCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) ýSCB_AIRCR_VECTKEYSTAT_Pos 16U þSCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) SCB_AIRCR_ENDIANESS_Pos 15U SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) SCB_AIRCR_SYSRESETREQ_Pos 2U SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) SCB_AIRCR_VECTCLRACTIVE_Pos 1U SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) SCB_SCR_SEVONPEND_Pos 4U SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) SCB_SCR_SLEEPDEEP_Pos 2U SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) SCB_SCR_SLEEPONEXIT_Pos 1U SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) SCB_CCR_STKALIGN_Pos 9U SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) SCB_CCR_UNALIGN_TRP_Pos 3U SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) SCB_SHCSR_SVCALLPENDED_Pos 15U SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) ´SysTick_CTRL_COUNTFLAG_Pos 16U µSysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) ·SysTick_CTRL_CLKSOURCE_Pos 2U ¸SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) ºSysTick_CTRL_TICKINT_Pos 1U »SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) ½SysTick_CTRL_ENABLE_Pos 0U ¾SysTick_CTRL_ENABLE_Msk (1UL ) ÁSysTick_LOAD_RELOAD_Pos 0U ÂSysTick_LOAD_RELOAD_Msk (0xFFFFFFUL ) ÅSysTick_VAL_CURRENT_Pos 0U ÆSysTick_VAL_CURRENT_Msk (0xFFFFFFUL ) ÉSysTick_CALIB_NOREF_Pos 31U ÊSysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) ÌSysTick_CALIB_SKEW_Pos 30U ÍSysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) ÏSysTick_CALIB_TENMS_Pos 0U ÐSysTick_CALIB_TENMS_Msk (0xFFFFFFUL ) éMPU_TYPE_IREGION_Pos 16U êMPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) ìMPU_TYPE_DREGION_Pos 8U íMPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) ïMPU_TYPE_SEPARATE_Pos 0U ðMPU_TYPE_SEPARATE_Msk (1UL ) óMPU_CTRL_PRIVDEFENA_Pos 2U ôMPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) öMPU_CTRL_HFNMIENA_Pos 1U ÷MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) ùMPU_CTRL_ENABLE_Pos 0U úMPU_CTRL_ENABLE_Msk (1UL ) ýMPU_RNR_REGION_Pos 0U þMPU_RNR_REGION_Msk (0xFFUL ) MPU_RBAR_ADDR_Pos 8U MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) MPU_RBAR_VALID_Pos 4U
MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) MPU_RBAR_REGION_Pos 0U MPU_RBAR_REGION_Msk (0xFUL ) MPU_RASR_ATTRS_Pos 16U MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) MPU_RASR_XN_Pos 28U MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) MPU_RASR_AP_Pos 24U MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) MPU_RASR_TEX_Pos 19U MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) MPU_RASR_S_Pos 18U MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) MPU_RASR_C_Pos 17U MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) MPU_RASR_B_Pos 16U MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) MPU_RASR_SRD_Pos 8U ¡MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) £MPU_RASR_SIZE_Pos 1U ¤MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) ¦MPU_RASR_ENABLE_Pos 0U §MPU_RASR_ENABLE_Msk (1UL ) Ä_VAL2FLD(field,value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) Ì_FLD2VAL(field,value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) ÙSCS_BASE (0xE000E000UL) ÚSysTick_BASE (SCS_BASE + 0x0010UL) ÛNVIC_BASE (SCS_BASE + 0x0100UL) ÜSCB_BASE (SCS_BASE + 0x0D00UL) ÞSCB ((SCB_Type *) SCB_BASE ) ßSysTick ((SysTick_Type *) SysTick_BASE ) àNVIC ((NVIC_Type *) NVIC_BASE ) ãMPU_BASE (SCS_BASE + 0x0D90UL) äMPU ((MPU_Type *) MPU_BASE ) _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) ..\Core\Include\ D:\Program Files\MDK5\ARM\ARMCC\Bin\..\include\ core_cm0plus.h stdint.h core_cminstr.h core_cmfunc.h Ð
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..\Core\Include\core_cm0plus.h Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM *¶!_reserved0 v # !V v # !C v # !Z v # !N v # SÉ b â w v PAPSR_Type 6°*!ISR v # !_reserved0 v # S b [ w v PIPSR_Type Ë*µ!ISR v # !_reserved0 v # !T v # !_reserved1 v # !V v # !C v # !Z v # !N v # SÈ b ¬ w v PxPSR_Type 5ã*!nPRIV v # !SPSEL v # !_reserved1 v # S b Z w v PCONTROL_Type
* Ð ISER Ç# çv RESERVED0 Ü# ICER ø#v RSERVED1 #³Â ISPR *#Ëv RESERVED2 @#æ ICPR ]#þv RESERVED3 s#v ? RESERVED4 #¶Â IP # tv PNVIC_Type §*Û( CPUID a# ICSR Â# VTOR Â# AIRCR Â# SCR Â# CCR Â# RESERVED1 v # SHP 9# SHCSR Â#$ v t[PSCB_Type ÚÅ*« CTRL Â# LOAD Â# VAL Â# CALIB a# PSysTick_Type v±*
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TYPE a# CTRL Â# RNR Â# RBAR Â# RASR Â# PMPU_Type Àæ<´
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NVIC_EnableIRQ $J IRQn <Ø
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NVIC_DisableIRQ $J IRQn ; NVIC_GetPendingIRQ v $J IRQn a__result v <» ÀNVIC_SetPendingIRQ $J IRQn <ä ÏNVIC_ClearPendingIRQ $J IRQn < áNVIC_SetPriority $J IRQn $v priority ;Ò ùNVIC_GetPriority v $J IRQn a__result v <ì NVIC_SystemReset ; ¬SCB_GetFPUType v a__result v ;Ò ËSysTick_Config v $v ticks a__result v S T U V __stdio_h __ARMCLIB_VERSION 5060044 "_ARMABI __declspec(__nothrow) %__STDIO_DECLS '__CLIBNS -__CLIBNS <NULL =NULL 0 g_SYS_OPEN 16 ¥stdin (&__CLIBNS __stdin) §stdout (&__CLIBNS __stdout) ©stderr (&__CLIBNS __stderr) ¬_IOFBF 0x100 _IOLBF 0x200 ®_IONBF 0x400 ±BUFSIZ (512) ³FOPEN_MAX _SYS_OPEN ¹FILENAME_MAX 256 ¾L_tmpnam FILENAME_MAX ÄTMP_MAX 256 ÌEOF (-1) ÒSEEK_SET 0 ÓSEEK_CUR 1 ÔSEEK_END 2 Ú_IOBIN 0x04 Ü__STDIN_BUFSIZ (64) Ý__STDOUT_BUFSIZ (64) Þ__STDERR_BUFSIZ (16) ¿getchar() getc(stdin) àputchar(c) putc(c, stdout) X N D:\Program Files\MDK5\ARM\ARMCC\Bin\..\include\ stdio.h Ô D:\Program Files\MDK5\ARM\ARMCC\Bin\..\include\stdio.h Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] unsigned int unsigned long long Psize_t ¦ 5P__va_list " F * __state1 ¦ # __state2 ¦ # )Å__fpos_t_struct __pos ¶ # __mbstate í # Pfpos_t a-__FILE PFILE Slq__stdin [q__stdout [q__stderr ["[q__aeabi_stdin q__aeabi_stdout q__aeabi_stderr l Ø g __stdin u __stdout __stderr __aeabi_stdin « __aeabi_stdout À __aeabi_stderr X Y Z $FM33A0XXEV_H .__RCHF_INITIAL_CLOCK (8000000) /__RCMF_CLOCK (2000000) 0__RCLP_CLOCK (32000) 1__XTLF_CLOCK (32768) n__CM0_REV 0x0100 o__MPU_PRESENT 1 p__VTOR_PRESENT 1 q__NVIC_PRIO_BITS 2 r__Vendor_SysTickConfig 0 uv¿FLASH_BASE (( uint32_t)0x00000000) ÀSRAM_BASE (( uint32_t)0x20000000) ÁPERIPH_BASE (( uint32_t)0x40000000) ÊPMU_BASE (PERIPH_BASE +0x00002000) ËDBG_BASE (PERIPH_BASE +0x00000000) ÌFLS_BASE (PERIPH_BASE +0x00001000) ÍRMU_BASE (PERIPH_BASE +0x00002800) ÎIWDT_BASE (PERIPH_BASE +0x00011400) ÏWWDT_BASE (PERIPH_BASE +0x00011800) ÐCMU_BASE (PERIPH_BASE +0x00002400) ÑCDIF_BASE (PERIPH_BASE +0x0001E000) ÒVRTC_BASE (PERIPH_BASE +0x0001F800) ÓSVD_BASE (PERIPH_BASE +0x00012800) ÔAES_BASE (PERIPH_BASE +0x00013800) ÕPAE_BASE (PERIPH_BASE +0x00001400) ÖHASH_BASE (PERIPH_BASE +0x00001800) ×RNG_BASE (PERIPH_BASE +0x00013C00) ØCOMP_BASE (PERIPH_BASE +0x00015400) ÙI2C0_BASE (PERIPH_BASE +0x00012400) ÚI2C1_BASE (PERIPH_BASE +0x00015000) ÛUARTIR_BASE (PERIPH_BASE +0x00017C00) ÜUART0_BASE (PERIPH_BASE +0x00012000) ÝUART1_BASE (PERIPH_BASE +0x00016800) ÞUART2_BASE (PERIPH_BASE +0x00016C00) ßUART3_BASE (PERIPH_BASE +0x00017000) àUART4_BASE (PERIPH_BASE +0x00017400) áUART5_BASE (PERIPH_BASE +0x00017800) âLPUART0_BASE (PERIPH_BASE +0x00014000) ãLPUART1_BASE (PERIPH_BASE +0x00014400) äSPI0_BASE (PERIPH_BASE +0x00010400) åSPI1_BASE (PERIPH_BASE +0x00010800) æSPI2_BASE (PERIPH_BASE +0x00014800) çSPI3_BASE (PERIPH_BASE +0x00014C00) èSPI4_BASE (PERIPH_BASE +0x00016400) éU7816_BASE (PERIPH_BASE +0x00011C00) êQSPI_BASE (PERIPH_BASE +0x00000800) ëDMA_BASE (PERIPH_BASE +0x00000400) ìCRC_BASE (PERIPH_BASE +0x00010000) íBT1_BASE (PERIPH_BASE +0x00013000) îBT2_BASE (PERIPH_BASE +0x00013044) ïET1_BASE (PERIPH_BASE +0x00013090) ðET2_BASE (PERIPH_BASE +0x000130B0) ñET3_BASE (PERIPH_BASE +0x000130D0) òET4_BASE (PERIPH_BASE +0x000130F0) óETCNT_BASE (PERIPH_BASE +0x00013110) ôBSTIM_BASE (PERIPH_BASE +0x00016000) õLPTIM_BASE (PERIPH_BASE +0x00013400) öRTC_BASE (PERIPH_BASE +0x00011000) ÷LCD_BASE (PERIPH_BASE +0x00010C00) øADC_BASE (PERIPH_BASE +0x0001FA00) ùCIC_BASE (PERIPH_BASE +0x00015C00) úGPIOA_BASE (PERIPH_BASE +0x00000C00) ûGPIOB_BASE (PERIPH_BASE +0x00000C40) üGPIOC_BASE (PERIPH_BASE +0x00000C80) ýGPIOD_BASE (PERIPH_BASE +0x00000CC0) þGPIOE_BASE (PERIPH_BASE +0x00000D00) ÿGPIOF_BASE (PERIPH_BASE +0x00000D40) GPIOG_BASE (PERIPH_BASE +0x00000D80) GPIOH_BASE (PERIPH_BASE +0x0001FC00) GPIO_BASE (PERIPH_BASE +0x00000DC0) PMU ((PMU_Type *) PMU_BASE ) DBG ((DBG_Type *) DBG_BASE ) FLS ((FLS_Type *) FLS_BASE ) RMU ((RMU_Type *) RMU_BASE ) IWDT ((IWDT_Type *) IWDT_BASE ) WWDT ((WWDT_Type *) WWDT_BASE ) CMU ((CMU_Type *) CMU_BASE ) CDIF ((CDIF_Type *) CDIF_BASE ) VRTC ((VRTC_Type *) VRTC_BASE ) SVD ((SVD_Type *) SVD_BASE ) AES ((AES_Type *) AES_BASE ) PAE ((PAE_Type *) PAE_BASE ) HASH ((HASH_Type *) HASH_BASE ) RNG ((RNG_Type *) RNG_BASE ) COMP ((COMP_Type *) COMP_BASE ) I2C0 ((I2C_Type *) I2C0_BASE ) I2C1 ((I2C_Type *) I2C1_BASE ) UARTIR ((UARTIR_Type *) UARTIR_BASE ) UART0 ((UART_Type *) UART0_BASE ) UART1 ((UART_Type *) UART1_BASE ) UART2 ((UART_Type *) UART2_BASE ) UART3 ((UART_Type *) UART3_BASE ) UART4 ((UART_Type *) UART4_BASE ) UART5 ((UART_Type *) UART5_BASE ) LPUART0 ((LPUART_Type *) LPUART0_BASE ) ¡LPUART1 ((LPUART_Type *) LPUART1_BASE ) ¢SPI0 ((SPI_Type *) SPI0_BASE ) £SPI1 ((SPI_Type *) SPI1_BASE ) ¤SPI2 ((SPI_Type *) SPI2_BASE ) ¥SPI3 ((SPI_Type *) SPI3_BASE ) ¦SPI4 ((SPI_Type *) SPI4_BASE ) §U7816 ((U7816_Type *) U7816_BASE ) ¨QSPI ((QSPI_Type *) QSPI_BASE ) ©DMA ((DMA_Type *) DMA_BASE ) ªCRC ((CRC_Type *) CRC_BASE ) «BT1 ((BT_Type *) BT1_BASE ) ¬BT2 ((BT_Type *) BT2_BASE ) ET1 ((ET_Type *) ET1_BASE ) ®ET2 ((ET_Type *) ET2_BASE ) ¯ET3 ((ET_Type *) ET3_BASE ) °ET4 ((ET_Type *) ET4_BASE ) ±ETCNT ((ETCNT_Type *) ETCNT_BASE ) ²BSTIM ((BSTIM_Type *) BSTIM_BASE ) ³LPTIM ((LPTIM_Type *) LPTIM_BASE ) ´RTC ((RTC_Type *) RTC_BASE ) µLCD ((LCD_Type *) LCD_BASE ) ¶ADC ((ADC_Type *) ADC_BASE ) ·CIC ((CIC_Type *) CIC_BASE ) ¸GPIOA ((GPIO_Type *) GPIOA_BASE ) ¹GPIOB ((GPIO_Type *) GPIOB_BASE ) ºGPIOC ((GPIO_Type *) GPIOC_BASE ) »GPIOD ((GPIO_Type *) GPIOD_BASE ) ¼GPIOE ((GPIO_Type *) GPIOE_BASE ) ½GPIOF ((GPIO_Type *) GPIOF_BASE ) ¾GPIOG ((GPIO_Type *) GPIOG_BASE ) ¿GPIOH ((GPIOH_Type *) GPIOH_BASE ) ÀGPIO ((GPIO_COMMON_Type *) GPIO_BASE ) h ] ..\Core\Include\ FM33A0XXEV.h core_cm0plus.h system_FM33A0XXEV.h Ð
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..\Core\Include\FM33A0XXEV.h Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM õRESET SET PFlagStatus à *(PITStatus à *4±DISABLE ENABLE PFunState +/ÖFAIL PASS PErrorStatus A,'ÊReset_IRQn qNMI_IRQn rHardFault_IRQn sSVC_IRQn {PendSV_IRQn ~SysTick_IRQn WWDT_IRQn SVD_IRQn RTC_IRQn FLASH_IRQn CMU_IRQn ADC_IRQn SPI0_IRQn SPI1_IRQn SPI2_IRQn UART0_IRQn UART1_IRQn
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UART2_IRQn UART3_IRQn UART4_IRQn UART5_IRQn U7816_IRQn LPUART0_IRQn I2Cx_IRQn RSV_IRQn CRYPTO_IRQn LPTIM_IRQn DMA_IRQn WKUPx_IRQn COMP_IRQn BTx_IRQn QSPI_IRQn ETx_IRQn BSTIM_IRQn SPI3_IRQn SPI4_IRQn GPIO_IRQn LPUART1_IRQn PIRQn_Type ib* CR # WKTR # WKFR # IER # ISR # tv PPMU_Type [*Ö RSV1 # CR # HDFR # PDBG_Type ¯¨*¤ X RDCR # PFCR # OPTBR ª# RSV1 # EPCR # KEY # IER # ISR # Û RSV2 R#$ ACLOCK1 #H ACLOCK2 #L ACLOCK3 #P ACLOCK4 #T v t¤PFLS_Type ç¾*Á
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$ PDRCR # BORCR # RSTCFGR # SOFTRST # RSR # PRSTEN # AHBRST # APBRST1 # APBRST2 # PRMU_Type ¿Ð*û
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SERV # CFGR # CNTR ª# PIWDT_Type RÜ*Ö CR # CFGR # CNTR ª# IER # ISR # PSCR ª# PWWDT_Type ë*± 8 SYSCLKCR # RCHFCR # RCHFTR # PLLLCR # PLLHCR # XTHFCR # IER # ISR # PCLKCR1 # PCLKCR2 #$ PCLKCR3 #( PCLKCR4 #, OPCCR1 #0 OPCCR2 #4 PCMU_Type è*Ý CR # PSCR # PCDIF_Type Â*÷0 PDRCR # RSV1 # RCMFCR # RCLPCR # RCLPTR # XTLFCR # ADCCR #$ LFDIER #( LFDISR #, PVRTC_Type ï*Å CFGR # CR # IER # ISR # VSR # PSVD_Type ¬*ÉT CR # IER # ISR # DIR # DOR ª# KEY0 # KEY1 # KEY2 # KEY3 # KEY4 #$ KEY5 #( KEY6 #, KEY7 #0 IVR0 #4 IVR1 #8 IVR2 #< IVR3 #@ H0 #D H1 #H H2 #L H3 #P PAES_Type ÖÊ*À CSR # MLR # MPR # M0CFG # M1CFG # M2CFG # M3CFG # WORD # PPAE_Type ÚÛ*ì CSR # DTR # PHASH_Type Q æ*â CR # DOR ª# RSV1 # SR # CRC_CR # CRC_DIR # CRC_SR # PRNG_Type ~ ö*¯ CR1 # CR2 # ICR # ISR # PCR # PCOMP_Type ó *ª$ CFGR # CR # IER # ISR # SR # BRG # BUF # TIMING # TO # PI2C_Type A
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*Ê CR # PUARTIR_Type »
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*µ CSR # IER # ISR # TODR # RXBUF ª# TXBUF # BGR # PUART_Type Þ
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°* CSR # IER # ISR # BMR # RXBUF # TXBUF # DMR # PLPUART_Type G À* CR1 # CR2 # CR3 # IER # ISR # TXBUF # RXBUF ª# PSPI_Type ± Ð*$ CR # FFR # EGTR # PSC # BGR # RXBUF ª# TXBUF # IER # ISR # PU7816_Type â*¤0 CR # CFG # SR # DATALEN # CCR # ADDR # ABR # DR # SMSK # SMAT #$ PITV #( TO #, PQSPI_Type ÷* ¸ GCR # CH0CR # CH0MAR # CH1CR # CH1MAR # CH2CR # CH2MAR # CH3CR # CH3MAR # CH4CR #$ CH4MAR #( CH5CR #, CH5MAR #0 CH6CR #4 CH6MAR #8 CH7CR #< CH7MAR #@ CH8CR #D CH8MAR #H CH9CR #L CH9MAR #P CH10CR #T CH10MAR #X CH11CR #\ CH11FAR #` CH11RAR #d ISR #h± $ RSV1 ¨#l CH0CSR # CH0MASR # CH1CSR # CH1MASR # CH2CSR # CH2MASR # CH3CSR # CH3MASR # CH4CSR # CH4MASR #¤ CH5CSR #¨ CH5MASR #¬ CH6CSR #° CH6MASR #´ PDMA_Type 6 ª*ù DR # CR # LFSR # XOR # à RSV1 ×# POLY # PCRC_Type ¨¹*à!D CR1 # CR2 # CFGR1 # CFGR2 # PRES # LOADCR # CNTL ª# CNTH ª# PRESET # LOADL #$ LOADH #( CMPL #, CMPH #0 OUTCNT #4 OCR #8 IER #< ISR #@ PBT_Type
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Ó*Ò" CR # INSR # PSCR1 # PSCR2 # IVR # CMPR # IER # ISR # PET_Type ðä*# CNT1 # CNT2 # CNT3 # CNT4 # PETCNT_Type bï*ª$0 CR1 # CR2 # RSV1 # IER # ISR # EGR #ú# RSV2 ñ# CNTR #$ PSCR #( ARR #, PBSTIM_Type ª*Í%0 CFGR # CNTR ª# CCSR # ARR # IER # ISR # CR # RSV1 # CCR1 # CCR2 #$ CCR3 #( CCR4 #, PLPTIM_Type =*( WER # IER # ISR # BCDSEC # BCDMIN # BCDHOUR # BCDDATE # BCDWEEK # BCDMONTH # BCDYEAR #$ ALARM #( TMSEL #, ADJUST #0 ADSIGN #4 VCAL #8 MSCNT #< CALSTEP #@ ADCNT ª#D SSR ª#H SSA #L DTR #P( RSV1 ú#T CR #| PRTC_Type à¶*á*` CR # TEST # FCR # FLKT # RSV1 # IER # ISR #) RSV2 ~# DATA0 #$ DATA1 #( DATA2 #, DATA3 #0 DATA4 #4 DATA5 #8 DATA6 #< DATA7 #@ DATA8 #D DATA9 #H* RSV3 #L COMEN #P SEGEN0 #T SEGEN1 #X BSTCR #\ PLCD_Type +Õ*®+ CR # TRIM # DR ª# ISR # CFGR # PADC_Type rã*ù+ DR ª# OS # USDR ª# CR # ISR # PCIC_Type ¿ñ*-, INEN # PUEN # ODEN # FCR # DO # DSET # DRST # DIN ª# DFS # RSV #$ ANEN #( PGPIO_Type
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*Ü- INEN # PUEN # FCR # DO # DIN # PGPIOH_Type *¶/Ä EXTISEL0 # EXTISEL1 # EXTIEDS0 # EXTIEDS1 # EXTIDF # EXTIISR # EXTIDI ª#è. RSV1 _# FOUTSEL #@ IOMCR #D/= RSV2 #H PINWKEN #À PGPIO_COMMON_Type ï¦ \ ] ^ _ (SYSTEM_FM33A0XXEV_H 234O__SYSTEM_CLOCK (8000000) PDELAY_US (__SYSTEM_CLOCK/1000000) QDELAY_MS (__SYSTEM_CLOCK/1000) TDo_DelayStart() { uint32_t LastTick = SysTick->VAL; do { WWhile_DelayMsEnd(Count) }while(((LastTick - SysTick->VAL)&0xFFFFFF)<DELAY_MS*Count); } ZWhile_DelayUsEnd(Count) }while(((LastTick - SysTick->VAL)&0xFFFFFF)<DELAY_US*Count); } ..\Core\Include\ D:\Program Files\MDK5\ARM\ARMCC\Bin\..\include\ system_FM33A0XXEV.h stdint.h stdio.h FM33A0XXEV.h
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..\Core\Include\system_FM33A0XXEV.h Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM qSystemCoreClock v " ç SystemCoreClock a b c __FM33A0XXEV_CMU_H HXVAR(object,addr) (*((object *) (addr))) const_rchf_Trim8 HXVAR( uint32_t, 0x1FFFFB40 ) const_rchf_Trim16 HXVAR( uint32_t, 0x1FFFFB3C ) const_rchf_Trim24 HXVAR( uint32_t, 0x1FFFFB38 ) const_rchf_Trim32 HXVAR( uint32_t, 0x1FFFFB34) !__XTHF_CLOCK (12000000) RCMU_SYSCLKCR_SLP_ENEXTI_Pos 25 SCMU_SYSCLKCR_SLP_ENEXTI_Msk (0x1U << CMU_SYSCLKCR_SLP_ENEXTI_Pos) UCMU_SYSCLKCR_APBPRES_Pos 16 [CMU_SYSCLKCR_APBPRES_Msk (0x7U << CMU_SYSCLKCR_APBPRES_Pos) \CMU_SYSCLKCR_APBPRES_DIV1 (0x0U << CMU_SYSCLKCR_APBPRES_Pos) ]CMU_SYSCLKCR_APBPRES_DIV2 (0x4U << CMU_SYSCLKCR_APBPRES_Pos) ^CMU_SYSCLKCR_APBPRES_DIV4 (0x5U << CMU_SYSCLKCR_APBPRES_Pos) _CMU_SYSCLKCR_APBPRES_DIV8 (0x6U << CMU_SYSCLKCR_APBPRES_Pos) `CMU_SYSCLKCR_APBPRES_DIV16 (0x7U << CMU_SYSCLKCR_APBPRES_Pos) bCMU_SYSCLKCR_AHBPRES_Pos 8 hCMU_SYSCLKCR_AHBPRES_Msk (0x7U << CMU_SYSCLKCR_AHBPRES_Pos) iCMU_SYSCLKCR_AHBPRES_DIV1 (0x0U << CMU_SYSCLKCR_AHBPRES_Pos) jCMU_SYSCLKCR_AHBPRES_DIV2 (0x4U << CMU_SYSCLKCR_AHBPRES_Pos) kCMU_SYSCLKCR_AHBPRES_DIV4 (0x5U << CMU_SYSCLKCR_AHBPRES_Pos) lCMU_SYSCLKCR_AHBPRES_DIV8 (0x6U << CMU_SYSCLKCR_AHBPRES_Pos) mCMU_SYSCLKCR_AHBPRES_DIV16 (0x7U << CMU_SYSCLKCR_AHBPRES_Pos) oCMU_SYSCLKCR_STCLKSEL_Pos 6 tCMU_SYSCLKCR_STCLKSEL_Msk (0x3U << CMU_SYSCLKCR_STCLKSEL_Pos) uCMU_SYSCLKCR_STCLKSEL_SCLK (0x0U << CMU_SYSCLKCR_STCLKSEL_Pos) vCMU_SYSCLKCR_STCLKSEL_LSCLK (0x1U << CMU_SYSCLKCR_STCLKSEL_Pos) wCMU_SYSCLKCR_STCLKSEL_RC4M (0x2U << CMU_SYSCLKCR_STCLKSEL_Pos) xCMU_SYSCLKCR_STCLKSEL_SYSCLK (0x3U << CMU_SYSCLKCR_STCLKSEL_Pos) zCMU_SYSCLKCR_SYSCLKSEL_Pos 0 {CMU_SYSCLKCR_SYSCLKSEL_Msk (0x7U << CMU_SYSCLKCR_SYSCLKSEL_Pos) |CMU_SYSCLKCR_SYSCLKSEL_RCHF (0x0U << CMU_SYSCLKCR_SYSCLKSEL_Pos) }CMU_SYSCLKCR_SYSCLKSEL_XTHF (0x1U << CMU_SYSCLKCR_SYSCLKSEL_Pos) ~CMU_SYSCLKCR_SYSCLKSEL_PLL_H (0x2U << CMU_SYSCLKCR_SYSCLKSEL_Pos) CMU_SYSCLKCR_SYSCLKSEL_LSCLK (0x3U << CMU_SYSCLKCR_SYSCLKSEL_Pos) CMU_RCHFCR_FSEL_Pos 16 CMU_RCHFCR_FSEL_Msk (0xfU << CMU_RCHFCR_FSEL_Pos) CMU_RCHFCR_FSEL_8MHZ (0x0U << CMU_RCHFCR_FSEL_Pos) CMU_RCHFCR_FSEL_16MHZ (0x1U << CMU_RCHFCR_FSEL_Pos) CMU_RCHFCR_FSEL_24MHZ (0x2U << CMU_RCHFCR_FSEL_Pos) CMU_RCHFCR_FSEL_32MHZ (0x3U << CMU_RCHFCR_FSEL_Pos) CMU_RCHFCR_RCHFEN_Pos 0 CMU_RCHFCR_RCHFEN_Msk (0x1U << CMU_RCHFCR_RCHFEN_Pos) CMU_RCHFTR_RCHFTRIM_Pos 0 CMU_RCHFTR_RCHFTRIM_Msk (0xffU << CMU_RCHFTR_RCHFTRIM_Pos) CMU_PLLLCR_PLLDB_Pos 16 CMU_PLLLCR_PLLDB_Msk (0x3ffU << CMU_PLLLCR_PLLDB_Pos) CMU_PLLLCR_LOCKED_Pos 7 CMU_PLLLCR_LOCKED_Msk (0x1U << CMU_PLLLCR_LOCKED_Pos) CMU_PLLLCR_PLLEN_Pos 0 £CMU_PLLLCR_PLLEN_Msk (0x1U << CMU_PLLLCR_PLLEN_Pos) ¥CMU_PLLHCR_PLLHDB_Pos 16 ¨CMU_PLLHCR_PLLHDB_Msk (0x3ffU << CMU_PLLHCR_PLLHDB_Pos) ©CMU_PLLHCR_PLLHDB_X32 (0x1fU << CMU_PLLHCR_PLLHDB_Pos) ªCMU_PLLHCR_PLLHDB_X48 (0x2fU << CMU_PLLHCR_PLLHDB_Pos) «CMU_PLLHCR_PLLHDB_X64 (0x3fU << CMU_PLLHCR_PLLHDB_Pos) CMU_PLLHCR_LOCKED_Pos 7 °CMU_PLLHCR_LOCKED_Msk (0x1U << CMU_PLLHCR_LOCKED_Pos) ²CMU_PLLHCR_REFPRSC_Pos 4 »CMU_PLLHCR_REFPRSC_Msk (0x7U << CMU_PLLHCR_REFPRSC_Pos) ¼CMU_PLLHCR_REFPRSC_DIV1 (0x0U << CMU_PLLHCR_REFPRSC_Pos) ½CMU_PLLHCR_REFPRSC_DIV2 (0x1U << CMU_PLLHCR_REFPRSC_Pos) ¾CMU_PLLHCR_REFPRSC_DIV4 (0x2U << CMU_PLLHCR_REFPRSC_Pos) ¿CMU_PLLHCR_REFPRSC_DIV8 (0x3U << CMU_PLLHCR_REFPRSC_Pos) ÀCMU_PLLHCR_REFPRSC_DIV12 (0x4U << CMU_PLLHCR_REFPRSC_Pos) ÁCMU_PLLHCR_REFPRSC_DIV16 (0x5U << CMU_PLLHCR_REFPRSC_Pos) ÂCMU_PLLHCR_REFPRSC_DIV24 (0x6U << CMU_PLLHCR_REFPRSC_Pos) ÃCMU_PLLHCR_REFPRSC_DIV32 (0x7U << CMU_PLLHCR_REFPRSC_Pos) ÅCMU_PLLHCR_OSEL_Pos 3 ÈCMU_PLLHCR_OSEL_Msk (0x1U << CMU_PLLHCR_OSEL_Pos) ÉCMU_PLLHCR_OSEL_X1 (0x0U << CMU_PLLHCR_OSEL_Pos) ÊCMU_PLLHCR_OSEL_X2 (0x1U << CMU_PLLHCR_OSEL_Pos) ÌCMU_PLLHCR_INSEL_Pos 1 ÏCMU_PLLHCR_INSEL_Msk (0x1U << CMU_PLLHCR_INSEL_Pos) ÐCMU_PLLHCR_INSEL_RCHF (0x0U << CMU_PLLHCR_INSEL_Pos) ÑCMU_PLLHCR_INSEL_XTHF (0x1U << CMU_PLLHCR_INSEL_Pos) ÓCMU_PLLHCR_EN_Pos 0 ÖCMU_PLLHCR_EN_Msk (0x1U << CMU_PLLHCR_EN_Pos) ØCMU_XTHFCR_XTHF_CFG_Pos 8 ÛCMU_XTHFCR_XTHF_CFG_Msk (0x7U << CMU_XTHFCR_XTHF_CFG_Pos) ÜCMU_XTHFCR_XTHF_CFG_MIN (0x0U << CMU_XTHFCR_XTHF_CFG_Pos) ÝCMU_XTHFCR_XTHF_CFG_MAX (0x7U << CMU_XTHFCR_XTHF_CFG_Pos) ßCMU_XTHFCR_XTHFEN_Pos 0 âCMU_XTHFCR_XTHFEN_Msk (0x1U << CMU_XTHFCR_XTHFEN_Pos) æCMU_IER_SYSCSE_IE_Pos 1 çCMU_IER_SYSCSE_IE_Msk (0x1U << CMU_IER_SYSCSE_IE_Pos) éCMU_IER_HFDET_IE_Pos 0 êCMU_IER_HFDET_IE_Msk (0x1U << CMU_IER_HFDET_IE_Pos) íCMU_ISR_HFDETO_Pos 8 ðCMU_ISR_HFDETO_Msk (0x1U << CMU_ISR_HFDETO_Pos) òCMU_ISR_SYSCSE_IF_Pos 1 óCMU_ISR_SYSCSE_IF_Msk (0x1U << CMU_ISR_SYSCSE_IF_Pos) õCMU_ISR_HFDET_IF_Pos 0 öCMU_ISR_HFDET_IF_Msk (0x1U << CMU_ISR_HFDET_IF_Pos) øCMU_PCLKCR1_COMP_PCE_Pos 9 ùCMU_PCLKCR1_COMP_PCE_Msk (0x1U << CMU_PCLKCR1_COMP_PCE_Pos) ûCMU_PCLKCR1_SVD_PCE_Pos 8 üCMU_PCLKCR1_SVD_PCE_Msk (0x1U << CMU_PCLKCR1_SVD_PCE_Pos) þCMU_PCLKCR1_PAD_PCE_Pos 7 ÿCMU_PCLKCR1_PAD_PCE_Msk (0x1U << CMU_PCLKCR1_PAD_PCE_Pos) CMU_PCLKCR1_ANAC_PCE_Pos 6 CMU_PCLKCR1_ANAC_PCE_Msk (0x1U << CMU_PCLKCR1_ANAC_PCE_Pos)
CMU_PCLKCR1_IWDT_PCE_Pos 5 CMU_PCLKCR1_IWDT_PCE_Msk (0x1U << CMU_PCLKCR1_IWDT_PCE_Pos) CMU_PCLKCR1_SCU_PCE_Pos 4 CMU_PCLKCR1_SCU_PCE_Msk (0x1U << CMU_PCLKCR1_SCU_PCE_Pos) CMU_PCLKCR1_PMU_PCE_Pos 3 CMU_PCLKCR1_PMU_PCE_Msk (0x1U << CMU_PCLKCR1_PMU_PCE_Pos) CMU_PCLKCR1_RTC_PCE_Pos 2 CMU_PCLKCR1_RTC_PCE_Msk (0x1U << CMU_PCLKCR1_RTC_PCE_Pos) CMU_PCLKCR1_LPT_PCE_Pos 0 CMU_PCLKCR1_LPT_PCE_Msk (0x1U << CMU_PCLKCR1_LPT_PCE_Pos) CMU_PCLKCR2_PAE_PCE_Pos 17 CMU_PCLKCR2_PAE_PCE_Msk (0x1U << CMU_PCLKCR2_PAE_PCE_Pos) CMU_PCLKCR2_SHA_PCE_Pos 16 CMU_PCLKCR2_SHA_PCE_Msk (0x1U << CMU_PCLKCR2_SHA_PCE_Pos) CMU_PCLKCR2_CIC_PCE_Pos 8 CMU_PCLKCR2_CIC_PCE_Msk (0x1U << CMU_PCLKCR2_CIC_PCE_Pos) CMU_PCLKCR2_WWDT_PCE_Pos 7 CMU_PCLKCR2_WWDT_PCE_Msk (0x1U << CMU_PCLKCR2_WWDT_PCE_Pos) CMU_PCLKCR2_RAMBIST_PCE_Pos 6 ¡CMU_PCLKCR2_RAMBIST_PCE_Msk (0x1U << CMU_PCLKCR2_RAMBIST_PCE_Pos) £CMU_PCLKCR2_NVM_PCE_Pos 5 ¤CMU_PCLKCR2_NVM_PCE_Msk (0x1U << CMU_PCLKCR2_NVM_PCE_Pos) ¦CMU_PCLKCR2_DMA_PCE_Pos 4 §CMU_PCLKCR2_DMA_PCE_Msk (0x1U << CMU_PCLKCR2_DMA_PCE_Pos) ©CMU_PCLKCR2_LCD_PCE_Pos 3 ªCMU_PCLKCR2_LCD_PCE_Msk (0x1U << CMU_PCLKCR2_LCD_PCE_Pos) ¬CMU_PCLKCR2_AES_PCE_Pos 2 CMU_PCLKCR2_AES_PCE_Msk (0x1U << CMU_PCLKCR2_AES_PCE_Pos) ¯CMU_PCLKCR2_TRNG_PCE_Pos 1 °CMU_PCLKCR2_TRNG_PCE_Msk (0x1U << CMU_PCLKCR2_TRNG_PCE_Pos) ²CMU_PCLKCR2_CRC_PCE_Pos 0 ³CMU_PCLKCR2_CRC_PCE_Msk (0x1U << CMU_PCLKCR2_CRC_PCE_Pos) µCMU_PCLKCR3_I2C1_PCE_Pos 25 ¶CMU_PCLKCR3_I2C1_PCE_Msk (0x1U << CMU_PCLKCR3_I2C1_PCE_Pos) ¸CMU_PCLKCR3_I2C0_PCE_Pos 24 ¹CMU_PCLKCR3_I2C0_PCE_Msk (0x1U << CMU_PCLKCR3_I2C0_PCE_Pos) »CMU_PCLKCR3_LPUART1_PCE_Pos 18 ¼CMU_PCLKCR3_LPUART1_PCE_Msk (0x1U << CMU_PCLKCR3_LPUART1_PCE_Pos) ¾CMU_PCLKCR3_U7816_PCE_Pos 16 ¿CMU_PCLKCR3_U7816_PCE_Msk (0x1U << CMU_PCLKCR3_U7816_PCE_Pos) ÁCMU_PCLKCR3_LPUART0_PCE_Pos 15 ÂCMU_PCLKCR3_LPUART0_PCE_Msk (0x1U << CMU_PCLKCR3_LPUART0_PCE_Pos) ÄCMU_PCLKCR3_UICR_PCE_Pos 14 ÅCMU_PCLKCR3_UICR_PCE_Msk (0x1U << CMU_PCLKCR3_UICR_PCE_Pos) ÇCMU_PCLKCR3_UART5_PCE_Pos 13 ÈCMU_PCLKCR3_UART5_PCE_Msk (0x1U << CMU_PCLKCR3_UART5_PCE_Pos) ÊCMU_PCLKCR3_UART4_PCE_Pos 12 ËCMU_PCLKCR3_UART4_PCE_Msk (0x1U << CMU_PCLKCR3_UART4_PCE_Pos) ÍCMU_PCLKCR3_UART3_PCE_Pos 11 ÎCMU_PCLKCR3_UART3_PCE_Msk (0x1U << CMU_PCLKCR3_UART3_PCE_Pos) ÐCMU_PCLKCR3_UART2_PCE_Pos 10 ÑCMU_PCLKCR3_UART2_PCE_Msk (0x1U << CMU_PCLKCR3_UART2_PCE_Pos) ÓCMU_PCLKCR3_UART1_PCE_Pos 9 ÔCMU_PCLKCR3_UART1_PCE_Msk (0x1U << CMU_PCLKCR3_UART1_PCE_Pos) ÖCMU_PCLKCR3_UART0_PCE_Pos 8 ×CMU_PCLKCR3_UART0_PCE_Msk (0x1U << CMU_PCLKCR3_UART0_PCE_Pos) ÙCMU_PCLKCR3_QSPI_PCE_Pos 7 ÚCMU_PCLKCR3_QSPI_PCE_Msk (0x1U << CMU_PCLKCR3_QSPI_PCE_Pos) ÜCMU_PCLKCR3_SPI4_PCE_Pos 4 ÝCMU_PCLKCR3_SPI4_PCE_Msk (0x1U << CMU_PCLKCR3_SPI4_PCE_Pos) ßCMU_PCLKCR3_SPI3_PCE_Pos 3 àCMU_PCLKCR3_SPI3_PCE_Msk (0x1U << CMU_PCLKCR3_SPI3_PCE_Pos) âCMU_PCLKCR3_SPI2_PCE_Pos 2 ãCMU_PCLKCR3_SPI2_PCE_Msk (0x1U << CMU_PCLKCR3_SPI2_PCE_Pos) åCMU_PCLKCR3_SPI1_PCE_Pos 1 æCMU_PCLKCR3_SPI1_PCE_Msk (0x1U << CMU_PCLKCR3_SPI1_PCE_Pos) èCMU_PCLKCR3_SPI0_PCE_Pos 0 éCMU_PCLKCR3_SPI0_PCE_Msk (0x1U << CMU_PCLKCR3_SPI0_PCE_Pos) ëCMU_PCLKCR4_ET4_PCE_Pos 6 ìCMU_PCLKCR4_ET4_PCE_Msk (0x1U << CMU_PCLKCR4_ET4_PCE_Pos) îCMU_PCLKCR4_ET3_PCE_Pos 5 ïCMU_PCLKCR4_ET3_PCE_Msk (0x1U << CMU_PCLKCR4_ET3_PCE_Pos) ñCMU_PCLKCR4_ET2_PCE_Pos 4 òCMU_PCLKCR4_ET2_PCE_Msk (0x1U << CMU_PCLKCR4_ET2_PCE_Pos) ôCMU_PCLKCR4_ET1_PCE_Pos 3 õCMU_PCLKCR4_ET1_PCE_Msk (0x1U << CMU_PCLKCR4_ET1_PCE_Pos) ÷CMU_PCLKCR4_BT2_PCE_Pos 2 øCMU_PCLKCR4_BT2_PCE_Msk (0x1U << CMU_PCLKCR4_BT2_PCE_Pos) úCMU_PCLKCR4_BT1_PCE_Pos 1 ûCMU_PCLKCR4_BT1_PCE_Msk (0x1U << CMU_PCLKCR4_BT1_PCE_Pos) ýCMU_PCLKCR4_BSTIM_PCE_Pos 0 þCMU_PCLKCR4_BSTIM_PCE_Msk (0x1U << CMU_PCLKCR4_BSTIM_PCE_Pos) CMU_OPCCR1_EXTICKE_Pos 31 CMU_OPCCR1_EXTICKE_Msk (0x1U << CMU_OPCCR1_EXTICKE_Pos) CMU_OPCCR1_EXTICKSEL_Pos 30 CMU_OPCCR1_EXTICKSEL_Msk (0x1U << CMU_OPCCR1_EXTICKSEL_Pos)
CMU_OPCCR1_EXTICKSEL_LSCLK (0x1U << CMU_OPCCR1_EXTICKSEL_Pos) CMU_OPCCR1_EXTICKSEL_HCLK (0x0U << CMU_OPCCR1_EXTICKSEL_Pos) CMU_OPCCR1_LPUART1CKE_Pos 29 CMU_OPCCR1_LPUART1CKE_Msk (0x1U << CMU_OPCCR1_LPUART1CKE_Pos) CMU_OPCCR1_LPUART0CKE_Pos 28 CMU_OPCCR1_LPUART0CKE_Msk (0x1U << CMU_OPCCR1_LPUART0CKE_Pos) CMU_OPCCR1_LPUART1CKS_Pos 26 CMU_OPCCR1_LPUART1CKS_Msk (0x3U << CMU_OPCCR1_LPUART1CKS_Pos) CMU_OPCCR1_LPUART1CKS_LSCLK (0x0U << CMU_OPCCR1_LPUART1CKS_Pos) CMU_OPCCR1_LPUART1CKS_RCHF (0x1U << CMU_OPCCR1_LPUART1CKS_Pos) CMU_OPCCR1_LPUART0CKS_Pos 24 CMU_OPCCR1_LPUART0CKS_Msk (0x3U << CMU_OPCCR1_LPUART0CKS_Pos) CMU_OPCCR1_LPUART0CKS_LSCLK (0x0U << CMU_OPCCR1_LPUART0CKS_Pos) CMU_OPCCR1_LPUART0CKS_RCHF (0x1U << CMU_OPCCR1_LPUART0CKS_Pos) CMU_OPCCR1_I2C1CKE_Pos 21 ¡CMU_OPCCR1_I2C1CKE_Msk (0x1U << CMU_OPCCR1_I2C1CKE_Pos) £CMU_OPCCR1_I2C0CKE_Pos 20 ¤CMU_OPCCR1_I2C0CKE_Msk (0x1U << CMU_OPCCR1_I2C0CKE_Pos) ¦CMU_OPCCR1_I2C1CKS_Pos 18 «CMU_OPCCR1_I2C1CKS_Msk (0x3U << CMU_OPCCR1_I2C1CKS_Pos) ¬CMU_OPCCR1_I2C1CKS_APBCLK (0x0U << CMU_OPCCR1_I2C1CKS_Pos) CMU_OPCCR1_I2C1CKS_RCHF (0x1U << CMU_OPCCR1_I2C1CKS_Pos) ®CMU_OPCCR1_I2C1CKS_SYSCLK (0x2U << CMU_OPCCR1_I2C1CKS_Pos) °CMU_OPCCR1_I2C0CKS_Pos 16 µCMU_OPCCR1_I2C0CKS_Msk (0x3U << CMU_OPCCR1_I2C0CKS_Pos) ¶CMU_OPCCR1_I2C0CKS_APBCLK (0x0U << CMU_OPCCR1_I2C0CKS_Pos) ·CMU_OPCCR1_I2C0CKS_RCHF (0x1U << CMU_OPCCR1_I2C0CKS_Pos) ¸CMU_OPCCR1_I2C0CKS_SYSCLK (0x2U << CMU_OPCCR1_I2C0CKS_Pos) ºCMU_OPCCR1_UART1CKE_Pos 9 »CMU_OPCCR1_UART1CKE_Msk (0x1U << CMU_OPCCR1_UART1CKE_Pos) ½CMU_OPCCR1_UART0CKE_Pos 8 ¾CMU_OPCCR1_UART0CKE_Msk (0x1U << CMU_OPCCR1_UART0CKE_Pos) ÀCMU_OPCCR1_UART1CKS_Pos 2 ÅCMU_OPCCR1_UART1CKS_Msk (0x3U << CMU_OPCCR1_UART1CKS_Pos) ÆCMU_OPCCR1_UART1CKS_APBCLK (0x0U << CMU_OPCCR1_UART1CKS_Pos) ÇCMU_OPCCR1_UART1CKS_RCHF (0x1U << CMU_OPCCR1_UART1CKS_Pos) ÈCMU_OPCCR1_UART1CKS_SYSCLK (0x2U << CMU_OPCCR1_UART1CKS_Pos) ÊCMU_OPCCR1_UART0CKS_Pos 0 ÏCMU_OPCCR1_UART0CKS_Msk (0x3U << CMU_OPCCR1_UART0CKS_Pos) ÐCMU_OPCCR1_UART0CKS_APBCLK (0x0U << CMU_OPCCR1_UART0CKS_Pos) ÑCMU_OPCCR1_UART0CKS_RCHF (0x1U << CMU_OPCCR1_UART0CKS_Pos) ÒCMU_OPCCR1_UART0CKS_SYSCLK (0x2U << CMU_OPCCR1_UART0CKS_Pos) ÔCMU_OPCCR2_RNGPRSC_Pos 28 ÜCMU_OPCCR2_RNGPRSC_Msk (0x7U << CMU_OPCCR2_RNGPRSC_Pos) ÝCMU_OPCCR2_RNGPRSC_DIV1 (0x0U << CMU_OPCCR2_RNGPRSC_Pos) ÞCMU_OPCCR2_RNGPRSC_DIV2 (0x1U << CMU_OPCCR2_RNGPRSC_Pos) ßCMU_OPCCR2_RNGPRSC_DIV4 (0x2U << CMU_OPCCR2_RNGPRSC_Pos) àCMU_OPCCR2_RNGPRSC_DIV8 (0x3U << CMU_OPCCR2_RNGPRSC_Pos) áCMU_OPCCR2_RNGPRSC_DIV16 (0x4U << CMU_OPCCR2_RNGPRSC_Pos) âCMU_OPCCR2_RNGPRSC_DIV32 (0x5U << CMU_OPCCR2_RNGPRSC_Pos) äCMU_OPCCR2_NVMCKE_Pos 22 åCMU_OPCCR2_NVMCKE_Msk (0x1U << CMU_OPCCR2_NVMCKE_Pos) çCMU_OPCCR2_RNGCKE_Pos 21 èCMU_OPCCR2_RNGCKE_Msk (0x1U << CMU_OPCCR2_RNGCKE_Pos) êCMU_OPCCR2_LPTCKE_Pos 12 ëCMU_OPCCR2_LPTCKE_Msk (0x1U << CMU_OPCCR2_LPTCKE_Pos) íCMU_OPCCR2_LPTCKS_Pos 8 òCMU_OPCCR2_LPTCKS_Msk (0x3U << CMU_OPCCR2_LPTCKS_Pos) óCMU_OPCCR2_LPTCKS_APBCLK (0x0U << CMU_OPCCR2_LPTCKS_Pos) ôCMU_OPCCR2_LPTCKS_LSCLK (0x1U << CMU_OPCCR2_LPTCKS_Pos) õCMU_OPCCR2_LPTCKS_RCLP (0x2U << CMU_OPCCR2_LPTCKS_Pos) öCMU_OPCCR2_LPTCKS_PLL_L (0x3U << CMU_OPCCR2_LPTCKS_Pos) øCMU_OPCCR2_BSTCKE_Pos 4 ùCMU_OPCCR2_BSTCKE_Msk (0x1U << CMU_OPCCR2_BSTCKE_Pos) ûCMU_OPCCR2_BSTCKS_Pos 0 CMU_OPCCR2_BSTCKS_Msk (0x3U << CMU_OPCCR2_BSTCKS_Pos) CMU_OPCCR2_BSTCKS_APBCLK (0x0U << CMU_OPCCR2_BSTCKS_Pos) CMU_OPCCR2_BSTCKS_LSCLK (0x1U << CMU_OPCCR2_BSTCKS_Pos) CMU_OPCCR2_BSTCKS_RCLP (0x2U << CMU_OPCCR2_BSTCKS_Pos) CMU_OPCCR2_BSTCKS_SYSCLK (0x3U << CMU_OPCCR2_BSTCKS_Pos) £COMPCLK (0x01000000 + CMU_PCLKCR1_COMP_PCE_Pos) ¤SVDCLK (0x01000000 + CMU_PCLKCR1_SVD_PCE_Pos) ¥PADCLK (0x01000000 + CMU_PCLKCR1_PAD_PCE_Pos) ¦ANACCLK (0x01000000 + CMU_PCLKCR1_ANAC_PCE_Pos) §IWDTCLK (0x01000000 + CMU_PCLKCR1_IWDT_PCE_Pos) ¨SCUCLK (0x01000000 + CMU_PCLKCR1_SCU_PCE_Pos) ©PMUCLK (0x01000000 + CMU_PCLKCR1_PMU_PCE_Pos) ªRTCCLK (0x01000000 + CMU_PCLKCR1_RTC_PCE_Pos) «LPTCLK (0x01000000 + CMU_PCLKCR1_LPT_PCE_Pos) ®PAECLK (0x02000000 + CMU_PCLKCR2_PAE_PCE_Pos) ¯SHACLK (0x02000000 + CMU_PCLKCR2_SHA_PCE_Pos) °CICCLK (0x02000000 + CMU_PCLKCR2_CIC_PCE_Pos) ±WWDTCLK (0x02000000 + CMU_PCLKCR2_WWDT_PCE_Pos) ²RAMBISTCLK (0x02000000 + CMU_PCLKCR2_RAMBIST_PCE_Pos) ³FLASHCLK (0x02000000 + CMU_PCLKCR2_NVM_PCE_Pos) ´DMACLK (0x02000000 + CMU_PCLKCR2_DMA_PCE_Pos) µLCDCLK (0x02000000 + CMU_PCLKCR2_LCD_PCE_Pos) ¶AESCLK (0x02000000 + CMU_PCLKCR2_AES_PCE_Pos) ·TRNGCLK (0x02000000 + CMU_PCLKCR2_TRNG_PCE_Pos) ¸CRCCLK (0x02000000 + CMU_PCLKCR2_CRC_PCE_Pos) ºI2C1CLK (0x03000000 + CMU_PCLKCR3_I2C1_PCE_Pos) »I2C0CLK (0x03000000 + CMU_PCLKCR3_I2C0_PCE_Pos) ¼LPUART1CLK (0x03000000 + CMU_PCLKCR3_LPUART1_PCE_Pos) ½U7816CLK (0x03000000 + CMU_PCLKCR3_U7816_PCE_Pos) ¾LPUART0CLK (0x03000000 + CMU_PCLKCR3_LPUART0_PCE_Pos) ¿UARTIRCLK (0x03000000 + CMU_PCLKCR3_UICR_PCE_Pos) ÀUART5CLK (0x03000000 + CMU_PCLKCR3_UART5_PCE_Pos) ÁUART4CLK (0x03000000 + CMU_PCLKCR3_UART4_PCE_Pos) ÂUART3CLK (0x03000000 + CMU_PCLKCR3_UART3_PCE_Pos) ÃUART2CLK (0x03000000 + CMU_PCLKCR3_UART2_PCE_Pos) ÄUART1CLK (0x03000000 + CMU_PCLKCR3_UART1_PCE_Pos) ÅUART0CLK (0x03000000 + CMU_PCLKCR3_UART0_PCE_Pos) ÆQSPICLK (0x03000000 + CMU_PCLKCR3_QSPI_PCE_Pos) ÇSPI4CLK (0x03000000 + CMU_PCLKCR3_SPI4_PCE_Pos) ÈSPI3CLK (0x03000000 + CMU_PCLKCR3_SPI3_PCE_Pos) ÉSPI2CLK (0x03000000 + CMU_PCLKCR3_SPI2_PCE_Pos) ÊSPI1CLK (0x03000000 + CMU_PCLKCR3_SPI1_PCE_Pos) ËSPI0CLK (0x03000000 + CMU_PCLKCR3_SPI0_PCE_Pos) ÎET4CLK (0x04000000 + CMU_PCLKCR4_ET4_PCE_Pos) ÏET3CLK (0x04000000 + CMU_PCLKCR4_ET3_PCE_Pos) ÐET2CLK (0x04000000 + CMU_PCLKCR4_ET2_PCE_Pos) ÑET1CLK (0x04000000 + CMU_PCLKCR4_ET1_PCE_Pos) ÒBT2CLK (0x04000000 + CMU_PCLKCR4_BT2_PCE_Pos) ÓBT1CLK (0x04000000 + CMU_PCLKCR4_BT1_PCE_Pos) ÔBSTIMCLK (0x04000000 + CMU_PCLKCR4_BSTIM_PCE_Pos) ` T ..\Drivers\ ..\Core\Include\ fm33a0xxev_cmu.h FM33A0XXEV.h
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..\Drivers\fm33a0xxev_cmu.h Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM * FSEL v # RCHFEN 1 # PCMU_RCHF_InitTypeDef ß )*Ä PLLLDB v # PLLL_EN 1 # PCMU_PLL_L_InitTypeDef /*¿ PLLHDB v # REFPRSC v # PLLH_OSEL v # PLLH_INSEL v # PLLH_EN 1 # PCMU_PLL_H_InitTypeDef a9*ª SYSCLKSEL v # AHBPRES v # APBPRES v # SLP_ENEXTI 1 # PCMU_SYSCLK_InitTypeDef ÜC*ý SYSCLK_Frequency v # AHBCLK_Frequency v # APBCLK_Frequency v # RCHF_Frequency v # PLL_H_Frequency v # XTHF_Frequency v # LSCLK_Frequency v # PCMU_ClocksType HN e f g \ R ..\Drivers\ ..\Drivers\fm33a0xxev_cmu.c fm33a0xxev_cmu.h |
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..\Drivers\fm33a0xxev_cmu.c Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] E:\GasFlowmeter\Internet_of_things_valve\SZV103\SZV103_FM33A0xxEV_SiZhu\KEIL_MDKARM _Complex long_double _Complex double _Complex float uvoid )½__va_list __ap =# " P__builtin_va_list " "ý tv "`" "¿ "* i ! / ! I $ > % % % % %C
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%C % % % % %C %C & I ( ( 1 1 1 1 I8 I I8 4 ! I8 " I #7 I $ I % I & I ' I ( I ) * + , - . /4 04 14 24 3 4 4 4 5.:;9? I 6.:;9? 7.:;9G 8.:;9? I 9.:;9? :.:;9G ;.:;9? I <.:;9? =.:;9G >.:;9? I@ ?.:;9? @ @.:;9G@ A.:;9? I@
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K.1 L.< 4 I? M.< 4 ? NI O P I:;9 Q I4 R S T U V W 1 X4 I , Y4 I Z4 I [4 I, \4 I ]4 I 4 ^4 I ,4 _4 I4 `4 I,4 a4 I4 b4 1 , c4 1 d4 1, e4 1 f 1 g 1 h I i I j I k I 4 l I ,4 m I4 n 1 o 1 p4 I ? q4 I? < r4 I , s4 I t5 I u; v= w% x<% Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: armlink [4d3601] armlink --partial --no_add_relocs_to_undefined --no_generate_mapping_symbols --diag_suppress=9931,9931,6642 --cpu=Cortex-M0 --fpu=SoftVFP --output=.\objects\fm33a0xxev_cmu.o --vfemode=force
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Input Comments: p530-3 Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: armasm [4d35fa] armasm --debug --diag_suppress=9931,9931,1602,1073 --cpu=Cortex-M0 --fpu=SoftVFP --apcs=/interwork/interwork --no_divide fm33a0xxev_cmu.o Component: ARM Compiler 5.06 update 7 for Certification (build 960) Tool: ArmCC [4d365d] ArmCC --c99 --split_sections --debug -c --gnu -o.\objects\fm33a0xxev_cmu.o --depend=.\objects\fm33a0xxev_cmu.d --cpu=Cortex-M0 --apcs=interwork -O0 --diag_suppress=9931 -I..\Core -I..\Drivers -I..\Core\Include -I..\Hardware -I.\RTE\Device -I..\Hardware\CLOCK -I..\Hardware\DELAY -I..\Hardware\GPIO -I..\Hardware\UART -I..\Hardware\TIM -I..\Function\KEY -I..\Hardware\EXTI -I..\Hardware\RTC -I..\Hardware\ADC -I..\Hardware\I2C -I..\Function\LCD -I..\Function\EXTERN_RTC -I..\Hardware\SPI -I..\Function\GPRS -I..\Function\HARDWARE_WATCHDOG -I..\Function\IR_NEC -I..\Function\MEASURE_INTERACTION -I..\Function\POWER_MANAGE -I..\Function\STORAGE -I..\Function\UPPER_COMPUTER -I..\Function\VALVE -I..\Soft -I..\MultiButton -I..\USMART -I..\Hardware\DMA -I..\Hardware\ON_CHIP_FLASH -I..\Hardware\SVD -I..\Function\OFF_CHIP_FLASH -I..\Hardware\CRC -I..\Function\BOOTLOADER_IAP -I..\Hardware\COMP -I..\CmBackTrace -I..\Function\E2P -I..\Function\FLOW_METER_DATA_COLLECT -I..\Function\WirelessRemoteComm -I..\Function\POWER_MANAGE -I..\Function\BILLING -I..\Function\modbus -I..\Function\modbus\functions -I..\Function\modbus\include -I..\Function\modbus\port -I..\Function\modbus\rtu -I.\RTE\_SZV103_FM33A0_MainSystem -I"D:\Program Files\MDK5\Packs\Keil\FM33A0XXEV_DFP\0.0.4\Device\Include" -D__MICROLIB -D__UVISION_VERSION=538 -D_RTE_ -D_RTE_ -D__VTOR_PRESENT --omf_browse=.\objects\fm33a0xxev_cmu.crf ..\Drivers\fm33a0xxev_cmu.c /F /F /F /F ,F /F ,F /F ,F /F ,F /F ,F /F ,F /F
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ã | ù h j a × Û y ê h ú b + h < b n h h h ¦ h · b ì h ý h h " b _ h y h h « h Ä h Ü h õ h a × Û x \ g b h l g r g x g .ARM.attributes .strtab .shstrtab .rel.debug_pubnames .rel.debug_frame .rel.debug_line .rel.debug_info .reli.CMU_SysClk_Init .reli.CMU_RCHF_Init .reli.CMU_PLL_H_Init .reli.CMU_Init_RCHF_Trim .reli.CMU_GetClocksFreq .symtab .comment .arm_vfe_header __ARM_grp..debug_abbrev.group.2_Am0000_lbphKItke$2_000000 __ARM_grp.fm33a0xxev_cmu.c.2_kP7000_bu91e22QYK9_D00000 __ARM_grp.fm33a0xxev_cmu.h.2_Umb000_Po5gC3mCT6f_v00000 __ARM_grp.system_FM33A0XXEV.h.2_mO2000_zLx4kaEJIW4_f00000 __ARM_grp.FM33A0XXEV.h.2_IV4000_e4W9WBouGlb_800000 __ARM_grp.stdio.h.2_sjg000_LHQ0PkYo7e3_n10000 __ARM_grp.core_cm0plus.h.2_Yq7000_XNfk$MqMqF0_W00000 __ARM_grp.core_cmfunc.h.2_Ip1000_o07x3r0Kcad_z00000 __ARM_grp.core_cminstr.h.2_Yr1000_ngzN953kQx5_b00000 __ARM_grp.stdint.h.2_4I1000_ClkkYLvwpS5_300000 .debug_abbrev __ARM_asm.debug_abbrev.1 .debug_macinfo .debug_loc i.CMU_XTHFCR_XTHF_CFG_Set i.CMU_XTHFCR_XTHF_CFG_Get i.CMU_XTHFCR_XTHFEN_Setable i.CMU_XTHFCR_XTHFEN_Getable i.CMU_SYSCLKCR_SYSCLKSEL_Set i.CMU_SYSCLKCR_SYSCLKSEL_Get i.CMU_SYSCLKCR_STCLKSEL_Set i.CMU_SYSCLKCR_STCLKSEL_Get i.CMU_SYSCLKCR_SLP_ENEXTI_Setable i.CMU_SYSCLKCR_SLP_ENEXTI_Getable i.CMU_SYSCLKCR_APBPRES_Set i.CMU_SYSCLKCR_APBPRES_Get i.CMU_SYSCLKCR_AHBPRES_Set i.CMU_SYSCLKCR_AHBPRES_Get i.CMU_RCHFTR_RCHFTRIM_Set i.CMU_RCHFTR_RCHFTRIM_Get i.CMU_RCHFCR_RCHFEN_Setable i.CMU_RCHFCR_RCHFEN_Getable i.CMU_RCHFCR_FSEL_Set i.CMU_RCHFCR_FSEL_Get i.CMU_PLLLCR_PLLEN_Setable i.CMU_PLLLCR_PLLEN_Getable i.CMU_PLLLCR_PLLDB_Set i.CMU_PLLLCR_PLLDB_Get i.CMU_PLLLCR_LOCKED_Chk i.CMU_PLLHCR_REFPRSC_Set i.CMU_PLLHCR_REFPRSC_Get i.CMU_PLLHCR_PLLHDB_Set i.CMU_PLLHCR_PLLHDB_Get i.CMU_PLLHCR_OSEL_Set i.CMU_PLLHCR_OSEL_Get i.CMU_PLLHCR_LOCKED_Chk i.CMU_PLLHCR_INSEL_Set i.CMU_PLLHCR_INSEL_Get i.CMU_PLLHCR_EN_Setable i.CMU_PLLHCR_EN_Getable i.CMU_PERCLK_SetableEx i.CMU_OPCCR2_RNGPRSC_Set i.CMU_OPCCR2_RNGPRSC_Get i.CMU_OPCCR2_RNGCKE_Setable i.CMU_OPCCR2_RNGCKE_Getable i.CMU_OPCCR2_NVMCKE_Setable i.CMU_OPCCR2_NVMCKE_Getable i.CMU_OPCCR2_LPTCKS_Set i.CMU_OPCCR2_LPTCKS_Get i.CMU_OPCCR2_LPTCKE_Setable i.CMU_OPCCR2_LPTCKE_Getable i.CMU_OPCCR2_BSTCKS_Set i.CMU_OPCCR2_BSTCKS_Get i.CMU_OPCCR2_BSTCKE_Setable i.CMU_OPCCR2_BSTCKE_Getable i.CMU_OPCCR1_UART1CKS_Set i.CMU_OPCCR1_UART1CKS_Get i.CMU_OPCCR1_UART1CKE_Setable i.CMU_OPCCR1_UART1CKE_Getable i.CMU_OPCCR1_UART0CKS_Set i.CMU_OPCCR1_UART0CKS_Get i.CMU_OPCCR1_UART0CKE_Setable i.CMU_OPCCR1_UART0CKE_Getable i.CMU_OPCCR1_LPUART1CKS_Set i.CMU_OPCCR1_LPUART1CKS_Get i.CMU_OPCCR1_LPUART1CKE_Setable i.CMU_OPCCR1_LPUART1CKE_Getable i.CMU_OPCCR1_LPUART0CKS_Set i.CMU_OPCCR1_LPUART0CKS_Get i.CMU_OPCCR1_LPUART0CKE_Setable i.CMU_OPCCR1_LPUART0CKE_Getable i.CMU_OPCCR1_I2C1CKS_Set i.CMU_OPCCR1_I2C1CKS_Get i.CMU_OPCCR1_I2C1CKE_Setable i.CMU_OPCCR1_I2C1CKE_Getable i.CMU_OPCCR1_I2C0CKS_Set i.CMU_OPCCR1_I2C0CKS_Get i.CMU_OPCCR1_I2C0CKE_Setable i.CMU_OPCCR1_I2C0CKE_Getable i.CMU_OPCCR1_EXTICKSEL_Set i.CMU_OPCCR1_EXTICKSEL_Get i.CMU_OPCCR1_EXTICKE_Setable i.CMU_OPCCR1_EXTICKE_Getable i.CMU_ISR_SYSCSE_IF_Clr i.CMU_ISR_SYSCSE_IF_Chk i.CMU_ISR_HFDET_IF_Clr i.CMU_ISR_HFDET_IF_Chk i.CMU_ISR_HFDETO_Chk i.CMU_IER_SYSCSE_IE_Setable i.CMU_IER_SYSCSE_IE_Getable i.CMU_IER_HFDET_IE_Setable i.CMU_IER_HFDET_IE_Getable i.CMU_Deinit .revsh_text .rev16_text Lib$$Request$$armlib __ARM_grp..debug_pubnames$system_FM33A0XXEV.h$.2_mO2000_zLx4kaEJIW4_f00000 __ARM_grp..debug_pubnames$stdio.h$.2_sjg000_LHQ0PkYo7e3_n10000 __ARM_grp..debug_macinfo$system_FM33A0XXEV.h$.2_mO2000_zLx4kaEJIW4_f00000 __ARM_grp..debug_macinfo$stdio.h$.2_sjg000_LHQ0PkYo7e3_n10000 __ARM_grp..debug_macinfo$stdint.h$.2_4I1000_ClkkYLvwpS5_300000 __ARM_grp..debug_macinfo$fm33a0xxev_cmu.h$.2_Umb000_Po5gC3mCT6f_v00000 __ARM_grp..debug_macinfo$fm33a0xxev_cmu.c$.2_kP7000_bu91e22QYK9_D00000 __ARM_grp..debug_macinfo$core_cminstr.h$.2_Yr1000_ngzN953kQx5_b00000 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__ARM_grp_.debug_frame$202 __ARM_grp_.debug_frame$195 __ARM_grp_.debug_frame$188 __ARM_grp_.debug_frame$181 __ARM_grp_.debug_frame$174 __ARM_grp_.debug_frame$167 __ARM_grp_.debug_frame$160 __ARM_grp_.debug_frame$153 __ARM_grp_.debug_frame$146 __ARM_grp_.debug_frame$139 __ARM_grp_.debug_frame$132 __ARM_grp_.debug_frame$125 __ARM_grp_.debug_frame$118 __ARM_grp_.debug_frame$111 __ARM_grp_.debug_frame$104 __ARM_grp_.debug_frame$97 __ARM_grp_.debug_frame$90 __ARM_grp_.debug_frame$83 __ARM_grp_.debug_frame$76 __ARM_grp_.debug_frame$69 __ARM_grp_.debug_frame$62 __ARM_grp_.debug_frame$55 __ARM_grp_.debug_frame$48 __ARM_grp_.debug_frame$41 __ARM_grp_.debug_frame$34 __ARM_grp_.debug_frame$27 __ARM_grp_.debug_frame$20 __ARM_grp_.debug_frame$13 i.CMU_XTHFCR_XTHF_CFG_Set i.CMU_XTHFCR_XTHF_CFG_Get i.CMU_XTHFCR_XTHFEN_Setable i.CMU_XTHFCR_XTHFEN_Getable i.CMU_SysClk_Init i.CMU_SYSCLKCR_SYSCLKSEL_Set i.CMU_SYSCLKCR_SYSCLKSEL_Get i.CMU_SYSCLKCR_STCLKSEL_Set i.CMU_SYSCLKCR_STCLKSEL_Get i.CMU_SYSCLKCR_SLP_ENEXTI_Setable i.CMU_SYSCLKCR_SLP_ENEXTI_Getable i.CMU_SYSCLKCR_APBPRES_Set i.CMU_SYSCLKCR_APBPRES_Get i.CMU_SYSCLKCR_AHBPRES_Set i.CMU_SYSCLKCR_AHBPRES_Get i.CMU_RCHF_Init i.CMU_RCHFTR_RCHFTRIM_Set i.CMU_RCHFTR_RCHFTRIM_Get i.CMU_RCHFCR_RCHFEN_Setable i.CMU_RCHFCR_RCHFEN_Getable i.CMU_RCHFCR_FSEL_Set i.CMU_RCHFCR_FSEL_Get i.CMU_PLL_H_Init i.CMU_PLLLCR_PLLEN_Setable i.CMU_PLLLCR_PLLEN_Getable i.CMU_PLLLCR_PLLDB_Set i.CMU_PLLLCR_PLLDB_Get i.CMU_PLLLCR_LOCKED_Chk i.CMU_PLLHCR_REFPRSC_Set i.CMU_PLLHCR_REFPRSC_Get i.CMU_PLLHCR_PLLHDB_Set i.CMU_PLLHCR_PLLHDB_Get i.CMU_PLLHCR_OSEL_Set i.CMU_PLLHCR_OSEL_Get i.CMU_PLLHCR_LOCKED_Chk i.CMU_PLLHCR_INSEL_Set i.CMU_PLLHCR_INSEL_Get i.CMU_PLLHCR_EN_Setable i.CMU_PLLHCR_EN_Getable i.CMU_PERCLK_SetableEx i.CMU_OPCCR2_RNGPRSC_Set i.CMU_OPCCR2_RNGPRSC_Get i.CMU_OPCCR2_RNGCKE_Setable i.CMU_OPCCR2_RNGCKE_Getable i.CMU_OPCCR2_NVMCKE_Setable i.CMU_OPCCR2_NVMCKE_Getable i.CMU_OPCCR2_LPTCKS_Set i.CMU_OPCCR2_LPTCKS_Get i.CMU_OPCCR2_LPTCKE_Setable i.CMU_OPCCR2_LPTCKE_Getable i.CMU_OPCCR2_BSTCKS_Set i.CMU_OPCCR2_BSTCKS_Get i.CMU_OPCCR2_BSTCKE_Setable i.CMU_OPCCR2_BSTCKE_Getable i.CMU_OPCCR1_UART1CKS_Set i.CMU_OPCCR1_UART1CKS_Get i.CMU_OPCCR1_UART1CKE_Setable i.CMU_OPCCR1_UART1CKE_Getable i.CMU_OPCCR1_UART0CKS_Set i.CMU_OPCCR1_UART0CKS_Get i.CMU_OPCCR1_UART0CKE_Setable i.CMU_OPCCR1_UART0CKE_Getable i.CMU_OPCCR1_LPUART1CKS_Set i.CMU_OPCCR1_LPUART1CKS_Get i.CMU_OPCCR1_LPUART1CKE_Setable i.CMU_OPCCR1_LPUART1CKE_Getable i.CMU_OPCCR1_LPUART0CKS_Set i.CMU_OPCCR1_LPUART0CKS_Get i.CMU_OPCCR1_LPUART0CKE_Setable i.CMU_OPCCR1_LPUART0CKE_Getable i.CMU_OPCCR1_I2C1CKS_Set i.CMU_OPCCR1_I2C1CKS_Get i.CMU_OPCCR1_I2C1CKE_Setable i.CMU_OPCCR1_I2C1CKE_Getable i.CMU_OPCCR1_I2C0CKS_Set i.CMU_OPCCR1_I2C0CKS_Get i.CMU_OPCCR1_I2C0CKE_Setable i.CMU_OPCCR1_I2C0CKE_Getable i.CMU_OPCCR1_EXTICKSEL_Set i.CMU_OPCCR1_EXTICKSEL_Get i.CMU_OPCCR1_EXTICKE_Setable i.CMU_OPCCR1_EXTICKE_Getable i.CMU_Init_RCHF_Trim i.CMU_ISR_SYSCSE_IF_Clr i.CMU_ISR_SYSCSE_IF_Chk i.CMU_ISR_HFDET_IF_Clr i.CMU_ISR_HFDET_IF_Chk i.CMU_ISR_HFDETO_Chk i.CMU_IER_SYSCSE_IE_Setable i.CMU_IER_SYSCSE_IE_Getable i.CMU_IER_HFDET_IE_Setable i.CMU_IER_HFDET_IE_Getable i.CMU_GetClocksFreq BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OSPACE$EBA8$REQ8$PRES8$EABIv2 i.CMU_Deinit BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OSPACE$EBA8$PRES8$EABIv2 ..\Drivers\fm33a0xxev_cmu.c .revsh_text .rev16_text ..\\Drivers\\fm33a0xxev_cmu.c $d.realdata $d $t A¤ aeabi Cortex-M0 p
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