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#LAR@#°LSR@#´URESERVED5ý
#¸PID4o    #ÐPID5o    #ÔPID6o    #ØPID7o    #ÜPID0o    #àPID1o    #äPID2o    #èPID3o    #ìCID0o    #ðCID1o    #ôCID2o    #øCID3o    #ütÎ    PITM_Typeð    ¼*RESERVED0U#ICTRo    #RESERVED1U#PInterruptType_TypeÌ*×DHCSR@#DCRSR@#DCRDR@#DEMCR@#PCoreDebug_TypeòdX ..\CORE\D:\keil\ARM\ARMCC\Bin\..\include\core_cm3.hstdint.h__CM3_CORE_H__ T__CM3_CMSIS_VERSION_MAIN (0x01)U__CM3_CMSIS_VERSION_SUB (0x30)V__CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)X__CORTEX_M (0x03)Zq__I volatile consts__O volatilet__IO volatile³SCB_CPUID_IMPLEMENTER_Pos 24´SCB_CPUID_IMPLEMENTER_Msk (0xFFul << SCB_CPUID_IMPLEMENTER_Pos)¶SCB_CPUID_VARIANT_Pos 20·SCB_CPUID_VARIANT_Msk (0xFul << SCB_CPUID_VARIANT_Pos)¹SCB_CPUID_PARTNO_Pos 4ºSCB_CPUID_PARTNO_Msk (0xFFFul << SCB_CPUID_PARTNO_Pos)¼SCB_CPUID_REVISION_Pos 0½SCB_CPUID_REVISION_Msk (0xFul << SCB_CPUID_REVISION_Pos)ÀSCB_ICSR_NMIPENDSET_Pos 31ÁSCB_ICSR_NMIPENDSET_Msk (1ul << SCB_ICSR_NMIPENDSET_Pos)ÃSCB_ICSR_PENDSVSET_Pos 28ÄSCB_ICSR_PENDSVSET_Msk (1ul << SCB_ICSR_PENDSVSET_Pos)ÆSCB_ICSR_PENDSVCLR_Pos 27ÇSCB_ICSR_PENDSVCLR_Msk (1ul << SCB_ICSR_PENDSVCLR_Pos)ÉSCB_ICSR_PENDSTSET_Pos 26ÊSCB_ICSR_PENDSTSET_Msk (1ul << SCB_ICSR_PENDSTSET_Pos)ÌSCB_ICSR_PENDSTCLR_Pos 25ÍSCB_ICSR_PENDSTCLR_Msk (1ul << SCB_ICSR_PENDSTCLR_Pos)ÏSCB_ICSR_ISRPREEMPT_Pos 23ÐSCB_ICSR_ISRPREEMPT_Msk (1ul << SCB_ICSR_ISRPREEMPT_Pos)ÒSCB_ICSR_ISRPENDING_Pos 22ÓSCB_ICSR_ISRPENDING_Msk (1ul << SCB_ICSR_ISRPENDING_Pos)ÕSCB_ICSR_VECTPENDING_Pos 12ÖSCB_ICSR_VECTPENDING_Msk (0x1FFul << SCB_ICSR_VECTPENDING_Pos)ØSCB_ICSR_RETTOBASE_Pos 11ÙSCB_ICSR_RETTOBASE_Msk (1ul << SCB_ICSR_RETTOBASE_Pos)ÛSCB_ICSR_VECTACTIVE_Pos 0ÜSCB_ICSR_VECTACTIVE_Msk (0x1FFul << SCB_ICSR_VECTACTIVE_Pos)ßSCB_VTOR_TBLBASE_Pos 29àSCB_VTOR_TBLBASE_Msk (0x1FFul << SCB_VTOR_TBLBASE_Pos)âSCB_VTOR_TBLOFF_Pos 7ãSCB_VTOR_TBLOFF_Msk (0x3FFFFFul << SCB_VTOR_TBLOFF_Pos)æSCB_AIRCR_VECTKEY_Pos 16çSCB_AIRCR_VECTKEY_Msk (0xFFFFul << SCB_AIRCR_VECTKEY_Pos)éSCB_AIRCR_VECTKEYSTAT_Pos 16êSCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFul << SCB_AIRCR_VECTKEYSTAT_Pos)ìSCB_AIRCR_ENDIANESS_Pos 15íSCB_AIRCR_ENDIANESS_Msk (1ul << SCB_AIRCR_ENDIANESS_Pos)ïSCB_AIRCR_PRIGROUP_Pos 8ðSCB_AIRCR_PRIGROUP_Msk (7ul << SCB_AIRCR_PRIGROUP_Pos)òSCB_AIRCR_SYSRESETREQ_Pos 2óSCB_AIRCR_SYSRESETREQ_Msk (1ul << SCB_AIRCR_SYSRESETREQ_Pos)õSCB_AIRCR_VECTCLRACTIVE_Pos 1öSCB_AIRCR_VECTCLRACTIVE_Msk (1ul << SCB_AIRCR_VECTCLRACTIVE_Pos)øSCB_AIRCR_VECTRESET_Pos 0ùSCB_AIRCR_VECTRESET_Msk (1ul << SCB_AIRCR_VECTRESET_Pos)üSCB_SCR_SEVONPEND_Pos 4ýSCB_SCR_SEVONPEND_Msk (1ul << SCB_SCR_SEVONPEND_Pos)ÿSCB_SCR_SLEEPDEEP_Pos 2SCB_SCR_SLEEPDEEP_Msk (1ul << SCB_SCR_SLEEPDEEP_Pos)SCB_SCR_SLEEPONEXIT_Pos 1SCB_SCR_SLEEPONEXIT_Msk (1ul << SCB_SCR_SLEEPONEXIT_Pos)SCB_CCR_STKALIGN_Pos 9SCB_CCR_STKALIGN_Msk (1ul << SCB_CCR_STKALIGN_Pos)SCB_CCR_BFHFNMIGN_Pos 8SCB_CCR_BFHFNMIGN_Msk (1ul << SCB_CCR_BFHFNMIGN_Pos)SCB_CCR_DIV_0_TRP_Pos 4SCB_CCR_DIV_0_TRP_Msk (1ul << SCB_CCR_DIV_0_TRP_Pos)SCB_CCR_UNALIGN_TRP_Pos 3SCB_CCR_UNALIGN_TRP_Msk (1ul << SCB_CCR_UNALIGN_TRP_Pos)SCB_CCR_USERSETMPEND_Pos 1SCB_CCR_USERSETMPEND_Msk (1ul << SCB_CCR_USERSETMPEND_Pos)SCB_CCR_NONBASETHRDENA_Pos 0SCB_CCR_NONBASETHRDENA_Msk (1ul << SCB_CCR_NONBASETHRDENA_Pos)SCB_SHCSR_USGFAULTENA_Pos 18SCB_SHCSR_USGFAULTENA_Msk (1ul << SCB_SHCSR_USGFAULTENA_Pos)SCB_SHCSR_BUSFAULTENA_Pos 17SCB_SHCSR_BUSFAULTENA_Msk (1ul << SCB_SHCSR_BUSFAULTENA_Pos)SCB_SHCSR_MEMFAULTENA_Pos 16 SCB_SHCSR_MEMFAULTENA_Msk (1ul << SCB_SHCSR_MEMFAULTENA_Pos)¢SCB_SHCSR_SVCALLPENDED_Pos 15£SCB_SHCSR_SVCALLPENDED_Msk (1ul << SCB_SHCSR_SVCALLPENDED_Pos)¥SCB_SHCSR_BUSFAULTPENDED_Pos 14¦SCB_SHCSR_BUSFAULTPENDED_Msk (1ul << SCB_SHCSR_BUSFAULTPENDED_Pos)¨SCB_SHCSR_MEMFAULTPENDED_Pos 13©SCB_SHCSR_MEMFAULTPENDED_Msk (1ul << SCB_SHCSR_MEMFAULTPENDED_Pos)«SCB_SHCSR_USGFAULTPENDED_Pos 12¬SCB_SHCSR_USGFAULTPENDED_Msk (1ul << SCB_SHCSR_USGFAULTPENDED_Pos)®SCB_SHCSR_SYSTICKACT_Pos 11¯SCB_SHCSR_SYSTICKACT_Msk (1ul << SCB_SHCSR_SYSTICKACT_Pos)±SCB_SHCSR_PENDSVACT_Pos 10²SCB_SHCSR_PENDSVACT_Msk (1ul << SCB_SHCSR_PENDSVACT_Pos)´SCB_SHCSR_MONITORACT_Pos 8µSCB_SHCSR_MONITORACT_Msk (1ul << SCB_SHCSR_MONITORACT_Pos)·SCB_SHCSR_SVCALLACT_Pos 7¸SCB_SHCSR_SVCALLACT_Msk (1ul << SCB_SHCSR_SVCALLACT_Pos)ºSCB_SHCSR_USGFAULTACT_Pos 3»SCB_SHCSR_USGFAULTACT_Msk (1ul << SCB_SHCSR_USGFAULTACT_Pos)½SCB_SHCSR_BUSFAULTACT_Pos 1¾SCB_SHCSR_BUSFAULTACT_Msk (1ul << SCB_SHCSR_BUSFAULTACT_Pos)ÀSCB_SHCSR_MEMFAULTACT_Pos 0ÁSCB_SHCSR_MEMFAULTACT_Msk (1ul << SCB_SHCSR_MEMFAULTACT_Pos)ÄSCB_CFSR_USGFAULTSR_Pos 16ÅSCB_CFSR_USGFAULTSR_Msk (0xFFFFul << SCB_CFSR_USGFAULTSR_Pos)ÇSCB_CFSR_BUSFAULTSR_Pos 8ÈSCB_CFSR_BUSFAULTSR_Msk (0xFFul << SCB_CFSR_BUSFAULTSR_Pos)ÊSCB_CFSR_MEMFAULTSR_Pos 0ËSCB_CFSR_MEMFAULTSR_Msk (0xFFul << SCB_CFSR_MEMFAULTSR_Pos)ÎSCB_HFSR_DEBUGEVT_Pos 31ÏSCB_HFSR_DEBUGEVT_Msk (1ul << SCB_HFSR_DEBUGEVT_Pos)ÑSCB_HFSR_FORCED_Pos 30ÒSCB_HFSR_FORCED_Msk (1ul << SCB_HFSR_FORCED_Pos)ÔSCB_HFSR_VECTTBL_Pos 1ÕSCB_HFSR_VECTTBL_Msk (1ul << SCB_HFSR_VECTTBL_Pos)ØSCB_DFSR_EXTERNAL_Pos 4ÙSCB_DFSR_EXTERNAL_Msk (1ul << SCB_DFSR_EXTERNAL_Pos)ÛSCB_DFSR_VCATCH_Pos 3ÜSCB_DFSR_VCATCH_Msk (1ul << SCB_DFSR_VCATCH_Pos)ÞSCB_DFSR_DWTTRAP_Pos 2ßSCB_DFSR_DWTTRAP_Msk (1ul << SCB_DFSR_DWTTRAP_Pos)áSCB_DFSR_BKPT_Pos 1âSCB_DFSR_BKPT_Msk (1ul << SCB_DFSR_BKPT_Pos)äSCB_DFSR_HALTED_Pos 0åSCB_DFSR_HALTED_Msk (1ul << SCB_DFSR_HALTED_Pos)öSysTick_CTRL_COUNTFLAG_Pos 16÷SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos)ùSysTick_CTRL_CLKSOURCE_Pos 2úSysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos)üSysTick_CTRL_TICKINT_Pos 1ýSysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos)ÿSysTick_CTRL_ENABLE_Pos 0SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos)SysTick_LOAD_RELOAD_Pos 0SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos)SysTick_VAL_CURRENT_Pos 0SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos)SysTick_CALIB_NOREF_Pos 31SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos)SysTick_CALIB_SKEW_Pos 30SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos)SysTick_CALIB_TENMS_Pos 0SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos)¿ITM_TPR_PRIVMASK_Pos 0ÀITM_TPR_PRIVMASK_Msk (0xFul << ITM_TPR_PRIVMASK_Pos)ÃITM_TCR_BUSY_Pos 23ÄITM_TCR_BUSY_Msk (1ul << ITM_TCR_BUSY_Pos)ÆITM_TCR_ATBID_Pos 16ÇITM_TCR_ATBID_Msk (0x7Ful << ITM_TCR_ATBID_Pos)ÉITM_TCR_TSPrescale_Pos 8ÊITM_TCR_TSPrescale_Msk (3ul << ITM_TCR_TSPrescale_Pos)ÌITM_TCR_SWOENA_Pos 4ÍITM_TCR_SWOENA_Msk (1ul << ITM_TCR_SWOENA_Pos)ÏITM_TCR_DWTENA_Pos 3ÐITM_TCR_DWTENA_Msk (1ul << ITM_TCR_DWTENA_Pos)ÒITM_TCR_SYNCENA_Pos 2ÓITM_TCR_SYNCENA_Msk (1ul << ITM_TCR_SYNCENA_Pos)ÕITM_TCR_TSENA_Pos 1ÖITM_TCR_TSENA_Msk (1ul << ITM_TCR_TSENA_Pos)ØITM_TCR_ITMENA_Pos 0ÙITM_TCR_ITMENA_Msk (1ul << ITM_TCR_ITMENA_Pos)ÜITM_IWR_ATVALIDM_Pos 0ÝITM_IWR_ATVALIDM_Msk (1ul << ITM_IWR_ATVALIDM_Pos)àITM_IRR_ATREADYM_Pos 0áITM_IRR_ATREADYM_Msk (1ul << ITM_IRR_ATREADYM_Pos)äITM_IMCR_INTEGRATION_Pos 0åITM_IMCR_INTEGRATION_Msk (1ul << ITM_IMCR_INTEGRATION_Pos)èITM_LSR_ByteAcc_Pos 2éITM_LSR_ByteAcc_Msk (1ul << ITM_LSR_ByteAcc_Pos)ëITM_LSR_Access_Pos 1ìITM_LSR_Access_Msk (1ul << ITM_LSR_Access_Pos)îITM_LSR_Present_Pos 0ïITM_LSR_Present_Msk (1ul << ITM_LSR_Present_Pos)InterruptType_ICTR_INTLINESNUM_Pos 0InterruptType_ICTR_INTLINESNUM_Msk (0x1Ful << InterruptType_ICTR_INTLINESNUM_Pos)InterruptType_ACTLR_DISFOLD_Pos 2InterruptType_ACTLR_DISFOLD_Msk (1ul << InterruptType_ACTLR_DISFOLD_Pos)InterruptType_ACTLR_DISDEFWBUF_Pos 1InterruptType_ACTLR_DISDEFWBUF_Msk (1ul << InterruptType_ACTLR_DISDEFWBUF_Pos)InterruptType_ACTLR_DISMCYCINT_Pos 0InterruptType_ACTLR_DISMCYCINT_Msk (1ul << InterruptType_ACTLR_DISMCYCINT_Pos)õCoreDebug_DHCSR_DBGKEY_Pos 16öCoreDebug_DHCSR_DBGKEY_Msk (0xFFFFul << CoreDebug_DHCSR_DBGKEY_Pos)øCoreDebug_DHCSR_S_RESET_ST_Pos 25ùCoreDebug_DHCSR_S_RESET_ST_Msk (1ul << CoreDebug_DHCSR_S_RESET_ST_Pos)ûCoreDebug_DHCSR_S_RETIRE_ST_Pos 24üCoreDebug_DHCSR_S_RETIRE_ST_Msk (1ul << CoreDebug_DHCSR_S_RETIRE_ST_Pos)þCoreDebug_DHCSR_S_LOCKUP_Pos 19ÿCoreDebug_DHCSR_S_LOCKUP_Msk (1ul << CoreDebug_DHCSR_S_LOCKUP_Pos)CoreDebug_DHCSR_S_SLEEP_Pos 18CoreDebug_DHCSR_S_SLEEP_Msk (1ul << CoreDebug_DHCSR_S_SLEEP_Pos)CoreDebug_DHCSR_S_HALT_Pos 17CoreDebug_DHCSR_S_HALT_Msk (1ul << CoreDebug_DHCSR_S_HALT_Pos)CoreDebug_DHCSR_S_REGRDY_Pos 16CoreDebug_DHCSR_S_REGRDY_Msk (1ul << CoreDebug_DHCSR_S_REGRDY_Pos)CoreDebug_DHCSR_C_SNAPSTALL_Pos 5CoreDebug_DHCSR_C_SNAPSTALL_Msk (1ul << CoreDebug_DHCSR_C_SNAPSTALL_Pos)CoreDebug_DHCSR_C_MASKINTS_Pos 3CoreDebug_DHCSR_C_MASKINTS_Msk (1ul << CoreDebug_DHCSR_C_MASKINTS_Pos)CoreDebug_DHCSR_C_STEP_Pos 2CoreDebug_DHCSR_C_STEP_Msk (1ul << CoreDebug_DHCSR_C_STEP_Pos)CoreDebug_DHCSR_C_HALT_Pos 1CoreDebug_DHCSR_C_HALT_Msk (1ul << CoreDebug_DHCSR_C_HALT_Pos)CoreDebug_DHCSR_C_DEBUGEN_Pos 0CoreDebug_DHCSR_C_DEBUGEN_Msk (1ul << CoreDebug_DHCSR_C_DEBUGEN_Pos)CoreDebug_DCRSR_REGWnR_Pos 16CoreDebug_DCRSR_REGWnR_Msk (1ul << CoreDebug_DCRSR_REGWnR_Pos)CoreDebug_DCRSR_REGSEL_Pos 0CoreDebug_DCRSR_REGSEL_Msk (0x1Ful << CoreDebug_DCRSR_REGSEL_Pos)¡CoreDebug_DEMCR_TRCENA_Pos 24¢CoreDebug_DEMCR_TRCENA_Msk (1ul << CoreDebug_DEMCR_TRCENA_Pos)¤CoreDebug_DEMCR_MON_REQ_Pos 19¥CoreDebug_DEMCR_MON_REQ_Msk (1ul << CoreDebug_DEMCR_MON_REQ_Pos)§CoreDebug_DEMCR_MON_STEP_Pos 18¨CoreDebug_DEMCR_MON_STEP_Msk (1ul << CoreDebug_DEMCR_MON_STEP_Pos)ªCoreDebug_DEMCR_MON_PEND_Pos 17«CoreDebug_DEMCR_MON_PEND_Msk (1ul << CoreDebug_DEMCR_MON_PEND_Pos)CoreDebug_DEMCR_MON_EN_Pos 16®CoreDebug_DEMCR_MON_EN_Msk (1ul << CoreDebug_DEMCR_MON_EN_Pos)°CoreDebug_DEMCR_VC_HARDERR_Pos 10±CoreDebug_DEMCR_VC_HARDERR_Msk (1ul << CoreDebug_DEMCR_VC_HARDERR_Pos)³CoreDebug_DEMCR_VC_INTERR_Pos 9´CoreDebug_DEMCR_VC_INTERR_Msk (1ul << CoreDebug_DEMCR_VC_INTERR_Pos)¶CoreDebug_DEMCR_VC_BUSERR_Pos 8·CoreDebug_DEMCR_VC_BUSERR_Msk (1ul << CoreDebug_DEMCR_VC_BUSERR_Pos)¹CoreDebug_DEMCR_VC_STATERR_Pos 7ºCoreDebug_DEMCR_VC_STATERR_Msk (1ul << CoreDebug_DEMCR_VC_STATERR_Pos)¼CoreDebug_DEMCR_VC_CHKERR_Pos 6½CoreDebug_DEMCR_VC_CHKERR_Msk (1ul << CoreDebug_DEMCR_VC_CHKERR_Pos)¿CoreDebug_DEMCR_VC_NOCPERR_Pos 5ÀCoreDebug_DEMCR_VC_NOCPERR_Msk (1ul << CoreDebug_DEMCR_VC_NOCPERR_Pos)ÂCoreDebug_DEMCR_VC_MMERR_Pos 4ÃCoreDebug_DEMCR_VC_MMERR_Msk (1ul << CoreDebug_DEMCR_VC_MMERR_Pos)ÅCoreDebug_DEMCR_VC_CORERESET_Pos 0ÆCoreDebug_DEMCR_VC_CORERESET_Msk (1ul << CoreDebug_DEMCR_VC_CORERESET_Pos)ËSCS_BASE (0xE000E000)ÌITM_BASE (0xE0000000)ÍCoreDebug_BASE (0xE000EDF0)ÎSysTick_BASE (SCS_BASE + 0x0010)ÏNVIC_BASE (SCS_BASE + 0x0100)ÐSCB_BASE (SCS_BASE + 0x0D00)ÒInterruptType ((InterruptType_Type *) SCS_BASE)ÓSCB ((SCB_Type *) SCB_BASE)ÔSysTick ((SysTick_Type *) SysTick_BASE)ÕNVIC ((NVIC_Type *) NVIC_BASE)ÖITM ((ITM_Type *) ITM_BASE)×CoreDebug ((CoreDebug_Type *) CoreDebug_BASE)æ__ASM __asmç__INLINE __inlineý__enable_fault_irq __enable_fiqþ__disable_fault_irq __disable_fiq__NOP __nop__WFI __wfi__WFE __wfe__SEV __sev__ISB() __isb(0)__DSB() __dsb(0)__DMB() __dmb(0)__REV __rev__RBIT __rbit__LDREXB(ptr) ((unsigned char ) __ldrex(ptr))__LDREXH(ptr) ((unsigned short) __ldrex(ptr))__LDREXW(ptr) ((unsigned int ) __ldrex(ptr))__STREXB(value,ptr) __strex(value, ptr)__STREXH(value,ptr) __strex(value, ptr)__STREXW(value,ptr) __strex(value, ptr)«__CLREX __clrexÏ ITM_RXBUFFER_EMPTY 0x5AA55AA5p ITM_RxBuffer´
..\USER\system_stm32f10x.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERqSystemCoreClockU<2 ..\USER\system_stm32f10x.h"__SYSTEM_STM32F10X_H "¸SystemCoreClock! Ð$
..\USER\stm32f10x.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERÑ    IRQnNonMaskableInt_IRQnrMemoryManagement_IRQntBusFault_IRQnuUsageFault_IRQnvSVCall_IRQn{DebugMonitor_IRQn|PendSV_IRQn~SysTick_IRQnWWDG_IRQnPVD_IRQnTAMPER_IRQnRTC_IRQnFLASH_IRQnRCC_IRQnEXTI0_IRQnEXTI1_IRQnEXTI2_IRQnEXTI3_IRQn    EXTI4_IRQn
DMA1_Channel1_IRQnDMA1_Channel2_IRQnDMA1_Channel3_IRQn DMA1_Channel4_IRQnDMA1_Channel5_IRQnDMA1_Channel6_IRQnDMA1_Channel7_IRQnADC1_2_IRQnUSB_HP_CAN1_TX_IRQnUSB_LP_CAN1_RX0_IRQnCAN1_RX1_IRQnCAN1_SCE_IRQnEXTI9_5_IRQnTIM1_BRK_IRQnTIM1_UP_IRQnTIM1_TRG_COM_IRQnTIM1_CC_IRQnTIM2_IRQnTIM3_IRQnTIM4_IRQnI2C1_EV_IRQnI2C1_ER_IRQn I2C2_EV_IRQn!I2C2_ER_IRQn"SPI1_IRQn#SPI2_IRQn$USART1_IRQn%USART2_IRQn&USART3_IRQn'EXTI15_10_IRQn(RTCAlarm_IRQn)USBWakeUp_IRQn*TIM8_BRK_IRQn+TIM8_UP_IRQn,TIM8_TRG_COM_IRQn-TIM8_CC_IRQn.ADC3_IRQn/FSMC_IRQn0SDIO_IRQn1TIM5_IRQn2SPI3_IRQn3UART4_IRQn4UART5_IRQn5TIM6_IRQn6TIM7_IRQn7DMA2_Channel1_IRQn8DMA2_Channel2_IRQn9DMA2_Channel3_IRQn:DMA2_Channel4_5_IRQn;PIRQn_TypeØPs32ëPs16    ìPs8ûíPsc32ð    Psc16ñûPsc82òtPvs32Dôt    Pvs16WõtûPvs8jötPvsc32|øtPvsc16ùt2Pvsc8 úPu32UüPu16EýPu86þUPuc32ÚEPuc16í6Puc8tUPvu32tEPvu16%t6Pvu88tÚPvuc32JtíPvuc16\tPvuc8n RESETSETPFlagStatus(PITStatus4Ò DISABLEENABLEPFunctionalState¸/ERRORSUCCESSPErrorStatusê,*PSR#CR1#CR2#SMPR1#SMPR2#JOFR1#JOFR2#JOFR3#JOFR4# HTR#$LTR#(SQR1#,SQR2#0SQR3#4JSQR#8JDR1#<JDR2#@JDR3#DJDR4#HDR#LPADC_TypeDef¹*ìÀRESERVED0U#DR1%#RESERVED1E#DR2%#RESERVED2E#
DR3%#RESERVED3E#DR4%#RESERVED4E#DR5%#RESERVED5E#DR6%#RESERVED6E#DR7%#RESERVED7E#DR8%# RESERVED8E#"DR9%#$RESERVED9E#&DR10%#(RESERVED10E#*RTCCR%#,RESERVED11E#.CR%#0RESERVED12E#2CSR%#4¹ERESERVED13®    #6DR11%#@RESERVED14E#BDR12%#DRESERVED15E#FDR13%#HRESERVED16E#JDR14%#LRESERVED17E#NDR15%#PRESERVED18E#RDR16%#TRESERVED19E#VDR17%#XRESERVED20E#ZDR18%#\RESERVED21E#^DR19%#`RESERVED22E#bDR20%#dRESERVED23E#fDR21%#hRESERVED24E#jDR22%#lRESERVED25E#nDR23%#pRESERVED26E#rDR24%#tRESERVED27E#vDR25%#xRESERVED28E#zDR26%#|RESERVED29E#~DR27%#RESERVED30E#DR28%#RESERVED31E#DR29%#RESERVED32E#DR30%#RESERVED33E#DR31%#RESERVED34E#DR32%#RESERVED35E#DR33%#RESERVED36E#DR34%#RESERVED37E#DR35%# RESERVED38E#¢DR36%#¤RESERVED39E#¦DR37%#¨RESERVED40E#ªDR38%#¬RESERVED41E#®DR39%#°RESERVED42E#²DR40%#´RESERVED43E#¶DR41%#¸RESERVED44E#ºDR42%#¼RESERVED45E#¾PBKP_TypeDef*´TIR#TDTR#TDLR#TDHR#PCAN_TxMailBox_TypeDef¨*RIR#RDTR#RDLR#RDHR#PCAN_FIFOMailBox_TypeDefR´*ÁFR1#FR2#PCAN_FilterRegister_TypeDef¦¾*ò °MCR#MSR#TSR#RF0R#RF1R#IER#ESR#BTR#ÎUWRESERVED0C# è4sTxMailBox_#sFIFOMailBox{#°¤URESERVED1#ÐFMR#FM1R#RESERVED2U#FS1R#RESERVED3U#FFA1R#RESERVED4U#FA1R#¾ URESERVED53# Ù Á sFilterRegisterP#ÀPCAN_TypeDefäà*Ú!CFGR#OAR#PRES#ESR#CSR#TXD#RXD#PCEC_TypeDefî*¸"DR#IDR8#RESERVED06#RESERVED1E#CR#PCRC_TypeDefîû*$4CR#SWTRIGR#DHR12R1#DHR12L1#DHR8R1#DHR12R2#DHR12L2#DHR8R2#DHR12RD# DHR12LD#$DHR8RD#(DOR1#,DOR2#0PDAC_TypeDefL*·$IDCODE#CR#PDBGMCU_TypeDef*%CCR#CNDTR#CPAR#CMAR#PDMA_Channel_TypeDefN©*»%ISR#IFCR#PDMA_TypeDef¯*Ä.Ø MACCR#MACFFR#MACHTHR#MACHTLR#MACMIIAR#MACMIIDR#MACFCR#MACVLANTR#×&URESERVED0L# MACRWUFFR#(MACPMTCSR#,'URESERVED1#0MACSR#8MACIMR#<MACA0HR#@MACA0LR#DMACA1HR#HMACA1LR#LMACA2HR#PMACA2LR#TMACA3HR#XMACA3LR#\Ä(U'RESERVED29#`MMCCR#MMCRIR#MMCTIR#MMCRIMR#MMCTIMR#¬)U RESERVED3¡#MMCTGFSCCR#ÌMMCTGFMSCCR#Ðð)URESERVED4å#ÔMMCTGFCR#è*U    RESERVED5#ìMMCRFCECR#MMCRFAECR#ß*U    RESERVED6T#MMCRGUFCR#Ä+UÍRESERVED7#ÈPTPTSCR#PTPSSIR#PTPTSHR#PTPTSLR#PTPTSHUR#PTPTSLUR#PTPTSAR#PTPTTHR#PTPTTLR# ¿,U¶RESERVED83#¤DMABMR# DMATPDR# DMARPDR# DMARDLAR# DMATDLAR# DMASR# DMAOMR# DMAIER# DMAMFBOCR#  ë-URESERVED9à#¤ DMACHTDR#È DMACHRDR#Ì DMACHTBAR#Ð DMACHRBAR#Ô PETH_TypeDefÏö*¢/IMR#EMR#RTSR#FTSR#SWIER#PR#PEXTI_TypeDefX*§0$ACR#KEYR#OPTKEYR#SR#CR#AR#RESERVED#OBR#WRPR# PFLASH_TypeDef·*£1RDP%#USER%#Data0%#Data1%#WRP0%#WRP1%#
WRP2%#WRP3%#POB_TypeDef=*Ð1 Ã1BTCRº#PFSMC_Bank1_TypeDef¶¶*2ø1BWTRï#PFSMC_Bank1E_TypeDefë¿*÷2PCR2#SR2#PMEM2#PATT2#RESERVED0U#ECCR2#PFSMC_Bank2_TypeDef!Í*è3PCR3#SR3#PMEM3#PATT3#RESERVED0U#ECCR3#PFSMC_Bank3_TypeDefÛ*Å4PCR4#SR4#PMEM4#PATT4#PIO4#PFSMC_Bank4_TypeDefè*´5CRL#CRH#IDR#ODR#BSRR#BRR#LCKR#PGPIO_TypeDef`÷*6 EVCR#MAPR#î5EXTICRå#RESERVED0U#MAPR2#PAFIO_TypeDefÉ*È8$CR1%#RESERVED0E#CR2%#RESERVED1E#OAR1%#RESERVED2E#
OAR2%#RESERVED3E#DR%#RESERVED4E#SR1%#RESERVED5E#SR2%#RESERVED6E#CCR%#RESERVED7E#TRISE%# RESERVED8E#"PI2C_TypeDef2*9KR#PR#RLR#SR#PIWDG_TypeDef\©*¹9CR#CSR#PPWR_TypeDef³*Ö:(CR#CFGR#CIR#APB2RSTR#APB1RSTR#AHBENR#APB2ENR#APB1ENR#BDCR# CSR#$PRCC_TypeDefÍÏ*£=(CRH%#RESERVED0E#CRL%#RESERVED1E#PRLH%#RESERVED2E#
PRLL%#RESERVED3E#DIVH%#RESERVED4E#DIVL%#RESERVED5E#CNTH%#RESERVED6E#CNTL%#RESERVED7E#ALRH%# RESERVED8E#"ALRL%#$RESERVED9E#&PRTC_TypeDefjë*Û?POWER#CLKCR#ARG#CMD#RESPCMDJ#RESP1J#RESP2J#RESP3J#RESP4J# DTIMER#$DLEN#(DCTRL#,DCOUNTJ#0STAJ#4ICR#8MASK#<?URESERVED0#@FIFOCNTJ#H¼?URESERVED1±#LFIFO#PSDIO_TypeDef·    *B$CR1%#RESERVED0E#CR2%#RESERVED1E#SR%#RESERVED2E#
DR%#RESERVED3E#CRCPR%#RESERVED4E#RXCRCR%#RESERVED5E#TXCRCR%#RESERVED6E#I2SCFGR%#RESERVED7E#I2SPR%# RESERVED8E#"PSPI_TypeDefð¡    *GPCR1%#RESERVED0E#CR2%#RESERVED1E#SMCR%#RESERVED2E#
DIER%#RESERVED3E#SR%#RESERVED4E#EGR%#RESERVED5E#CCMR1%#RESERVED6E#CCMR2%#RESERVED7E#CCER%# RESERVED8E#"CNT%#$RESERVED9E#&PSC%#(RESERVED10E#*ARR%#,RESERVED11E#.RCR%#0RESERVED12E#2CCR1%#4RESERVED13E#6CCR2%#8RESERVED14E#:CCR3%#<RESERVED15E#>CCR4%#@RESERVED16E#BBDTR%#DRESERVED17E#FDCR%#HRESERVED18E#JDMAR%#LRESERVED19E#NPTIM_TypeDef#!Ñ    *ISR%#RESERVED0E#DR%#RESERVED1E#BRR%#RESERVED2E#
CR1%#RESERVED3E#CR2%#RESERVED4E#CR3%#RESERVED5E#GTPR%#RESERVED6E#PUSART_TypeDefª#ç    *ºICR#CFR#SR#PWWDG_TypeDef$ò    ¤ ..\USER\..\CORE\D:\keil\ARM\ARMCC\Bin\..\include\stm32f10x.hcore_cm3.hsystem_stm32f10x.hstdint.hstm32f10x_conf.h3__STM32F10x_H wHSE_VALUE ((uint32_t)12000000)HSE_STARTUP_TIMEOUT ((uint16_t)0x0500)HSI_VALUE ((uint32_t)8000000)__STM32F10X_STDPERIPH_VERSION_MAIN (0x03)__STM32F10X_STDPERIPH_VERSION_SUB1 (0x05)__STM32F10X_STDPERIPH_VERSION_SUB2 (0x00)__STM32F10X_STDPERIPH_VERSION_RC (0x00)__STM32F10X_STDPERIPH_VERSION ( (__STM32F10X_STDPERIPH_VERSION_MAIN << 24) |(__STM32F10X_STDPERIPH_VERSION_SUB1 << 16) |(__STM32F10X_STDPERIPH_VERSION_SUB2 << 8) |(__STM32F10X_STDPERIPH_VERSION_RC))__MPU_PRESENT 0 __NVIC_PRIO_BITS 4¡__Vendor_SysTickConfig 0ÞßàIS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))HSEStartUp_TimeOut HSE_STARTUP_TIMEOUTHSE_Value HSE_VALUEHSI_Value HSI_VALUEý    FLASH_BASE ((uint32_t)0x08000000)þ    SRAM_BASE ((uint32_t)0x20000000)ÿ    PERIPH_BASE ((uint32_t)0x40000000)
SRAM_BB_BASE ((uint32_t)0x22000000)
PERIPH_BB_BASE ((uint32_t)0x42000000)
FSMC_R_BASE ((uint32_t)0xA0000000)
APB1PERIPH_BASE PERIPH_BASE
APB2PERIPH_BASE (PERIPH_BASE + 0x10000)
AHBPERIPH_BASE (PERIPH_BASE + 0x20000)
TIM2_BASE (APB1PERIPH_BASE + 0x0000)
TIM3_BASE (APB1PERIPH_BASE + 0x0400)
TIM4_BASE (APB1PERIPH_BASE + 0x0800)
TIM5_BASE (APB1PERIPH_BASE + 0x0C00)
TIM6_BASE (APB1PERIPH_BASE + 0x1000)
TIM7_BASE (APB1PERIPH_BASE + 0x1400)
TIM12_BASE (APB1PERIPH_BASE + 0x1800)
TIM13_BASE (APB1PERIPH_BASE + 0x1C00)
TIM14_BASE (APB1PERIPH_BASE + 0x2000)
RTC_BASE (APB1PERIPH_BASE + 0x2800)
WWDG_BASE (APB1PERIPH_BASE + 0x2C00)
IWDG_BASE (APB1PERIPH_BASE + 0x3000)
SPI2_BASE (APB1PERIPH_BASE + 0x3800)
SPI3_BASE (APB1PERIPH_BASE + 0x3C00)
USART2_BASE (APB1PERIPH_BASE + 0x4400)
USART3_BASE (APB1PERIPH_BASE + 0x4800)
UART4_BASE (APB1PERIPH_BASE + 0x4C00)
UART5_BASE (APB1PERIPH_BASE + 0x5000)
I2C1_BASE (APB1PERIPH_BASE + 0x5400)
I2C2_BASE (APB1PERIPH_BASE + 0x5800)
CAN1_BASE (APB1PERIPH_BASE + 0x6400) 
CAN2_BASE (APB1PERIPH_BASE + 0x6800)¡
BKP_BASE (APB1PERIPH_BASE + 0x6C00)¢
PWR_BASE (APB1PERIPH_BASE + 0x7000)£
DAC_BASE (APB1PERIPH_BASE + 0x7400)¤
CEC_BASE (APB1PERIPH_BASE + 0x7800)¦
AFIO_BASE (APB2PERIPH_BASE + 0x0000)§
EXTI_BASE (APB2PERIPH_BASE + 0x0400)¨
GPIOA_BASE (APB2PERIPH_BASE + 0x0800)©
GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)ª
GPIOC_BASE (APB2PERIPH_BASE + 0x1000)«
GPIOD_BASE (APB2PERIPH_BASE + 0x1400)¬
GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
GPIOF_BASE (APB2PERIPH_BASE + 0x1C00)®
GPIOG_BASE (APB2PERIPH_BASE + 0x2000)¯
ADC1_BASE (APB2PERIPH_BASE + 0x2400)°
ADC2_BASE (APB2PERIPH_BASE + 0x2800)±
TIM1_BASE (APB2PERIPH_BASE + 0x2C00)²
SPI1_BASE (APB2PERIPH_BASE + 0x3000)³
TIM8_BASE (APB2PERIPH_BASE + 0x3400)´
USART1_BASE (APB2PERIPH_BASE + 0x3800)µ
ADC3_BASE (APB2PERIPH_BASE + 0x3C00)¶
TIM15_BASE (APB2PERIPH_BASE + 0x4000)·
TIM16_BASE (APB2PERIPH_BASE + 0x4400)¸
TIM17_BASE (APB2PERIPH_BASE + 0x4800)¹
TIM9_BASE (APB2PERIPH_BASE + 0x4C00)º
TIM10_BASE (APB2PERIPH_BASE + 0x5000)»
TIM11_BASE (APB2PERIPH_BASE + 0x5400)½
SDIO_BASE (PERIPH_BASE + 0x18000)¿
DMA1_BASE (AHBPERIPH_BASE + 0x0000)À
DMA1_Channel1_BASE (AHBPERIPH_BASE + 0x0008)Á
DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C)Â
DMA1_Channel3_BASE (AHBPERIPH_BASE + 0x0030)Ã
DMA1_Channel4_BASE (AHBPERIPH_BASE + 0x0044)Ä
DMA1_Channel5_BASE (AHBPERIPH_BASE + 0x0058)Å
DMA1_Channel6_BASE (AHBPERIPH_BASE + 0x006C)Æ
DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080)Ç
DMA2_BASE (AHBPERIPH_BASE + 0x0400)È
DMA2_Channel1_BASE (AHBPERIPH_BASE + 0x0408)É
DMA2_Channel2_BASE (AHBPERIPH_BASE + 0x041C)Ê
DMA2_Channel3_BASE (AHBPERIPH_BASE + 0x0430)Ë
DMA2_Channel4_BASE (AHBPERIPH_BASE + 0x0444)Ì
DMA2_Channel5_BASE (AHBPERIPH_BASE + 0x0458)Í
RCC_BASE (AHBPERIPH_BASE + 0x1000)Î
CRC_BASE (AHBPERIPH_BASE + 0x3000)Ð
FLASH_R_BASE (AHBPERIPH_BASE + 0x2000)Ñ
OB_BASE ((uint32_t)0x1FFFF800)Ó
ETH_BASE (AHBPERIPH_BASE + 0x8000)Ô
ETH_MAC_BASE (ETH_BASE)Õ
ETH_MMC_BASE (ETH_BASE + 0x0100)Ö
ETH_PTP_BASE (ETH_BASE + 0x0700)×
ETH_DMA_BASE (ETH_BASE + 0x1000)Ù
FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000)Ú
FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104)Û
FSMC_Bank2_R_BASE (FSMC_R_BASE + 0x0060)Ü
FSMC_Bank3_R_BASE (FSMC_R_BASE + 0x0080)Ý
FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0)ß
DBGMCU_BASE ((uint32_t)0xE0042000)é
TIM2 ((TIM_TypeDef *) TIM2_BASE)ê
TIM3 ((TIM_TypeDef *) TIM3_BASE)ë
TIM4 ((TIM_TypeDef *) TIM4_BASE)ì
TIM5 ((TIM_TypeDef *) TIM5_BASE)í
TIM6 ((TIM_TypeDef *) TIM6_BASE)î
TIM7 ((TIM_TypeDef *) TIM7_BASE)ï
TIM12 ((TIM_TypeDef *) TIM12_BASE)ð
TIM13 ((TIM_TypeDef *) TIM13_BASE)ñ
TIM14 ((TIM_TypeDef *) TIM14_BASE)ò
RTC ((RTC_TypeDef *) RTC_BASE)ó
WWDG ((WWDG_TypeDef *) WWDG_BASE)ô
IWDG ((IWDG_TypeDef *) IWDG_BASE)õ
SPI2 ((SPI_TypeDef *) SPI2_BASE)ö
SPI3 ((SPI_TypeDef *) SPI3_BASE)÷
USART2 ((USART_TypeDef *) USART2_BASE)ø
USART3 ((USART_TypeDef *) USART3_BASE)ù
UART4 ((USART_TypeDef *) UART4_BASE)ú
UART5 ((USART_TypeDef *) UART5_BASE)û
I2C1 ((I2C_TypeDef *) I2C1_BASE)ü
I2C2 ((I2C_TypeDef *) I2C2_BASE)ý
CAN1 ((CAN_TypeDef *) CAN1_BASE)þ
CAN2 ((CAN_TypeDef *) CAN2_BASE)ÿ
BKP ((BKP_TypeDef *) BKP_BASE)PWR ((PWR_TypeDef *) PWR_BASE)DAC ((DAC_TypeDef *) DAC_BASE)CEC ((CEC_TypeDef *) CEC_BASE)AFIO ((AFIO_TypeDef *) AFIO_BASE)EXTI ((EXTI_TypeDef *) EXTI_BASE)GPIOA ((GPIO_TypeDef *) GPIOA_BASE)GPIOB ((GPIO_TypeDef *) GPIOB_BASE)GPIOC ((GPIO_TypeDef *) GPIOC_BASE)GPIOD ((GPIO_TypeDef *) GPIOD_BASE)GPIOE ((GPIO_TypeDef *) GPIOE_BASE)GPIOF ((GPIO_TypeDef *) GPIOF_BASE)GPIOG ((GPIO_TypeDef *) GPIOG_BASE)ADC1 ((ADC_TypeDef *) ADC1_BASE)ADC2 ((ADC_TypeDef *) ADC2_BASE)TIM1 ((TIM_TypeDef *) TIM1_BASE)SPI1 ((SPI_TypeDef *) SPI1_BASE)TIM8 ((TIM_TypeDef *) TIM8_BASE)USART1 ((USART_TypeDef *) USART1_BASE)ADC3 ((ADC_TypeDef *) ADC3_BASE)TIM15 ((TIM_TypeDef *) TIM15_BASE)TIM16 ((TIM_TypeDef *) TIM16_BASE)TIM17 ((TIM_TypeDef *) TIM17_BASE)TIM9 ((TIM_TypeDef *) TIM9_BASE)TIM10 ((TIM_TypeDef *) TIM10_BASE)TIM11 ((TIM_TypeDef *) TIM11_BASE)SDIO ((SDIO_TypeDef *) SDIO_BASE)DMA1 ((DMA_TypeDef *) DMA1_BASE)DMA2 ((DMA_TypeDef *) DMA2_BASE)DMA1_Channel1 ((DMA_Channel_TypeDef *) DMA1_Channel1_BASE)DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)DMA1_Channel3 ((DMA_Channel_TypeDef *) DMA1_Channel3_BASE)DMA1_Channel4 ((DMA_Channel_TypeDef *) DMA1_Channel4_BASE) DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)¡DMA1_Channel6 ((DMA_Channel_TypeDef *) DMA1_Channel6_BASE)¢DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)£DMA2_Channel1 ((DMA_Channel_TypeDef *) DMA2_Channel1_BASE)¤DMA2_Channel2 ((DMA_Channel_TypeDef *) DMA2_Channel2_BASE)¥DMA2_Channel3 ((DMA_Channel_TypeDef *) DMA2_Channel3_BASE)¦DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)§DMA2_Channel5 ((DMA_Channel_TypeDef *) DMA2_Channel5_BASE)¨RCC ((RCC_TypeDef *) RCC_BASE)©CRC ((CRC_TypeDef *) CRC_BASE)ªFLASH ((FLASH_TypeDef *) FLASH_R_BASE)«OB ((OB_TypeDef *) OB_BASE)¬ETH ((ETH_TypeDef *) ETH_BASE)FSMC_Bank1 ((FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE)®FSMC_Bank1E ((FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE)¯FSMC_Bank2 ((FSMC_Bank2_TypeDef *) FSMC_Bank2_R_BASE)°FSMC_Bank3 ((FSMC_Bank3_TypeDef *) FSMC_Bank3_R_BASE)±FSMC_Bank4 ((FSMC_Bank4_TypeDef *) FSMC_Bank4_R_BASE)²DBGMCU ((DBGMCU_TypeDef *) DBGMCU_BASE)ËCRC_DR_DR ((uint32_t)0xFFFFFFFF)ÏCRC_IDR_IDR ((uint8_t)0xFF)ÓCRC_CR_RESET ((uint8_t)0x01)ÜPWR_CR_LPDS ((uint16_t)0x0001)ÝPWR_CR_PDDS ((uint16_t)0x0002)ÞPWR_CR_CWUF ((uint16_t)0x0004)ßPWR_CR_CSBF ((uint16_t)0x0008)àPWR_CR_PVDE ((uint16_t)0x0010)âPWR_CR_PLS ((uint16_t)0x00E0)ãPWR_CR_PLS_0 ((uint16_t)0x0020)äPWR_CR_PLS_1 ((uint16_t)0x0040)åPWR_CR_PLS_2 ((uint16_t)0x0080)èPWR_CR_PLS_2V2 ((uint16_t)0x0000)éPWR_CR_PLS_2V3 ((uint16_t)0x0020)êPWR_CR_PLS_2V4 ((uint16_t)0x0040)ëPWR_CR_PLS_2V5 ((uint16_t)0x0060)ìPWR_CR_PLS_2V6 ((uint16_t)0x0080)íPWR_CR_PLS_2V7 ((uint16_t)0x00A0)îPWR_CR_PLS_2V8 ((uint16_t)0x00C0)ïPWR_CR_PLS_2V9 ((uint16_t)0x00E0)ñPWR_CR_DBP ((uint16_t)0x0100)õPWR_CSR_WUF ((uint16_t)0x0001)öPWR_CSR_SBF ((uint16_t)0x0002)÷PWR_CSR_PVDO ((uint16_t)0x0004)øPWR_CSR_EWUP ((uint16_t)0x0100)BKP_DR1_D ((uint16_t)0xFFFF)BKP_DR2_D ((uint16_t)0xFFFF)BKP_DR3_D ((uint16_t)0xFFFF)BKP_DR4_D ((uint16_t)0xFFFF)BKP_DR5_D ((uint16_t)0xFFFF)BKP_DR6_D ((uint16_t)0xFFFF)BKP_DR7_D ((uint16_t)0xFFFF)BKP_DR8_D ((uint16_t)0xFFFF)BKP_DR9_D ((uint16_t)0xFFFF)BKP_DR10_D ((uint16_t)0xFFFF)BKP_DR11_D ((uint16_t)0xFFFF)¢BKP_DR12_D ((uint16_t)0xFFFF)¥BKP_DR13_D ((uint16_t)0xFFFF)¨BKP_DR14_D ((uint16_t)0xFFFF)«BKP_DR15_D ((uint16_t)0xFFFF)®BKP_DR16_D ((uint16_t)0xFFFF)±BKP_DR17_D ((uint16_t)0xFFFF)´BKP_DR18_D ((uint16_t)0xFFFF)·BKP_DR19_D ((uint16_t)0xFFFF)ºBKP_DR20_D ((uint16_t)0xFFFF)½BKP_DR21_D ((uint16_t)0xFFFF)ÀBKP_DR22_D ((uint16_t)0xFFFF)ÃBKP_DR23_D ((uint16_t)0xFFFF)ÆBKP_DR24_D ((uint16_t)0xFFFF)ÉBKP_DR25_D ((uint16_t)0xFFFF)ÌBKP_DR26_D ((uint16_t)0xFFFF)ÏBKP_DR27_D ((uint16_t)0xFFFF)ÒBKP_DR28_D ((uint16_t)0xFFFF)ÕBKP_DR29_D ((uint16_t)0xFFFF)ØBKP_DR30_D ((uint16_t)0xFFFF)ÛBKP_DR31_D ((uint16_t)0xFFFF)ÞBKP_DR32_D ((uint16_t)0xFFFF)áBKP_DR33_D ((uint16_t)0xFFFF)äBKP_DR34_D ((uint16_t)0xFFFF)çBKP_DR35_D ((uint16_t)0xFFFF)êBKP_DR36_D ((uint16_t)0xFFFF)íBKP_DR37_D ((uint16_t)0xFFFF)ðBKP_DR38_D ((uint16_t)0xFFFF)óBKP_DR39_D ((uint16_t)0xFFFF)öBKP_DR40_D ((uint16_t)0xFFFF)ùBKP_DR41_D ((uint16_t)0xFFFF)üBKP_DR42_D ((uint16_t)0xFFFF)ÿBKP_RTCCR_CAL ((uint16_t)0x007F) BKP_RTCCR_CCO ((uint16_t)0x0080) BKP_RTCCR_ASOE ((uint16_t)0x0100) BKP_RTCCR_ASOS ((uint16_t)0x0200) BKP_CR_TPE ((uint8_t)0x01) BKP_CR_TPAL ((uint8_t)0x02) BKP_CSR_CTE ((uint16_t)0x0001) BKP_CSR_CTI ((uint16_t)0x0002) BKP_CSR_TPIE ((uint16_t)0x0004) BKP_CSR_TEF ((uint16_t)0x0100) BKP_CSR_TIF ((uint16_t)0x0200) RCC_CR_HSION ((uint32_t)0x00000001) RCC_CR_HSIRDY ((uint32_t)0x00000002) RCC_CR_HSITRIM ((uint32_t)0x000000F8) RCC_CR_HSICAL ((uint32_t)0x0000FF00) RCC_CR_HSEON ((uint32_t)0x00010000) RCC_CR_HSERDY ((uint32_t)0x00020000) RCC_CR_HSEBYP ((uint32_t)0x00040000) RCC_CR_CSSON ((uint32_t)0x00080000) RCC_CR_PLLON ((uint32_t)0x01000000) RCC_CR_PLLRDY ((uint32_t)0x02000000)ª RCC_CFGR_SW ((uint32_t)0x00000003)« RCC_CFGR_SW_0 ((uint32_t)0x00000001)¬ RCC_CFGR_SW_1 ((uint32_t)0x00000002)® RCC_CFGR_SW_HSI ((uint32_t)0x00000000)¯ RCC_CFGR_SW_HSE ((uint32_t)0x00000001)° RCC_CFGR_SW_PLL ((uint32_t)0x00000002)³ RCC_CFGR_SWS ((uint32_t)0x0000000C)´ RCC_CFGR_SWS_0 ((uint32_t)0x00000004)µ RCC_CFGR_SWS_1 ((uint32_t)0x00000008)· RCC_CFGR_SWS_HSI ((uint32_t)0x00000000)¸ RCC_CFGR_SWS_HSE ((uint32_t)0x00000004)¹ RCC_CFGR_SWS_PLL ((uint32_t)0x00000008)¼ RCC_CFGR_HPRE ((uint32_t)0x000000F0)½ RCC_CFGR_HPRE_0 ((uint32_t)0x00000010)¾ RCC_CFGR_HPRE_1 ((uint32_t)0x00000020)¿ RCC_CFGR_HPRE_2 ((uint32_t)0x00000040)À RCC_CFGR_HPRE_3 ((uint32_t)0x00000080)Â RCC_CFGR_HPRE_DIV1 ((uint32_t)0x00000000)Ã RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080)Ä RCC_CFGR_HPRE_DIV4 ((uint32_t)0x00000090)Å RCC_CFGR_HPRE_DIV8 ((uint32_t)0x000000A0)Æ RCC_CFGR_HPRE_DIV16 ((uint32_t)0x000000B0)Ç RCC_CFGR_HPRE_DIV64 ((uint32_t)0x000000C0)È RCC_CFGR_HPRE_DIV128 ((uint32_t)0x000000D0)É RCC_CFGR_HPRE_DIV256 ((uint32_t)0x000000E0)Ê RCC_CFGR_HPRE_DIV512 ((uint32_t)0x000000F0)Í RCC_CFGR_PPRE1 ((uint32_t)0x00000700)Î RCC_CFGR_PPRE1_0 ((uint32_t)0x00000100)Ï RCC_CFGR_PPRE1_1 ((uint32_t)0x00000200)Ð RCC_CFGR_PPRE1_2 ((uint32_t)0x00000400)Ò RCC_CFGR_PPRE1_DIV1 ((uint32_t)0x00000000)Ó RCC_CFGR_PPRE1_DIV2 ((uint32_t)0x00000400)Ô RCC_CFGR_PPRE1_DIV4 ((uint32_t)0x00000500)Õ RCC_CFGR_PPRE1_DIV8 ((uint32_t)0x00000600)Ö RCC_CFGR_PPRE1_DIV16 ((uint32_t)0x00000700)Ù RCC_CFGR_PPRE2 ((uint32_t)0x00003800)Ú RCC_CFGR_PPRE2_0 ((uint32_t)0x00000800)Û RCC_CFGR_PPRE2_1 ((uint32_t)0x00001000)Ü RCC_CFGR_PPRE2_2 ((uint32_t)0x00002000)Þ RCC_CFGR_PPRE2_DIV1 ((uint32_t)0x00000000)ß RCC_CFGR_PPRE2_DIV2 ((uint32_t)0x00002000)à RCC_CFGR_PPRE2_DIV4 ((uint32_t)0x00002800)á RCC_CFGR_PPRE2_DIV8 ((uint32_t)0x00003000)â RCC_CFGR_PPRE2_DIV16 ((uint32_t)0x00003800)å RCC_CFGR_ADCPRE ((uint32_t)0x0000C000)æ RCC_CFGR_ADCPRE_0 ((uint32_t)0x00004000)ç RCC_CFGR_ADCPRE_1 ((uint32_t)0x00008000)é RCC_CFGR_ADCPRE_DIV2 ((uint32_t)0x00000000)ê RCC_CFGR_ADCPRE_DIV4 ((uint32_t)0x00004000)ë RCC_CFGR_ADCPRE_DIV6 ((uint32_t)0x00008000)ì RCC_CFGR_ADCPRE_DIV8 ((uint32_t)0x0000C000)î RCC_CFGR_PLLSRC ((uint32_t)0x00010000)ð RCC_CFGR_PLLXTPRE ((uint32_t)0x00020000)ó RCC_CFGR_PLLMULL ((uint32_t)0x003C0000)ô RCC_CFGR_PLLMULL_0 ((uint32_t)0x00040000)õ RCC_CFGR_PLLMULL_1 ((uint32_t)0x00080000)ö RCC_CFGR_PLLMULL_2 ((uint32_t)0x00100000)÷ RCC_CFGR_PLLMULL_3 ((uint32_t)0x00200000)½RCC_CFGR_PLLSRC_HSI_Div2 ((uint32_t)0x00000000)¾RCC_CFGR_PLLSRC_HSE ((uint32_t)0x00010000)ÀRCC_CFGR_PLLXTPRE_HSE ((uint32_t)0x00000000)ÁRCC_CFGR_PLLXTPRE_HSE_Div2 ((uint32_t)0x00020000)ÃRCC_CFGR_PLLMULL2 ((uint32_t)0x00000000)ÄRCC_CFGR_PLLMULL3 ((uint32_t)0x00040000)ÅRCC_CFGR_PLLMULL4 ((uint32_t)0x00080000)ÆRCC_CFGR_PLLMULL5 ((uint32_t)0x000C0000)ÇRCC_CFGR_PLLMULL6 ((uint32_t)0x00100000)ÈRCC_CFGR_PLLMULL7 ((uint32_t)0x00140000)ÉRCC_CFGR_PLLMULL8 ((uint32_t)0x00180000)ÊRCC_CFGR_PLLMULL9 ((uint32_t)0x001C0000)ËRCC_CFGR_PLLMULL10 ((uint32_t)0x00200000)ÌRCC_CFGR_PLLMULL11 ((uint32_t)0x00240000)ÍRCC_CFGR_PLLMULL12 ((uint32_t)0x00280000)ÎRCC_CFGR_PLLMULL13 ((uint32_t)0x002C0000)ÏRCC_CFGR_PLLMULL14 ((uint32_t)0x00300000)ÐRCC_CFGR_PLLMULL15 ((uint32_t)0x00340000)ÑRCC_CFGR_PLLMULL16 ((uint32_t)0x00380000)ÒRCC_CFGR_USBPRE ((uint32_t)0x00400000)ÕRCC_CFGR_MCO ((uint32_t)0x07000000)ÖRCC_CFGR_MCO_0 ((uint32_t)0x01000000)×RCC_CFGR_MCO_1 ((uint32_t)0x02000000)ØRCC_CFGR_MCO_2 ((uint32_t)0x04000000)ÚRCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000)ÛRCC_CFGR_MCO_SYSCLK ((uint32_t)0x04000000)ÜRCC_CFGR_MCO_HSI ((uint32_t)0x05000000)ÝRCC_CFGR_MCO_HSE ((uint32_t)0x06000000)ÞRCC_CFGR_MCO_PLL ((uint32_t)0x07000000)âRCC_CIR_LSIRDYF ((uint32_t)0x00000001)ãRCC_CIR_LSERDYF ((uint32_t)0x00000002)äRCC_CIR_HSIRDYF ((uint32_t)0x00000004)åRCC_CIR_HSERDYF ((uint32_t)0x00000008)æRCC_CIR_PLLRDYF ((uint32_t)0x00000010)çRCC_CIR_CSSF ((uint32_t)0x00000080)èRCC_CIR_LSIRDYIE ((uint32_t)0x00000100)éRCC_CIR_LSERDYIE ((uint32_t)0x00000200)êRCC_CIR_HSIRDYIE ((uint32_t)0x00000400)ëRCC_CIR_HSERDYIE ((uint32_t)0x00000800)ìRCC_CIR_PLLRDYIE ((uint32_t)0x00001000)íRCC_CIR_LSIRDYC ((uint32_t)0x00010000)îRCC_CIR_LSERDYC ((uint32_t)0x00020000)ïRCC_CIR_HSIRDYC ((uint32_t)0x00040000)ðRCC_CIR_HSERDYC ((uint32_t)0x00080000)ñRCC_CIR_PLLRDYC ((uint32_t)0x00100000)òRCC_CIR_CSSC ((uint32_t)0x00800000)þRCC_APB2RSTR_AFIORST ((uint32_t)0x00000001)ÿRCC_APB2RSTR_IOPARST ((uint32_t)0x00000004)RCC_APB2RSTR_IOPBRST ((uint32_t)0x00000008)RCC_APB2RSTR_IOPCRST ((uint32_t)0x00000010)RCC_APB2RSTR_IOPDRST ((uint32_t)0x00000020)RCC_APB2RSTR_ADC1RST ((uint32_t)0x00000200)RCC_APB2RSTR_ADC2RST ((uint32_t)0x00000400)RCC_APB2RSTR_TIM1RST ((uint32_t)0x00000800)RCC_APB2RSTR_SPI1RST ((uint32_t)0x00001000)RCC_APB2RSTR_USART1RST ((uint32_t)0x00004000)RCC_APB2RSTR_IOPERST ((uint32_t)0x00000040)RCC_APB2RSTR_IOPFRST ((uint32_t)0x00000080)RCC_APB2RSTR_IOPGRST ((uint32_t)0x00000100)RCC_APB2RSTR_TIM8RST ((uint32_t)0x00002000)RCC_APB2RSTR_ADC3RST ((uint32_t)0x00008000)ªRCC_APB1RSTR_TIM2RST ((uint32_t)0x00000001)«RCC_APB1RSTR_TIM3RST ((uint32_t)0x00000002)¬RCC_APB1RSTR_WWDGRST ((uint32_t)0x00000800)RCC_APB1RSTR_USART2RST ((uint32_t)0x00020000)®RCC_APB1RSTR_I2C1RST ((uint32_t)0x00200000)±RCC_APB1RSTR_CAN1RST ((uint32_t)0x02000000)´RCC_APB1RSTR_BKPRST ((uint32_t)0x08000000)µRCC_APB1RSTR_PWRRST ((uint32_t)0x10000000)¸RCC_APB1RSTR_TIM4RST ((uint32_t)0x00000004)¹RCC_APB1RSTR_SPI2RST ((uint32_t)0x00004000)ºRCC_APB1RSTR_USART3RST ((uint32_t)0x00040000)»RCC_APB1RSTR_I2C2RST ((uint32_t)0x00400000)¿RCC_APB1RSTR_USBRST ((uint32_t)0x00800000)ÃRCC_APB1RSTR_TIM5RST ((uint32_t)0x00000008)ÄRCC_APB1RSTR_TIM6RST ((uint32_t)0x00000010)ÅRCC_APB1RSTR_TIM7RST ((uint32_t)0x00000020)ÆRCC_APB1RSTR_SPI3RST ((uint32_t)0x00008000)ÇRCC_APB1RSTR_UART4RST ((uint32_t)0x00080000)ÈRCC_APB1RSTR_UART5RST ((uint32_t)0x00100000)ÉRCC_APB1RSTR_DACRST ((uint32_t)0x20000000)èRCC_AHBENR_DMA1EN ((uint16_t)0x0001)éRCC_AHBENR_SRAMEN ((uint16_t)0x0004)êRCC_AHBENR_FLITFEN ((uint16_t)0x0010)ëRCC_AHBENR_CRCEN ((uint16_t)0x0040)îRCC_AHBENR_DMA2EN ((uint16_t)0x0002)òRCC_AHBENR_FSMCEN ((uint16_t)0x0100)óRCC_AHBENR_SDIOEN ((uint16_t)0x0400)RCC_APB2ENR_AFIOEN ((uint32_t)0x00000001)RCC_APB2ENR_IOPAEN ((uint32_t)0x00000004)RCC_APB2ENR_IOPBEN ((uint32_t)0x00000008)RCC_APB2ENR_IOPCEN ((uint32_t)0x00000010)RCC_APB2ENR_IOPDEN ((uint32_t)0x00000020)RCC_APB2ENR_ADC1EN ((uint32_t)0x00000200)RCC_APB2ENR_ADC2EN ((uint32_t)0x00000400)RCC_APB2ENR_TIM1EN ((uint32_t)0x00000800)RCC_APB2ENR_SPI1EN ((uint32_t)0x00001000)RCC_APB2ENR_USART1EN ((uint32_t)0x00004000)RCC_APB2ENR_IOPEEN ((uint32_t)0x00000040)RCC_APB2ENR_IOPFEN ((uint32_t)0x00000080)RCC_APB2ENR_IOPGEN ((uint32_t)0x00000100)RCC_APB2ENR_TIM8EN ((uint32_t)0x00002000)RCC_APB2ENR_ADC3EN ((uint32_t)0x00008000)®RCC_APB1ENR_TIM2EN ((uint32_t)0x00000001)¯RCC_APB1ENR_TIM3EN ((uint32_t)0x00000002)°RCC_APB1ENR_WWDGEN ((uint32_t)0x00000800)±RCC_APB1ENR_USART2EN ((uint32_t)0x00020000)²RCC_APB1ENR_I2C1EN ((uint32_t)0x00200000)µRCC_APB1ENR_CAN1EN ((uint32_t)0x02000000)¸RCC_APB1ENR_BKPEN ((uint32_t)0x08000000)¹RCC_APB1ENR_PWREN ((uint32_t)0x10000000)¼RCC_APB1ENR_TIM4EN ((uint32_t)0x00000004)½RCC_APB1ENR_SPI2EN ((uint32_t)0x00004000)¾RCC_APB1ENR_USART3EN ((uint32_t)0x00040000)¿RCC_APB1ENR_I2C2EN ((uint32_t)0x00400000)ÃRCC_APB1ENR_USBEN ((uint32_t)0x00800000)ÇRCC_APB1ENR_TIM5EN ((uint32_t)0x00000008)ÈRCC_APB1ENR_TIM6EN ((uint32_t)0x00000010)ÉRCC_APB1ENR_TIM7EN ((uint32_t)0x00000020)ÊRCC_APB1ENR_SPI3EN ((uint32_t)0x00008000)ËRCC_APB1ENR_UART4EN ((uint32_t)0x00080000)ÌRCC_APB1ENR_UART5EN ((uint32_t)0x00100000)ÍRCC_APB1ENR_DACEN ((uint32_t)0x20000000)ìRCC_BDCR_LSEON ((uint32_t)0x00000001)íRCC_BDCR_LSERDY ((uint32_t)0x00000002)îRCC_BDCR_LSEBYP ((uint32_t)0x00000004)ðRCC_BDCR_RTCSEL ((uint32_t)0x00000300)ñRCC_BDCR_RTCSEL_0 ((uint32_t)0x00000100)òRCC_BDCR_RTCSEL_1 ((uint32_t)0x00000200)õRCC_BDCR_RTCSEL_NOCLOCK ((uint32_t)0x00000000)öRCC_BDCR_RTCSEL_LSE ((uint32_t)0x00000100)÷RCC_BDCR_RTCSEL_LSI ((uint32_t)0x00000200)øRCC_BDCR_RTCSEL_HSE ((uint32_t)0x00000300)úRCC_BDCR_RTCEN ((uint32_t)0x00008000)ûRCC_BDCR_BDRST ((uint32_t)0x00010000)þRCC_CSR_LSION ((uint32_t)0x00000001)ÿRCC_CSR_LSIRDY ((uint32_t)0x00000002)RCC_CSR_RMVF ((uint32_t)0x01000000)RCC_CSR_PINRSTF ((uint32_t)0x04000000)RCC_CSR_PORRSTF ((uint32_t)0x08000000)RCC_CSR_SFTRSTF ((uint32_t)0x10000000)RCC_CSR_IWDGRSTF ((uint32_t)0x20000000)RCC_CSR_WWDGRSTF ((uint32_t)0x40000000)RCC_CSR_LPWRRSTF ((uint32_t)0x80000000)GPIO_CRL_MODE ((uint32_t)0x33333333)GPIO_CRL_MODE0 ((uint32_t)0x00000003)GPIO_CRL_MODE0_0 ((uint32_t)0x00000001)GPIO_CRL_MODE0_1 ((uint32_t)0x00000002)GPIO_CRL_MODE1 ((uint32_t)0x00000030)GPIO_CRL_MODE1_0 ((uint32_t)0x00000010)GPIO_CRL_MODE1_1 ((uint32_t)0x00000020)GPIO_CRL_MODE2 ((uint32_t)0x00000300)GPIO_CRL_MODE2_0 ((uint32_t)0x00000100)GPIO_CRL_MODE2_1 ((uint32_t)0x00000200)GPIO_CRL_MODE3 ((uint32_t)0x00003000)GPIO_CRL_MODE3_0 ((uint32_t)0x00001000)GPIO_CRL_MODE3_1 ((uint32_t)0x00002000)GPIO_CRL_MODE4 ((uint32_t)0x00030000)GPIO_CRL_MODE4_0 ((uint32_t)0x00010000)GPIO_CRL_MODE4_1 ((uint32_t)0x00020000)GPIO_CRL_MODE5 ((uint32_t)0x00300000) GPIO_CRL_MODE5_0 ((uint32_t)0x00100000)¡GPIO_CRL_MODE5_1 ((uint32_t)0x00200000)£GPIO_CRL_MODE6 ((uint32_t)0x03000000)¤GPIO_CRL_MODE6_0 ((uint32_t)0x01000000)¥GPIO_CRL_MODE6_1 ((uint32_t)0x02000000)§GPIO_CRL_MODE7 ((uint32_t)0x30000000)¨GPIO_CRL_MODE7_0 ((uint32_t)0x10000000)©GPIO_CRL_MODE7_1 ((uint32_t)0x20000000)«GPIO_CRL_CNF ((uint32_t)0xCCCCCCCC)GPIO_CRL_CNF0 ((uint32_t)0x0000000C)®GPIO_CRL_CNF0_0 ((uint32_t)0x00000004)¯GPIO_CRL_CNF0_1 ((uint32_t)0x00000008)±GPIO_CRL_CNF1 ((uint32_t)0x000000C0)²GPIO_CRL_CNF1_0 ((uint32_t)0x00000040)³GPIO_CRL_CNF1_1 ((uint32_t)0x00000080)µGPIO_CRL_CNF2 ((uint32_t)0x00000C00)¶GPIO_CRL_CNF2_0 ((uint32_t)0x00000400)·GPIO_CRL_CNF2_1 ((uint32_t)0x00000800)¹GPIO_CRL_CNF3 ((uint32_t)0x0000C000)ºGPIO_CRL_CNF3_0 ((uint32_t)0x00004000)»GPIO_CRL_CNF3_1 ((uint32_t)0x00008000)½GPIO_CRL_CNF4 ((uint32_t)0x000C0000)¾GPIO_CRL_CNF4_0 ((uint32_t)0x00040000)¿GPIO_CRL_CNF4_1 ((uint32_t)0x00080000)ÁGPIO_CRL_CNF5 ((uint32_t)0x00C00000)ÂGPIO_CRL_CNF5_0 ((uint32_t)0x00400000)ÃGPIO_CRL_CNF5_1 ((uint32_t)0x00800000)ÅGPIO_CRL_CNF6 ((uint32_t)0x0C000000)ÆGPIO_CRL_CNF6_0 ((uint32_t)0x04000000)ÇGPIO_CRL_CNF6_1 ((uint32_t)0x08000000)ÉGPIO_CRL_CNF7 ((uint32_t)0xC0000000)ÊGPIO_CRL_CNF7_0 ((uint32_t)0x40000000)ËGPIO_CRL_CNF7_1 ((uint32_t)0x80000000)ÎGPIO_CRH_MODE ((uint32_t)0x33333333)ÐGPIO_CRH_MODE8 ((uint32_t)0x00000003)ÑGPIO_CRH_MODE8_0 ((uint32_t)0x00000001)ÒGPIO_CRH_MODE8_1 ((uint32_t)0x00000002)ÔGPIO_CRH_MODE9 ((uint32_t)0x00000030)ÕGPIO_CRH_MODE9_0 ((uint32_t)0x00000010)ÖGPIO_CRH_MODE9_1 ((uint32_t)0x00000020)ØGPIO_CRH_MODE10 ((uint32_t)0x00000300)ÙGPIO_CRH_MODE10_0 ((uint32_t)0x00000100)ÚGPIO_CRH_MODE10_1 ((uint32_t)0x00000200)ÜGPIO_CRH_MODE11 ((uint32_t)0x00003000)ÝGPIO_CRH_MODE11_0 ((uint32_t)0x00001000)ÞGPIO_CRH_MODE11_1 ((uint32_t)0x00002000)àGPIO_CRH_MODE12 ((uint32_t)0x00030000)áGPIO_CRH_MODE12_0 ((uint32_t)0x00010000)âGPIO_CRH_MODE12_1 ((uint32_t)0x00020000)äGPIO_CRH_MODE13 ((uint32_t)0x00300000)åGPIO_CRH_MODE13_0 ((uint32_t)0x00100000)æGPIO_CRH_MODE13_1 ((uint32_t)0x00200000)èGPIO_CRH_MODE14 ((uint32_t)0x03000000)éGPIO_CRH_MODE14_0 ((uint32_t)0x01000000)êGPIO_CRH_MODE14_1 ((uint32_t)0x02000000)ìGPIO_CRH_MODE15 ((uint32_t)0x30000000)íGPIO_CRH_MODE15_0 ((uint32_t)0x10000000)îGPIO_CRH_MODE15_1 ((uint32_t)0x20000000)ðGPIO_CRH_CNF ((uint32_t)0xCCCCCCCC)òGPIO_CRH_CNF8 ((uint32_t)0x0000000C)óGPIO_CRH_CNF8_0 ((uint32_t)0x00000004)ôGPIO_CRH_CNF8_1 ((uint32_t)0x00000008)öGPIO_CRH_CNF9 ((uint32_t)0x000000C0)÷GPIO_CRH_CNF9_0 ((uint32_t)0x00000040)øGPIO_CRH_CNF9_1 ((uint32_t)0x00000080)úGPIO_CRH_CNF10 ((uint32_t)0x00000C00)ûGPIO_CRH_CNF10_0 ((uint32_t)0x00000400)üGPIO_CRH_CNF10_1 ((uint32_t)0x00000800)þGPIO_CRH_CNF11 ((uint32_t)0x0000C000)ÿGPIO_CRH_CNF11_0 ((uint32_t)0x00004000)GPIO_CRH_CNF11_1 ((uint32_t)0x00008000)GPIO_CRH_CNF12 ((uint32_t)0x000C0000)GPIO_CRH_CNF12_0 ((uint32_t)0x00040000)GPIO_CRH_CNF12_1 ((uint32_t)0x00080000)GPIO_CRH_CNF13 ((uint32_t)0x00C00000)GPIO_CRH_CNF13_0 ((uint32_t)0x00400000)GPIO_CRH_CNF13_1 ((uint32_t)0x00800000)GPIO_CRH_CNF14 ((uint32_t)0x0C000000)GPIO_CRH_CNF14_0 ((uint32_t)0x04000000)GPIO_CRH_CNF14_1 ((uint32_t)0x08000000)GPIO_CRH_CNF15 ((uint32_t)0xC0000000)GPIO_CRH_CNF15_0 ((uint32_t)0x40000000)GPIO_CRH_CNF15_1 ((uint32_t)0x80000000)GPIO_IDR_IDR0 ((uint16_t)0x0001)GPIO_IDR_IDR1 ((uint16_t)0x0002)GPIO_IDR_IDR2 ((uint16_t)0x0004)GPIO_IDR_IDR3 ((uint16_t)0x0008)GPIO_IDR_IDR4 ((uint16_t)0x0010)GPIO_IDR_IDR5 ((uint16_t)0x0020)GPIO_IDR_IDR6 ((uint16_t)0x0040)GPIO_IDR_IDR7 ((uint16_t)0x0080)GPIO_IDR_IDR8 ((uint16_t)0x0100)GPIO_IDR_IDR9 ((uint16_t)0x0200)GPIO_IDR_IDR10 ((uint16_t)0x0400)GPIO_IDR_IDR11 ((uint16_t)0x0800)GPIO_IDR_IDR12 ((uint16_t)0x1000) GPIO_IDR_IDR13 ((uint16_t)0x2000)¡GPIO_IDR_IDR14 ((uint16_t)0x4000)¢GPIO_IDR_IDR15 ((uint16_t)0x8000)¥GPIO_ODR_ODR0 ((uint16_t)0x0001)¦GPIO_ODR_ODR1 ((uint16_t)0x0002)§GPIO_ODR_ODR2 ((uint16_t)0x0004)¨GPIO_ODR_ODR3 ((uint16_t)0x0008)©GPIO_ODR_ODR4 ((uint16_t)0x0010)ªGPIO_ODR_ODR5 ((uint16_t)0x0020)«GPIO_ODR_ODR6 ((uint16_t)0x0040)¬GPIO_ODR_ODR7 ((uint16_t)0x0080)GPIO_ODR_ODR8 ((uint16_t)0x0100)®GPIO_ODR_ODR9 ((uint16_t)0x0200)¯GPIO_ODR_ODR10 ((uint16_t)0x0400)°GPIO_ODR_ODR11 ((uint16_t)0x0800)±GPIO_ODR_ODR12 ((uint16_t)0x1000)²GPIO_ODR_ODR13 ((uint16_t)0x2000)³GPIO_ODR_ODR14 ((uint16_t)0x4000)´GPIO_ODR_ODR15 ((uint16_t)0x8000)·GPIO_BSRR_BS0 ((uint32_t)0x00000001)¸GPIO_BSRR_BS1 ((uint32_t)0x00000002)¹GPIO_BSRR_BS2 ((uint32_t)0x00000004)ºGPIO_BSRR_BS3 ((uint32_t)0x00000008)»GPIO_BSRR_BS4 ((uint32_t)0x00000010)¼GPIO_BSRR_BS5 ((uint32_t)0x00000020)½GPIO_BSRR_BS6 ((uint32_t)0x00000040)¾GPIO_BSRR_BS7 ((uint32_t)0x00000080)¿GPIO_BSRR_BS8 ((uint32_t)0x00000100)ÀGPIO_BSRR_BS9 ((uint32_t)0x00000200)ÁGPIO_BSRR_BS10 ((uint32_t)0x00000400)ÂGPIO_BSRR_BS11 ((uint32_t)0x00000800)ÃGPIO_BSRR_BS12 ((uint32_t)0x00001000)ÄGPIO_BSRR_BS13 ((uint32_t)0x00002000)ÅGPIO_BSRR_BS14 ((uint32_t)0x00004000)ÆGPIO_BSRR_BS15 ((uint32_t)0x00008000)ÈGPIO_BSRR_BR0 ((uint32_t)0x00010000)ÉGPIO_BSRR_BR1 ((uint32_t)0x00020000)ÊGPIO_BSRR_BR2 ((uint32_t)0x00040000)ËGPIO_BSRR_BR3 ((uint32_t)0x00080000)ÌGPIO_BSRR_BR4 ((uint32_t)0x00100000)ÍGPIO_BSRR_BR5 ((uint32_t)0x00200000)ÎGPIO_BSRR_BR6 ((uint32_t)0x00400000)ÏGPIO_BSRR_BR7 ((uint32_t)0x00800000)ÐGPIO_BSRR_BR8 ((uint32_t)0x01000000)ÑGPIO_BSRR_BR9 ((uint32_t)0x02000000)ÒGPIO_BSRR_BR10 ((uint32_t)0x04000000)ÓGPIO_BSRR_BR11 ((uint32_t)0x08000000)ÔGPIO_BSRR_BR12 ((uint32_t)0x10000000)ÕGPIO_BSRR_BR13 ((uint32_t)0x20000000)ÖGPIO_BSRR_BR14 ((uint32_t)0x40000000)×GPIO_BSRR_BR15 ((uint32_t)0x80000000)ÚGPIO_BRR_BR0 ((uint16_t)0x0001)ÛGPIO_BRR_BR1 ((uint16_t)0x0002)ÜGPIO_BRR_BR2 ((uint16_t)0x0004)ÝGPIO_BRR_BR3 ((uint16_t)0x0008)ÞGPIO_BRR_BR4 ((uint16_t)0x0010)ßGPIO_BRR_BR5 ((uint16_t)0x0020)àGPIO_BRR_BR6 ((uint16_t)0x0040)áGPIO_BRR_BR7 ((uint16_t)0x0080)âGPIO_BRR_BR8 ((uint16_t)0x0100)ãGPIO_BRR_BR9 ((uint16_t)0x0200)äGPIO_BRR_BR10 ((uint16_t)0x0400)åGPIO_BRR_BR11 ((uint16_t)0x0800)æGPIO_BRR_BR12 ((uint16_t)0x1000)çGPIO_BRR_BR13 ((uint16_t)0x2000)èGPIO_BRR_BR14 ((uint16_t)0x4000)éGPIO_BRR_BR15 ((uint16_t)0x8000)ìGPIO_LCKR_LCK0 ((uint32_t)0x00000001)íGPIO_LCKR_LCK1 ((uint32_t)0x00000002)îGPIO_LCKR_LCK2 ((uint32_t)0x00000004)ïGPIO_LCKR_LCK3 ((uint32_t)0x00000008)ðGPIO_LCKR_LCK4 ((uint32_t)0x00000010)ñGPIO_LCKR_LCK5 ((uint32_t)0x00000020)òGPIO_LCKR_LCK6 ((uint32_t)0x00000040)óGPIO_LCKR_LCK7 ((uint32_t)0x00000080)ôGPIO_LCKR_LCK8 ((uint32_t)0x00000100)õGPIO_LCKR_LCK9 ((uint32_t)0x00000200)öGPIO_LCKR_LCK10 ((uint32_t)0x00000400)÷GPIO_LCKR_LCK11 ((uint32_t)0x00000800)øGPIO_LCKR_LCK12 ((uint32_t)0x00001000)ùGPIO_LCKR_LCK13 ((uint32_t)0x00002000)úGPIO_LCKR_LCK14 ((uint32_t)0x00004000)ûGPIO_LCKR_LCK15 ((uint32_t)0x00008000)üGPIO_LCKR_LCKK ((uint32_t)0x00010000)AFIO_EVCR_PIN ((uint8_t)0x0F)AFIO_EVCR_PIN_0 ((uint8_t)0x01)AFIO_EVCR_PIN_1 ((uint8_t)0x02)AFIO_EVCR_PIN_2 ((uint8_t)0x04)AFIO_EVCR_PIN_3 ((uint8_t)0x08)AFIO_EVCR_PIN_PX0 ((uint8_t)0x00)AFIO_EVCR_PIN_PX1 ((uint8_t)0x01)AFIO_EVCR_PIN_PX2 ((uint8_t)0x02)AFIO_EVCR_PIN_PX3 ((uint8_t)0x03)AFIO_EVCR_PIN_PX4 ((uint8_t)0x04)AFIO_EVCR_PIN_PX5 ((uint8_t)0x05)AFIO_EVCR_PIN_PX6 ((uint8_t)0x06)AFIO_EVCR_PIN_PX7 ((uint8_t)0x07)AFIO_EVCR_PIN_PX8 ((uint8_t)0x08)AFIO_EVCR_PIN_PX9 ((uint8_t)0x09)AFIO_EVCR_PIN_PX10 ((uint8_t)0x0A)AFIO_EVCR_PIN_PX11 ((uint8_t)0x0B)AFIO_EVCR_PIN_PX12 ((uint8_t)0x0C)AFIO_EVCR_PIN_PX13 ((uint8_t)0x0D)AFIO_EVCR_PIN_PX14 ((uint8_t)0x0E)AFIO_EVCR_PIN_PX15 ((uint8_t)0x0F)AFIO_EVCR_PORT ((uint8_t)0x70)AFIO_EVCR_PORT_0 ((uint8_t)0x10)AFIO_EVCR_PORT_1 ((uint8_t)0x20)AFIO_EVCR_PORT_2 ((uint8_t)0x40)AFIO_EVCR_PORT_PA ((uint8_t)0x00) AFIO_EVCR_PORT_PB ((uint8_t)0x10)¡AFIO_EVCR_PORT_PC ((uint8_t)0x20)¢AFIO_EVCR_PORT_PD ((uint8_t)0x30)£AFIO_EVCR_PORT_PE ((uint8_t)0x40)¥AFIO_EVCR_EVOE ((uint8_t)0x80)¨AFIO_MAPR_SPI1_REMAP ((uint32_t)0x00000001)©AFIO_MAPR_I2C1_REMAP ((uint32_t)0x00000002)ªAFIO_MAPR_USART1_REMAP ((uint32_t)0x00000004)«AFIO_MAPR_USART2_REMAP ((uint32_t)0x00000008)AFIO_MAPR_USART3_REMAP ((uint32_t)0x00000030)®AFIO_MAPR_USART3_REMAP_0 ((uint32_t)0x00000010)¯AFIO_MAPR_USART3_REMAP_1 ((uint32_t)0x00000020)²AFIO_MAPR_USART3_REMAP_NOREMAP ((uint32_t)0x00000000)³AFIO_MAPR_USART3_REMAP_PARTIALREMAP ((uint32_t)0x00000010)´AFIO_MAPR_USART3_REMAP_FULLREMAP ((uint32_t)0x00000030)¶AFIO_MAPR_TIM1_REMAP ((uint32_t)0x000000C0)·AFIO_MAPR_TIM1_REMAP_0 ((uint32_t)0x00000040)¸AFIO_MAPR_TIM1_REMAP_1 ((uint32_t)0x00000080)»AFIO_MAPR_TIM1_REMAP_NOREMAP ((uint32_t)0x00000000)¼AFIO_MAPR_TIM1_REMAP_PARTIALREMAP ((uint32_t)0x00000040)½AFIO_MAPR_TIM1_REMAP_FULLREMAP ((uint32_t)0x000000C0)¿AFIO_MAPR_TIM2_REMAP ((uint32_t)0x00000300)ÀAFIO_MAPR_TIM2_REMAP_0 ((uint32_t)0x00000100)ÁAFIO_MAPR_TIM2_REMAP_1 ((uint32_t)0x00000200)ÄAFIO_MAPR_TIM2_REMAP_NOREMAP ((uint32_t)0x00000000)ÅAFIO_MAPR_TIM2_REMAP_PARTIALREMAP1 ((uint32_t)0x00000100)ÆAFIO_MAPR_TIM2_REMAP_PARTIALREMAP2 ((uint32_t)0x00000200)ÇAFIO_MAPR_TIM2_REMAP_FULLREMAP ((uint32_t)0x00000300)ÉAFIO_MAPR_TIM3_REMAP ((uint32_t)0x00000C00)ÊAFIO_MAPR_TIM3_REMAP_0 ((uint32_t)0x00000400)ËAFIO_MAPR_TIM3_REMAP_1 ((uint32_t)0x00000800)ÎAFIO_MAPR_TIM3_REMAP_NOREMAP ((uint32_t)0x00000000)ÏAFIO_MAPR_TIM3_REMAP_PARTIALREMAP ((uint32_t)0x00000800)ÐAFIO_MAPR_TIM3_REMAP_FULLREMAP ((uint32_t)0x00000C00)ÒAFIO_MAPR_TIM4_REMAP ((uint32_t)0x00001000)ÔAFIO_MAPR_CAN_REMAP ((uint32_t)0x00006000)ÕAFIO_MAPR_CAN_REMAP_0 ((uint32_t)0x00002000)ÖAFIO_MAPR_CAN_REMAP_1 ((uint32_t)0x00004000)ÙAFIO_MAPR_CAN_REMAP_REMAP1 ((uint32_t)0x00000000)ÚAFIO_MAPR_CAN_REMAP_REMAP2 ((uint32_t)0x00004000)ÛAFIO_MAPR_CAN_REMAP_REMAP3 ((uint32_t)0x00006000)ÝAFIO_MAPR_PD01_REMAP ((uint32_t)0x00008000)ÞAFIO_MAPR_TIM5CH4_IREMAP ((uint32_t)0x00010000)ßAFIO_MAPR_ADC1_ETRGINJ_REMAP ((uint32_t)0x00020000)àAFIO_MAPR_ADC1_ETRGREG_REMAP ((uint32_t)0x00040000)áAFIO_MAPR_ADC2_ETRGINJ_REMAP ((uint32_t)0x00080000)âAFIO_MAPR_ADC2_ETRGREG_REMAP ((uint32_t)0x00100000)åAFIO_MAPR_SWJ_CFG ((uint32_t)0x07000000)æAFIO_MAPR_SWJ_CFG_0 ((uint32_t)0x01000000)çAFIO_MAPR_SWJ_CFG_1 ((uint32_t)0x02000000)èAFIO_MAPR_SWJ_CFG_2 ((uint32_t)0x04000000)êAFIO_MAPR_SWJ_CFG_RESET ((uint32_t)0x00000000)ëAFIO_MAPR_SWJ_CFG_NOJNTRST ((uint32_t)0x01000000)ìAFIO_MAPR_SWJ_CFG_JTAGDISABLE ((uint32_t)0x02000000)íAFIO_MAPR_SWJ_CFG_DISABLE ((uint32_t)0x04000000)AFIO_EXTICR1_EXTI0 ((uint16_t)0x000F)AFIO_EXTICR1_EXTI1 ((uint16_t)0x00F0)AFIO_EXTICR1_EXTI2 ((uint16_t)0x0F00)AFIO_EXTICR1_EXTI3 ((uint16_t)0xF000)AFIO_EXTICR1_EXTI0_PA ((uint16_t)0x0000)AFIO_EXTICR1_EXTI0_PB ((uint16_t)0x0001)AFIO_EXTICR1_EXTI0_PC ((uint16_t)0x0002)AFIO_EXTICR1_EXTI0_PD ((uint16_t)0x0003)AFIO_EXTICR1_EXTI0_PE ((uint16_t)0x0004)AFIO_EXTICR1_EXTI0_PF ((uint16_t)0x0005)AFIO_EXTICR1_EXTI0_PG ((uint16_t)0x0006)AFIO_EXTICR1_EXTI1_PA ((uint16_t)0x0000)AFIO_EXTICR1_EXTI1_PB ((uint16_t)0x0010)AFIO_EXTICR1_EXTI1_PC ((uint16_t)0x0020)AFIO_EXTICR1_EXTI1_PD ((uint16_t)0x0030)AFIO_EXTICR1_EXTI1_PE ((uint16_t)0x0040)AFIO_EXTICR1_EXTI1_PF ((uint16_t)0x0050)AFIO_EXTICR1_EXTI1_PG ((uint16_t)0x0060)AFIO_EXTICR1_EXTI2_PA ((uint16_t)0x0000)AFIO_EXTICR1_EXTI2_PB ((uint16_t)0x0100)AFIO_EXTICR1_EXTI2_PC ((uint16_t)0x0200)AFIO_EXTICR1_EXTI2_PD ((uint16_t)0x0300) AFIO_EXTICR1_EXTI2_PE ((uint16_t)0x0400)¡AFIO_EXTICR1_EXTI2_PF ((uint16_t)0x0500)¢AFIO_EXTICR1_EXTI2_PG ((uint16_t)0x0600)¥AFIO_EXTICR1_EXTI3_PA ((uint16_t)0x0000)¦AFIO_EXTICR1_EXTI3_PB ((uint16_t)0x1000)§AFIO_EXTICR1_EXTI3_PC ((uint16_t)0x2000)¨AFIO_EXTICR1_EXTI3_PD ((uint16_t)0x3000)©AFIO_EXTICR1_EXTI3_PE ((uint16_t)0x4000)ªAFIO_EXTICR1_EXTI3_PF ((uint16_t)0x5000)«AFIO_EXTICR1_EXTI3_PG ((uint16_t)0x6000)®AFIO_EXTICR2_EXTI4 ((uint16_t)0x000F)¯AFIO_EXTICR2_EXTI5 ((uint16_t)0x00F0)°AFIO_EXTICR2_EXTI6 ((uint16_t)0x0F00)±AFIO_EXTICR2_EXTI7 ((uint16_t)0xF000)´AFIO_EXTICR2_EXTI4_PA ((uint16_t)0x0000)µAFIO_EXTICR2_EXTI4_PB ((uint16_t)0x0001)¶AFIO_EXTICR2_EXTI4_PC ((uint16_t)0x0002)·AFIO_EXTICR2_EXTI4_PD ((uint16_t)0x0003)¸AFIO_EXTICR2_EXTI4_PE ((uint16_t)0x0004)¹AFIO_EXTICR2_EXTI4_PF ((uint16_t)0x0005)ºAFIO_EXTICR2_EXTI4_PG ((uint16_t)0x0006)½AFIO_EXTICR2_EXTI5_PA ((uint16_t)0x0000)¾AFIO_EXTICR2_EXTI5_PB ((uint16_t)0x0010)¿AFIO_EXTICR2_EXTI5_PC ((uint16_t)0x0020)ÀAFIO_EXTICR2_EXTI5_PD ((uint16_t)0x0030)ÁAFIO_EXTICR2_EXTI5_PE ((uint16_t)0x0040)ÂAFIO_EXTICR2_EXTI5_PF ((uint16_t)0x0050)ÃAFIO_EXTICR2_EXTI5_PG ((uint16_t)0x0060)ÆAFIO_EXTICR2_EXTI6_PA ((uint16_t)0x0000)ÇAFIO_EXTICR2_EXTI6_PB ((uint16_t)0x0100)ÈAFIO_EXTICR2_EXTI6_PC ((uint16_t)0x0200)ÉAFIO_EXTICR2_EXTI6_PD ((uint16_t)0x0300)ÊAFIO_EXTICR2_EXTI6_PE ((uint16_t)0x0400)ËAFIO_EXTICR2_EXTI6_PF ((uint16_t)0x0500)ÌAFIO_EXTICR2_EXTI6_PG ((uint16_t)0x0600)ÏAFIO_EXTICR2_EXTI7_PA ((uint16_t)0x0000)ÐAFIO_EXTICR2_EXTI7_PB ((uint16_t)0x1000)ÑAFIO_EXTICR2_EXTI7_PC ((uint16_t)0x2000)ÒAFIO_EXTICR2_EXTI7_PD ((uint16_t)0x3000)ÓAFIO_EXTICR2_EXTI7_PE ((uint16_t)0x4000)ÔAFIO_EXTICR2_EXTI7_PF ((uint16_t)0x5000)ÕAFIO_EXTICR2_EXTI7_PG ((uint16_t)0x6000)ØAFIO_EXTICR3_EXTI8 ((uint16_t)0x000F)ÙAFIO_EXTICR3_EXTI9 ((uint16_t)0x00F0)ÚAFIO_EXTICR3_EXTI10 ((uint16_t)0x0F00)ÛAFIO_EXTICR3_EXTI11 ((uint16_t)0xF000)ÞAFIO_EXTICR3_EXTI8_PA ((uint16_t)0x0000)ßAFIO_EXTICR3_EXTI8_PB ((uint16_t)0x0001)àAFIO_EXTICR3_EXTI8_PC ((uint16_t)0x0002)áAFIO_EXTICR3_EXTI8_PD ((uint16_t)0x0003)âAFIO_EXTICR3_EXTI8_PE ((uint16_t)0x0004)ãAFIO_EXTICR3_EXTI8_PF ((uint16_t)0x0005)äAFIO_EXTICR3_EXTI8_PG ((uint16_t)0x0006)çAFIO_EXTICR3_EXTI9_PA ((uint16_t)0x0000)èAFIO_EXTICR3_EXTI9_PB ((uint16_t)0x0010)éAFIO_EXTICR3_EXTI9_PC ((uint16_t)0x0020)êAFIO_EXTICR3_EXTI9_PD ((uint16_t)0x0030)ëAFIO_EXTICR3_EXTI9_PE ((uint16_t)0x0040)ìAFIO_EXTICR3_EXTI9_PF ((uint16_t)0x0050)íAFIO_EXTICR3_EXTI9_PG ((uint16_t)0x0060)ðAFIO_EXTICR3_EXTI10_PA ((uint16_t)0x0000)ñAFIO_EXTICR3_EXTI10_PB ((uint16_t)0x0100)òAFIO_EXTICR3_EXTI10_PC ((uint16_t)0x0200)óAFIO_EXTICR3_EXTI10_PD ((uint16_t)0x0300)ôAFIO_EXTICR3_EXTI10_PE ((uint16_t)0x0400)õAFIO_EXTICR3_EXTI10_PF ((uint16_t)0x0500)öAFIO_EXTICR3_EXTI10_PG ((uint16_t)0x0600)ùAFIO_EXTICR3_EXTI11_PA ((uint16_t)0x0000)úAFIO_EXTICR3_EXTI11_PB ((uint16_t)0x1000)ûAFIO_EXTICR3_EXTI11_PC ((uint16_t)0x2000)üAFIO_EXTICR3_EXTI11_PD ((uint16_t)0x3000)ýAFIO_EXTICR3_EXTI11_PE ((uint16_t)0x4000)þAFIO_EXTICR3_EXTI11_PF ((uint16_t)0x5000)ÿAFIO_EXTICR3_EXTI11_PG ((uint16_t)0x6000)AFIO_EXTICR4_EXTI12 ((uint16_t)0x000F)AFIO_EXTICR4_EXTI13 ((uint16_t)0x00F0)AFIO_EXTICR4_EXTI14 ((uint16_t)0x0F00)AFIO_EXTICR4_EXTI15 ((uint16_t)0xF000)AFIO_EXTICR4_EXTI12_PA ((uint16_t)0x0000)AFIO_EXTICR4_EXTI12_PB ((uint16_t)0x0001)AFIO_EXTICR4_EXTI12_PC ((uint16_t)0x0002)AFIO_EXTICR4_EXTI12_PD ((uint16_t)0x0003)AFIO_EXTICR4_EXTI12_PE ((uint16_t)0x0004)AFIO_EXTICR4_EXTI12_PF ((uint16_t)0x0005)AFIO_EXTICR4_EXTI12_PG ((uint16_t)0x0006)AFIO_EXTICR4_EXTI13_PA ((uint16_t)0x0000)AFIO_EXTICR4_EXTI13_PB ((uint16_t)0x0010)AFIO_EXTICR4_EXTI13_PC ((uint16_t)0x0020)AFIO_EXTICR4_EXTI13_PD ((uint16_t)0x0030)AFIO_EXTICR4_EXTI13_PE ((uint16_t)0x0040)AFIO_EXTICR4_EXTI13_PF ((uint16_t)0x0050)AFIO_EXTICR4_EXTI13_PG ((uint16_t)0x0060)AFIO_EXTICR4_EXTI14_PA ((uint16_t)0x0000)AFIO_EXTICR4_EXTI14_PB ((uint16_t)0x0100)AFIO_EXTICR4_EXTI14_PC ((uint16_t)0x0200)AFIO_EXTICR4_EXTI14_PD ((uint16_t)0x0300)AFIO_EXTICR4_EXTI14_PE ((uint16_t)0x0400)AFIO_EXTICR4_EXTI14_PF ((uint16_t)0x0500) AFIO_EXTICR4_EXTI14_PG ((uint16_t)0x0600)£AFIO_EXTICR4_EXTI15_PA ((uint16_t)0x0000)¤AFIO_EXTICR4_EXTI15_PB ((uint16_t)0x1000)¥AFIO_EXTICR4_EXTI15_PC ((uint16_t)0x2000)¦AFIO_EXTICR4_EXTI15_PD ((uint16_t)0x3000)§AFIO_EXTICR4_EXTI15_PE ((uint16_t)0x4000)¨AFIO_EXTICR4_EXTI15_PF ((uint16_t)0x5000)©AFIO_EXTICR4_EXTI15_PG ((uint16_t)0x6000)ÎSysTick_CTRL_ENABLE ((uint32_t)0x00000001)ÏSysTick_CTRL_TICKINT ((uint32_t)0x00000002)ÐSysTick_CTRL_CLKSOURCE ((uint32_t)0x00000004)ÑSysTick_CTRL_COUNTFLAG ((uint32_t)0x00010000)ÔSysTick_LOAD_RELOAD ((uint32_t)0x00FFFFFF)×SysTick_VAL_CURRENT ((uint32_t)0x00FFFFFF)ÚSysTick_CALIB_TENMS ((uint32_t)0x00FFFFFF)ÛSysTick_CALIB_SKEW ((uint32_t)0x40000000)ÜSysTick_CALIB_NOREF ((uint32_t)0x80000000)åNVIC_ISER_SETENA ((uint32_t)0xFFFFFFFF)æNVIC_ISER_SETENA_0 ((uint32_t)0x00000001)çNVIC_ISER_SETENA_1 ((uint32_t)0x00000002)èNVIC_ISER_SETENA_2 ((uint32_t)0x00000004)éNVIC_ISER_SETENA_3 ((uint32_t)0x00000008)êNVIC_ISER_SETENA_4 ((uint32_t)0x00000010)ëNVIC_ISER_SETENA_5 ((uint32_t)0x00000020)ìNVIC_ISER_SETENA_6 ((uint32_t)0x00000040)íNVIC_ISER_SETENA_7 ((uint32_t)0x00000080)îNVIC_ISER_SETENA_8 ((uint32_t)0x00000100)ïNVIC_ISER_SETENA_9 ((uint32_t)0x00000200)ðNVIC_ISER_SETENA_10 ((uint32_t)0x00000400)ñNVIC_ISER_SETENA_11 ((uint32_t)0x00000800)òNVIC_ISER_SETENA_12 ((uint32_t)0x00001000)óNVIC_ISER_SETENA_13 ((uint32_t)0x00002000)ôNVIC_ISER_SETENA_14 ((uint32_t)0x00004000)õNVIC_ISER_SETENA_15 ((uint32_t)0x00008000)öNVIC_ISER_SETENA_16 ((uint32_t)0x00010000)÷NVIC_ISER_SETENA_17 ((uint32_t)0x00020000)øNVIC_ISER_SETENA_18 ((uint32_t)0x00040000)ùNVIC_ISER_SETENA_19 ((uint32_t)0x00080000)úNVIC_ISER_SETENA_20 ((uint32_t)0x00100000)ûNVIC_ISER_SETENA_21 ((uint32_t)0x00200000)üNVIC_ISER_SETENA_22 ((uint32_t)0x00400000)ýNVIC_ISER_SETENA_23 ((uint32_t)0x00800000)þNVIC_ISER_SETENA_24 ((uint32_t)0x01000000)ÿNVIC_ISER_SETENA_25 ((uint32_t)0x02000000)NVIC_ISER_SETENA_26 ((uint32_t)0x04000000)NVIC_ISER_SETENA_27 ((uint32_t)0x08000000)NVIC_ISER_SETENA_28 ((uint32_t)0x10000000)NVIC_ISER_SETENA_29 ((uint32_t)0x20000000)NVIC_ISER_SETENA_30 ((uint32_t)0x40000000)NVIC_ISER_SETENA_31 ((uint32_t)0x80000000)NVIC_ICER_CLRENA ((uint32_t)0xFFFFFFFF)NVIC_ICER_CLRENA_0 ((uint32_t)0x00000001)NVIC_ICER_CLRENA_1 ((uint32_t)0x00000002)NVIC_ICER_CLRENA_2 ((uint32_t)0x00000004)NVIC_ICER_CLRENA_3 ((uint32_t)0x00000008)NVIC_ICER_CLRENA_4 ((uint32_t)0x00000010)NVIC_ICER_CLRENA_5 ((uint32_t)0x00000020)NVIC_ICER_CLRENA_6 ((uint32_t)0x00000040)NVIC_ICER_CLRENA_7 ((uint32_t)0x00000080)NVIC_ICER_CLRENA_8 ((uint32_t)0x00000100)NVIC_ICER_CLRENA_9 ((uint32_t)0x00000200)NVIC_ICER_CLRENA_10 ((uint32_t)0x00000400)NVIC_ICER_CLRENA_11 ((uint32_t)0x00000800)NVIC_ICER_CLRENA_12 ((uint32_t)0x00001000)NVIC_ICER_CLRENA_13 ((uint32_t)0x00002000)NVIC_ICER_CLRENA_14 ((uint32_t)0x00004000)NVIC_ICER_CLRENA_15 ((uint32_t)0x00008000)NVIC_ICER_CLRENA_16 ((uint32_t)0x00010000)NVIC_ICER_CLRENA_17 ((uint32_t)0x00020000)NVIC_ICER_CLRENA_18 ((uint32_t)0x00040000)NVIC_ICER_CLRENA_19 ((uint32_t)0x00080000)NVIC_ICER_CLRENA_20 ((uint32_t)0x00100000)NVIC_ICER_CLRENA_21 ((uint32_t)0x00200000)NVIC_ICER_CLRENA_22 ((uint32_t)0x00400000) NVIC_ICER_CLRENA_23 ((uint32_t)0x00800000)¡NVIC_ICER_CLRENA_24 ((uint32_t)0x01000000)¢NVIC_ICER_CLRENA_25 ((uint32_t)0x02000000)£NVIC_ICER_CLRENA_26 ((uint32_t)0x04000000)¤NVIC_ICER_CLRENA_27 ((uint32_t)0x08000000)¥NVIC_ICER_CLRENA_28 ((uint32_t)0x10000000)¦NVIC_ICER_CLRENA_29 ((uint32_t)0x20000000)§NVIC_ICER_CLRENA_30 ((uint32_t)0x40000000)¨NVIC_ICER_CLRENA_31 ((uint32_t)0x80000000)«NVIC_ISPR_SETPEND ((uint32_t)0xFFFFFFFF)¬NVIC_ISPR_SETPEND_0 ((uint32_t)0x00000001)NVIC_ISPR_SETPEND_1 ((uint32_t)0x00000002)®NVIC_ISPR_SETPEND_2 ((uint32_t)0x00000004)¯NVIC_ISPR_SETPEND_3 ((uint32_t)0x00000008)°NVIC_ISPR_SETPEND_4 ((uint32_t)0x00000010)±NVIC_ISPR_SETPEND_5 ((uint32_t)0x00000020)²NVIC_ISPR_SETPEND_6 ((uint32_t)0x00000040)³NVIC_ISPR_SETPEND_7 ((uint32_t)0x00000080)´NVIC_ISPR_SETPEND_8 ((uint32_t)0x00000100)µNVIC_ISPR_SETPEND_9 ((uint32_t)0x00000200)¶NVIC_ISPR_SETPEND_10 ((uint32_t)0x00000400)·NVIC_ISPR_SETPEND_11 ((uint32_t)0x00000800)¸NVIC_ISPR_SETPEND_12 ((uint32_t)0x00001000)¹NVIC_ISPR_SETPEND_13 ((uint32_t)0x00002000)ºNVIC_ISPR_SETPEND_14 ((uint32_t)0x00004000)»NVIC_ISPR_SETPEND_15 ((uint32_t)0x00008000)¼NVIC_ISPR_SETPEND_16 ((uint32_t)0x00010000)½NVIC_ISPR_SETPEND_17 ((uint32_t)0x00020000)¾NVIC_ISPR_SETPEND_18 ((uint32_t)0x00040000)¿NVIC_ISPR_SETPEND_19 ((uint32_t)0x00080000)ÀNVIC_ISPR_SETPEND_20 ((uint32_t)0x00100000)ÁNVIC_ISPR_SETPEND_21 ((uint32_t)0x00200000)ÂNVIC_ISPR_SETPEND_22 ((uint32_t)0x00400000)ÃNVIC_ISPR_SETPEND_23 ((uint32_t)0x00800000)ÄNVIC_ISPR_SETPEND_24 ((uint32_t)0x01000000)ÅNVIC_ISPR_SETPEND_25 ((uint32_t)0x02000000)ÆNVIC_ISPR_SETPEND_26 ((uint32_t)0x04000000)ÇNVIC_ISPR_SETPEND_27 ((uint32_t)0x08000000)ÈNVIC_ISPR_SETPEND_28 ((uint32_t)0x10000000)ÉNVIC_ISPR_SETPEND_29 ((uint32_t)0x20000000)ÊNVIC_ISPR_SETPEND_30 ((uint32_t)0x40000000)ËNVIC_ISPR_SETPEND_31 ((uint32_t)0x80000000)ÎNVIC_ICPR_CLRPEND ((uint32_t)0xFFFFFFFF)ÏNVIC_ICPR_CLRPEND_0 ((uint32_t)0x00000001)ÐNVIC_ICPR_CLRPEND_1 ((uint32_t)0x00000002)ÑNVIC_ICPR_CLRPEND_2 ((uint32_t)0x00000004)ÒNVIC_ICPR_CLRPEND_3 ((uint32_t)0x00000008)ÓNVIC_ICPR_CLRPEND_4 ((uint32_t)0x00000010)ÔNVIC_ICPR_CLRPEND_5 ((uint32_t)0x00000020)ÕNVIC_ICPR_CLRPEND_6 ((uint32_t)0x00000040)ÖNVIC_ICPR_CLRPEND_7 ((uint32_t)0x00000080)×NVIC_ICPR_CLRPEND_8 ((uint32_t)0x00000100)ØNVIC_ICPR_CLRPEND_9 ((uint32_t)0x00000200)ÙNVIC_ICPR_CLRPEND_10 ((uint32_t)0x00000400)ÚNVIC_ICPR_CLRPEND_11 ((uint32_t)0x00000800)ÛNVIC_ICPR_CLRPEND_12 ((uint32_t)0x00001000)ÜNVIC_ICPR_CLRPEND_13 ((uint32_t)0x00002000)ÝNVIC_ICPR_CLRPEND_14 ((uint32_t)0x00004000)ÞNVIC_ICPR_CLRPEND_15 ((uint32_t)0x00008000)ßNVIC_ICPR_CLRPEND_16 ((uint32_t)0x00010000)àNVIC_ICPR_CLRPEND_17 ((uint32_t)0x00020000)áNVIC_ICPR_CLRPEND_18 ((uint32_t)0x00040000)âNVIC_ICPR_CLRPEND_19 ((uint32_t)0x00080000)ãNVIC_ICPR_CLRPEND_20 ((uint32_t)0x00100000)äNVIC_ICPR_CLRPEND_21 ((uint32_t)0x00200000)åNVIC_ICPR_CLRPEND_22 ((uint32_t)0x00400000)æNVIC_ICPR_CLRPEND_23 ((uint32_t)0x00800000)çNVIC_ICPR_CLRPEND_24 ((uint32_t)0x01000000)èNVIC_ICPR_CLRPEND_25 ((uint32_t)0x02000000)éNVIC_ICPR_CLRPEND_26 ((uint32_t)0x04000000)êNVIC_ICPR_CLRPEND_27 ((uint32_t)0x08000000)ëNVIC_ICPR_CLRPEND_28 ((uint32_t)0x10000000)ìNVIC_ICPR_CLRPEND_29 ((uint32_t)0x20000000)íNVIC_ICPR_CLRPEND_30 ((uint32_t)0x40000000)îNVIC_ICPR_CLRPEND_31 ((uint32_t)0x80000000)ñNVIC_IABR_ACTIVE ((uint32_t)0xFFFFFFFF)òNVIC_IABR_ACTIVE_0 ((uint32_t)0x00000001)óNVIC_IABR_ACTIVE_1 ((uint32_t)0x00000002)ôNVIC_IABR_ACTIVE_2 ((uint32_t)0x00000004)õNVIC_IABR_ACTIVE_3 ((uint32_t)0x00000008)öNVIC_IABR_ACTIVE_4 ((uint32_t)0x00000010)÷NVIC_IABR_ACTIVE_5 ((uint32_t)0x00000020)øNVIC_IABR_ACTIVE_6 ((uint32_t)0x00000040)ùNVIC_IABR_ACTIVE_7 ((uint32_t)0x00000080)úNVIC_IABR_ACTIVE_8 ((uint32_t)0x00000100)ûNVIC_IABR_ACTIVE_9 ((uint32_t)0x00000200)üNVIC_IABR_ACTIVE_10 ((uint32_t)0x00000400)ýNVIC_IABR_ACTIVE_11 ((uint32_t)0x00000800)þNVIC_IABR_ACTIVE_12 ((uint32_t)0x00001000)ÿNVIC_IABR_ACTIVE_13 ((uint32_t)0x00002000)NVIC_IABR_ACTIVE_14 ((uint32_t)0x00004000)NVIC_IABR_ACTIVE_15 ((uint32_t)0x00008000)NVIC_IABR_ACTIVE_16 ((uint32_t)0x00010000)NVIC_IABR_ACTIVE_17 ((uint32_t)0x00020000)NVIC_IABR_ACTIVE_18 ((uint32_t)0x00040000)NVIC_IABR_ACTIVE_19 ((uint32_t)0x00080000)NVIC_IABR_ACTIVE_20 ((uint32_t)0x00100000)NVIC_IABR_ACTIVE_21 ((uint32_t)0x00200000)NVIC_IABR_ACTIVE_22 ((uint32_t)0x00400000)NVIC_IABR_ACTIVE_23 ((uint32_t)0x00800000)NVIC_IABR_ACTIVE_24 ((uint32_t)0x01000000)NVIC_IABR_ACTIVE_25 ((uint32_t)0x02000000)NVIC_IABR_ACTIVE_26 ((uint32_t)0x04000000)NVIC_IABR_ACTIVE_27 ((uint32_t)0x08000000)NVIC_IABR_ACTIVE_28 ((uint32_t)0x10000000)NVIC_IABR_ACTIVE_29 ((uint32_t)0x20000000)NVIC_IABR_ACTIVE_30 ((uint32_t)0x40000000)NVIC_IABR_ACTIVE_31 ((uint32_t)0x80000000)NVIC_IPR0_PRI_0 ((uint32_t)0x000000FF)NVIC_IPR0_PRI_1 ((uint32_t)0x0000FF00)NVIC_IPR0_PRI_2 ((uint32_t)0x00FF0000)NVIC_IPR0_PRI_3 ((uint32_t)0xFF000000)NVIC_IPR1_PRI_4 ((uint32_t)0x000000FF)NVIC_IPR1_PRI_5 ((uint32_t)0x0000FF00)NVIC_IPR1_PRI_6 ((uint32_t)0x00FF0000)NVIC_IPR1_PRI_7 ((uint32_t)0xFF000000) NVIC_IPR2_PRI_8 ((uint32_t)0x000000FF)¡NVIC_IPR2_PRI_9 ((uint32_t)0x0000FF00)¢NVIC_IPR2_PRI_10 ((uint32_t)0x00FF0000)£NVIC_IPR2_PRI_11 ((uint32_t)0xFF000000)¦NVIC_IPR3_PRI_12 ((uint32_t)0x000000FF)§NVIC_IPR3_PRI_13 ((uint32_t)0x0000FF00)¨NVIC_IPR3_PRI_14 ((uint32_t)0x00FF0000)©NVIC_IPR3_PRI_15 ((uint32_t)0xFF000000)¬NVIC_IPR4_PRI_16 ((uint32_t)0x000000FF)NVIC_IPR4_PRI_17 ((uint32_t)0x0000FF00)®NVIC_IPR4_PRI_18 ((uint32_t)0x00FF0000)¯NVIC_IPR4_PRI_19 ((uint32_t)0xFF000000)²NVIC_IPR5_PRI_20 ((uint32_t)0x000000FF)³NVIC_IPR5_PRI_21 ((uint32_t)0x0000FF00)´NVIC_IPR5_PRI_22 ((uint32_t)0x00FF0000)µNVIC_IPR5_PRI_23 ((uint32_t)0xFF000000)¸NVIC_IPR6_PRI_24 ((uint32_t)0x000000FF)¹NVIC_IPR6_PRI_25 ((uint32_t)0x0000FF00)ºNVIC_IPR6_PRI_26 ((uint32_t)0x00FF0000)»NVIC_IPR6_PRI_27 ((uint32_t)0xFF000000)¾NVIC_IPR7_PRI_28 ((uint32_t)0x000000FF)¿NVIC_IPR7_PRI_29 ((uint32_t)0x0000FF00)ÀNVIC_IPR7_PRI_30 ((uint32_t)0x00FF0000)ÁNVIC_IPR7_PRI_31 ((uint32_t)0xFF000000)ÄSCB_CPUID_REVISION ((uint32_t)0x0000000F)ÅSCB_CPUID_PARTNO ((uint32_t)0x0000FFF0)ÆSCB_CPUID_Constant ((uint32_t)0x000F0000)ÇSCB_CPUID_VARIANT ((uint32_t)0x00F00000)ÈSCB_CPUID_IMPLEMENTER ((uint32_t)0xFF000000)ËSCB_ICSR_VECTACTIVE ((uint32_t)0x000001FF)ÌSCB_ICSR_RETTOBASE ((uint32_t)0x00000800)ÍSCB_ICSR_VECTPENDING ((uint32_t)0x003FF000)ÎSCB_ICSR_ISRPENDING ((uint32_t)0x00400000)ÏSCB_ICSR_ISRPREEMPT ((uint32_t)0x00800000)ÐSCB_ICSR_PENDSTCLR ((uint32_t)0x02000000)ÑSCB_ICSR_PENDSTSET ((uint32_t)0x04000000)ÒSCB_ICSR_PENDSVCLR ((uint32_t)0x08000000)ÓSCB_ICSR_PENDSVSET ((uint32_t)0x10000000)ÔSCB_ICSR_NMIPENDSET ((uint32_t)0x80000000)×SCB_VTOR_TBLOFF ((uint32_t)0x1FFFFF80)ØSCB_VTOR_TBLBASE ((uint32_t)0x20000000)ÛSCB_AIRCR_VECTRESET ((uint32_t)0x00000001)ÜSCB_AIRCR_VECTCLRACTIVE ((uint32_t)0x00000002)ÝSCB_AIRCR_SYSRESETREQ ((uint32_t)0x00000004)ßSCB_AIRCR_PRIGROUP ((uint32_t)0x00000700)àSCB_AIRCR_PRIGROUP_0 ((uint32_t)0x00000100)áSCB_AIRCR_PRIGROUP_1 ((uint32_t)0x00000200)âSCB_AIRCR_PRIGROUP_2 ((uint32_t)0x00000400)åSCB_AIRCR_PRIGROUP0 ((uint32_t)0x00000000)æSCB_AIRCR_PRIGROUP1 ((uint32_t)0x00000100)çSCB_AIRCR_PRIGROUP2 ((uint32_t)0x00000200)èSCB_AIRCR_PRIGROUP3 ((uint32_t)0x00000300)éSCB_AIRCR_PRIGROUP4 ((uint32_t)0x00000400)êSCB_AIRCR_PRIGROUP5 ((uint32_t)0x00000500)ëSCB_AIRCR_PRIGROUP6 ((uint32_t)0x00000600)ìSCB_AIRCR_PRIGROUP7 ((uint32_t)0x00000700)îSCB_AIRCR_ENDIANESS ((uint32_t)0x00008000)ïSCB_AIRCR_VECTKEY ((uint32_t)0xFFFF0000)òSCB_SCR_SLEEPONEXIT ((uint8_t)0x02)óSCB_SCR_SLEEPDEEP ((uint8_t)0x04)ôSCB_SCR_SEVONPEND ((uint8_t)0x10)÷SCB_CCR_NONBASETHRDENA ((uint16_t)0x0001)øSCB_CCR_USERSETMPEND ((uint16_t)0x0002)ùSCB_CCR_UNALIGN_TRP ((uint16_t)0x0008)úSCB_CCR_DIV_0_TRP ((uint16_t)0x0010)ûSCB_CCR_BFHFNMIGN ((uint16_t)0x0100)üSCB_CCR_STKALIGN ((uint16_t)0x0200)ÿSCB_SHPR_PRI_N ((uint32_t)0x000000FF)SCB_SHPR_PRI_N1 ((uint32_t)0x0000FF00)SCB_SHPR_PRI_N2 ((uint32_t)0x00FF0000)SCB_SHPR_PRI_N3 ((uint32_t)0xFF000000)SCB_SHCSR_MEMFAULTACT ((uint32_t)0x00000001)SCB_SHCSR_BUSFAULTACT ((uint32_t)0x00000002)SCB_SHCSR_USGFAULTACT ((uint32_t)0x00000008)SCB_SHCSR_SVCALLACT ((uint32_t)0x00000080)SCB_SHCSR_MONITORACT ((uint32_t)0x00000100)SCB_SHCSR_PENDSVACT ((uint32_t)0x00000400)SCB_SHCSR_SYSTICKACT ((uint32_t)0x00000800)SCB_SHCSR_USGFAULTPENDED ((uint32_t)0x00001000)SCB_SHCSR_MEMFAULTPENDED ((uint32_t)0x00002000)SCB_SHCSR_BUSFAULTPENDED ((uint32_t)0x00004000)SCB_SHCSR_SVCALLPENDED ((uint32_t)0x00008000)SCB_SHCSR_MEMFAULTENA ((uint32_t)0x00010000)SCB_SHCSR_BUSFAULTENA ((uint32_t)0x00020000)SCB_SHCSR_USGFAULTENA ((uint32_t)0x00040000)SCB_CFSR_IACCVIOL ((uint32_t)0x00000001)SCB_CFSR_DACCVIOL ((uint32_t)0x00000002)SCB_CFSR_MUNSTKERR ((uint32_t)0x00000008)SCB_CFSR_MSTKERR ((uint32_t)0x00000010)SCB_CFSR_MMARVALID ((uint32_t)0x00000080)SCB_CFSR_IBUSERR ((uint32_t)0x00000100)SCB_CFSR_PRECISERR ((uint32_t)0x00000200)SCB_CFSR_IMPRECISERR ((uint32_t)0x00000400)SCB_CFSR_UNSTKERR ((uint32_t)0x00000800) SCB_CFSR_STKERR ((uint32_t)0x00001000)¡SCB_CFSR_BFARVALID ((uint32_t)0x00008000)£SCB_CFSR_UNDEFINSTR ((uint32_t)0x00010000)¤SCB_CFSR_INVSTATE ((uint32_t)0x00020000)¥SCB_CFSR_INVPC ((uint32_t)0x00040000)¦SCB_CFSR_NOCP ((uint32_t)0x00080000)§SCB_CFSR_UNALIGNED ((uint32_t)0x01000000)¨SCB_CFSR_DIVBYZERO ((uint32_t)0x02000000)«SCB_HFSR_VECTTBL ((uint32_t)0x00000002)¬SCB_HFSR_FORCED ((uint32_t)0x40000000)SCB_HFSR_DEBUGEVT ((uint32_t)0x80000000)°SCB_DFSR_HALTED ((uint8_t)0x01)±SCB_DFSR_BKPT ((uint8_t)0x02)²SCB_DFSR_DWTTRAP ((uint8_t)0x04)³SCB_DFSR_VCATCH ((uint8_t)0x08)´SCB_DFSR_EXTERNAL ((uint8_t)0x10)·SCB_MMFAR_ADDRESS ((uint32_t)0xFFFFFFFF)ºSCB_BFAR_ADDRESS ((uint32_t)0xFFFFFFFF)½SCB_AFSR_IMPDEF ((uint32_t)0xFFFFFFFF)ÆEXTI_IMR_MR0 ((uint32_t)0x00000001)ÇEXTI_IMR_MR1 ((uint32_t)0x00000002)ÈEXTI_IMR_MR2 ((uint32_t)0x00000004)ÉEXTI_IMR_MR3 ((uint32_t)0x00000008)ÊEXTI_IMR_MR4 ((uint32_t)0x00000010)ËEXTI_IMR_MR5 ((uint32_t)0x00000020)ÌEXTI_IMR_MR6 ((uint32_t)0x00000040)ÍEXTI_IMR_MR7 ((uint32_t)0x00000080)ÎEXTI_IMR_MR8 ((uint32_t)0x00000100)ÏEXTI_IMR_MR9 ((uint32_t)0x00000200)ÐEXTI_IMR_MR10 ((uint32_t)0x00000400)ÑEXTI_IMR_MR11 ((uint32_t)0x00000800)ÒEXTI_IMR_MR12 ((uint32_t)0x00001000)ÓEXTI_IMR_MR13 ((uint32_t)0x00002000)ÔEXTI_IMR_MR14 ((uint32_t)0x00004000)ÕEXTI_IMR_MR15 ((uint32_t)0x00008000)ÖEXTI_IMR_MR16 ((uint32_t)0x00010000)×EXTI_IMR_MR17 ((uint32_t)0x00020000)ØEXTI_IMR_MR18 ((uint32_t)0x00040000)ÙEXTI_IMR_MR19 ((uint32_t)0x00080000)ÜEXTI_EMR_MR0 ((uint32_t)0x00000001)ÝEXTI_EMR_MR1 ((uint32_t)0x00000002)ÞEXTI_EMR_MR2 ((uint32_t)0x00000004)ßEXTI_EMR_MR3 ((uint32_t)0x00000008)àEXTI_EMR_MR4 ((uint32_t)0x00000010)áEXTI_EMR_MR5 ((uint32_t)0x00000020)âEXTI_EMR_MR6 ((uint32_t)0x00000040)ãEXTI_EMR_MR7 ((uint32_t)0x00000080)äEXTI_EMR_MR8 ((uint32_t)0x00000100)åEXTI_EMR_MR9 ((uint32_t)0x00000200)æEXTI_EMR_MR10 ((uint32_t)0x00000400)çEXTI_EMR_MR11 ((uint32_t)0x00000800)èEXTI_EMR_MR12 ((uint32_t)0x00001000)éEXTI_EMR_MR13 ((uint32_t)0x00002000)êEXTI_EMR_MR14 ((uint32_t)0x00004000)ëEXTI_EMR_MR15 ((uint32_t)0x00008000)ìEXTI_EMR_MR16 ((uint32_t)0x00010000)íEXTI_EMR_MR17 ((uint32_t)0x00020000)îEXTI_EMR_MR18 ((uint32_t)0x00040000)ïEXTI_EMR_MR19 ((uint32_t)0x00080000)òEXTI_RTSR_TR0 ((uint32_t)0x00000001)óEXTI_RTSR_TR1 ((uint32_t)0x00000002)ôEXTI_RTSR_TR2 ((uint32_t)0x00000004)õEXTI_RTSR_TR3 ((uint32_t)0x00000008)öEXTI_RTSR_TR4 ((uint32_t)0x00000010)÷EXTI_RTSR_TR5 ((uint32_t)0x00000020)øEXTI_RTSR_TR6 ((uint32_t)0x00000040)ùEXTI_RTSR_TR7 ((uint32_t)0x00000080)úEXTI_RTSR_TR8 ((uint32_t)0x00000100)ûEXTI_RTSR_TR9 ((uint32_t)0x00000200)üEXTI_RTSR_TR10 ((uint32_t)0x00000400)ýEXTI_RTSR_TR11 ((uint32_t)0x00000800)þEXTI_RTSR_TR12 ((uint32_t)0x00001000)ÿEXTI_RTSR_TR13 ((uint32_t)0x00002000)EXTI_RTSR_TR14 ((uint32_t)0x00004000)EXTI_RTSR_TR15 ((uint32_t)0x00008000)EXTI_RTSR_TR16 ((uint32_t)0x00010000)EXTI_RTSR_TR17 ((uint32_t)0x00020000)EXTI_RTSR_TR18 ((uint32_t)0x00040000)EXTI_RTSR_TR19 ((uint32_t)0x00080000)EXTI_FTSR_TR0 ((uint32_t)0x00000001)EXTI_FTSR_TR1 ((uint32_t)0x00000002)EXTI_FTSR_TR2 ((uint32_t)0x00000004)EXTI_FTSR_TR3 ((uint32_t)0x00000008)EXTI_FTSR_TR4 ((uint32_t)0x00000010)EXTI_FTSR_TR5 ((uint32_t)0x00000020)EXTI_FTSR_TR6 ((uint32_t)0x00000040)EXTI_FTSR_TR7 ((uint32_t)0x00000080)EXTI_FTSR_TR8 ((uint32_t)0x00000100)EXTI_FTSR_TR9 ((uint32_t)0x00000200)EXTI_FTSR_TR10 ((uint32_t)0x00000400)EXTI_FTSR_TR11 ((uint32_t)0x00000800)EXTI_FTSR_TR12 ((uint32_t)0x00001000)EXTI_FTSR_TR13 ((uint32_t)0x00002000)EXTI_FTSR_TR14 ((uint32_t)0x00004000)EXTI_FTSR_TR15 ((uint32_t)0x00008000)EXTI_FTSR_TR16 ((uint32_t)0x00010000)EXTI_FTSR_TR17 ((uint32_t)0x00020000)EXTI_FTSR_TR18 ((uint32_t)0x00040000)EXTI_FTSR_TR19 ((uint32_t)0x00080000)EXTI_SWIER_SWIER0 ((uint32_t)0x00000001)EXTI_SWIER_SWIER1 ((uint32_t)0x00000002) EXTI_SWIER_SWIER2 ((uint32_t)0x00000004)¡EXTI_SWIER_SWIER3 ((uint32_t)0x00000008)¢EXTI_SWIER_SWIER4 ((uint32_t)0x00000010)£EXTI_SWIER_SWIER5 ((uint32_t)0x00000020)¤EXTI_SWIER_SWIER6 ((uint32_t)0x00000040)¥EXTI_SWIER_SWIER7 ((uint32_t)0x00000080)¦EXTI_SWIER_SWIER8 ((uint32_t)0x00000100)§EXTI_SWIER_SWIER9 ((uint32_t)0x00000200)¨EXTI_SWIER_SWIER10 ((uint32_t)0x00000400)©EXTI_SWIER_SWIER11 ((uint32_t)0x00000800)ªEXTI_SWIER_SWIER12 ((uint32_t)0x00001000)«EXTI_SWIER_SWIER13 ((uint32_t)0x00002000)¬EXTI_SWIER_SWIER14 ((uint32_t)0x00004000)EXTI_SWIER_SWIER15 ((uint32_t)0x00008000)®EXTI_SWIER_SWIER16 ((uint32_t)0x00010000)¯EXTI_SWIER_SWIER17 ((uint32_t)0x00020000)°EXTI_SWIER_SWIER18 ((uint32_t)0x00040000)±EXTI_SWIER_SWIER19 ((uint32_t)0x00080000)´EXTI_PR_PR0 ((uint32_t)0x00000001)µEXTI_PR_PR1 ((uint32_t)0x00000002)¶EXTI_PR_PR2 ((uint32_t)0x00000004)·EXTI_PR_PR3 ((uint32_t)0x00000008)¸EXTI_PR_PR4 ((uint32_t)0x00000010)¹EXTI_PR_PR5 ((uint32_t)0x00000020)ºEXTI_PR_PR6 ((uint32_t)0x00000040)»EXTI_PR_PR7 ((uint32_t)0x00000080)¼EXTI_PR_PR8 ((uint32_t)0x00000100)½EXTI_PR_PR9 ((uint32_t)0x00000200)¾EXTI_PR_PR10 ((uint32_t)0x00000400)¿EXTI_PR_PR11 ((uint32_t)0x00000800)ÀEXTI_PR_PR12 ((uint32_t)0x00001000)ÁEXTI_PR_PR13 ((uint32_t)0x00002000)ÂEXTI_PR_PR14 ((uint32_t)0x00004000)ÃEXTI_PR_PR15 ((uint32_t)0x00008000)ÄEXTI_PR_PR16 ((uint32_t)0x00010000)ÅEXTI_PR_PR17 ((uint32_t)0x00020000)ÆEXTI_PR_PR18 ((uint32_t)0x00040000)ÇEXTI_PR_PR19 ((uint32_t)0x00080000)ÐDMA_ISR_GIF1 ((uint32_t)0x00000001)ÑDMA_ISR_TCIF1 ((uint32_t)0x00000002)ÒDMA_ISR_HTIF1 ((uint32_t)0x00000004)ÓDMA_ISR_TEIF1 ((uint32_t)0x00000008)ÔDMA_ISR_GIF2 ((uint32_t)0x00000010)ÕDMA_ISR_TCIF2 ((uint32_t)0x00000020)ÖDMA_ISR_HTIF2 ((uint32_t)0x00000040)×DMA_ISR_TEIF2 ((uint32_t)0x00000080)ØDMA_ISR_GIF3 ((uint32_t)0x00000100)ÙDMA_ISR_TCIF3 ((uint32_t)0x00000200)ÚDMA_ISR_HTIF3 ((uint32_t)0x00000400)ÛDMA_ISR_TEIF3 ((uint32_t)0x00000800)ÜDMA_ISR_GIF4 ((uint32_t)0x00001000)ÝDMA_ISR_TCIF4 ((uint32_t)0x00002000)ÞDMA_ISR_HTIF4 ((uint32_t)0x00004000)ßDMA_ISR_TEIF4 ((uint32_t)0x00008000)àDMA_ISR_GIF5 ((uint32_t)0x00010000)áDMA_ISR_TCIF5 ((uint32_t)0x00020000)âDMA_ISR_HTIF5 ((uint32_t)0x00040000)ãDMA_ISR_TEIF5 ((uint32_t)0x00080000)äDMA_ISR_GIF6 ((uint32_t)0x00100000)åDMA_ISR_TCIF6 ((uint32_t)0x00200000)æDMA_ISR_HTIF6 ((uint32_t)0x00400000)çDMA_ISR_TEIF6 ((uint32_t)0x00800000)èDMA_ISR_GIF7 ((uint32_t)0x01000000)éDMA_ISR_TCIF7 ((uint32_t)0x02000000)êDMA_ISR_HTIF7 ((uint32_t)0x04000000)ëDMA_ISR_TEIF7 ((uint32_t)0x08000000)îDMA_IFCR_CGIF1 ((uint32_t)0x00000001)ïDMA_IFCR_CTCIF1 ((uint32_t)0x00000002)ðDMA_IFCR_CHTIF1 ((uint32_t)0x00000004)ñDMA_IFCR_CTEIF1 ((uint32_t)0x00000008)òDMA_IFCR_CGIF2 ((uint32_t)0x00000010)óDMA_IFCR_CTCIF2 ((uint32_t)0x00000020)ôDMA_IFCR_CHTIF2 ((uint32_t)0x00000040)õDMA_IFCR_CTEIF2 ((uint32_t)0x00000080)öDMA_IFCR_CGIF3 ((uint32_t)0x00000100)÷DMA_IFCR_CTCIF3 ((uint32_t)0x00000200)øDMA_IFCR_CHTIF3 ((uint32_t)0x00000400)ùDMA_IFCR_CTEIF3 ((uint32_t)0x00000800)úDMA_IFCR_CGIF4 ((uint32_t)0x00001000)ûDMA_IFCR_CTCIF4 ((uint32_t)0x00002000)üDMA_IFCR_CHTIF4 ((uint32_t)0x00004000)ýDMA_IFCR_CTEIF4 ((uint32_t)0x00008000)þDMA_IFCR_CGIF5 ((uint32_t)0x00010000)ÿDMA_IFCR_CTCIF5 ((uint32_t)0x00020000)DMA_IFCR_CHTIF5 ((uint32_t)0x00040000)DMA_IFCR_CTEIF5 ((uint32_t)0x00080000)DMA_IFCR_CGIF6 ((uint32_t)0x00100000)DMA_IFCR_CTCIF6 ((uint32_t)0x00200000)DMA_IFCR_CHTIF6 ((uint32_t)0x00400000)DMA_IFCR_CTEIF6 ((uint32_t)0x00800000)DMA_IFCR_CGIF7 ((uint32_t)0x01000000)DMA_IFCR_CTCIF7 ((uint32_t)0x02000000)DMA_IFCR_CHTIF7 ((uint32_t)0x04000000)DMA_IFCR_CTEIF7 ((uint32_t)0x08000000)DMA_CCR1_EN ((uint16_t)0x0001)DMA_CCR1_TCIE ((uint16_t)0x0002)DMA_CCR1_HTIE ((uint16_t)0x0004)DMA_CCR1_TEIE ((uint16_t)0x0008)DMA_CCR1_DIR ((uint16_t)0x0010)DMA_CCR1_CIRC ((uint16_t)0x0020)DMA_CCR1_PINC ((uint16_t)0x0040)DMA_CCR1_MINC ((uint16_t)0x0080)DMA_CCR1_PSIZE ((uint16_t)0x0300)DMA_CCR1_PSIZE_0 ((uint16_t)0x0100)DMA_CCR1_PSIZE_1 ((uint16_t)0x0200)DMA_CCR1_MSIZE ((uint16_t)0x0C00)DMA_CCR1_MSIZE_0 ((uint16_t)0x0400)DMA_CCR1_MSIZE_1 ((uint16_t)0x0800)DMA_CCR1_PL ((uint16_t)0x3000)DMA_CCR1_PL_0 ((uint16_t)0x1000)DMA_CCR1_PL_1 ((uint16_t)0x2000)¡DMA_CCR1_MEM2MEM ((uint16_t)0x4000)¤DMA_CCR2_EN ((uint16_t)0x0001)¥DMA_CCR2_TCIE ((uint16_t)0x0002)¦DMA_CCR2_HTIE ((uint16_t)0x0004)§DMA_CCR2_TEIE ((uint16_t)0x0008)¨DMA_CCR2_DIR ((uint16_t)0x0010)©DMA_CCR2_CIRC ((uint16_t)0x0020)ªDMA_CCR2_PINC ((uint16_t)0x0040)«DMA_CCR2_MINC ((uint16_t)0x0080)DMA_CCR2_PSIZE ((uint16_t)0x0300)®DMA_CCR2_PSIZE_0 ((uint16_t)0x0100)¯DMA_CCR2_PSIZE_1 ((uint16_t)0x0200)±DMA_CCR2_MSIZE ((uint16_t)0x0C00)²DMA_CCR2_MSIZE_0 ((uint16_t)0x0400)³DMA_CCR2_MSIZE_1 ((uint16_t)0x0800)µDMA_CCR2_PL ((uint16_t)0x3000)¶DMA_CCR2_PL_0 ((uint16_t)0x1000)·DMA_CCR2_PL_1 ((uint16_t)0x2000)¹DMA_CCR2_MEM2MEM ((uint16_t)0x4000)¼DMA_CCR3_EN ((uint16_t)0x0001)½DMA_CCR3_TCIE ((uint16_t)0x0002)¾DMA_CCR3_HTIE ((uint16_t)0x0004)¿DMA_CCR3_TEIE ((uint16_t)0x0008)ÀDMA_CCR3_DIR ((uint16_t)0x0010)ÁDMA_CCR3_CIRC ((uint16_t)0x0020)ÂDMA_CCR3_PINC ((uint16_t)0x0040)ÃDMA_CCR3_MINC ((uint16_t)0x0080)ÅDMA_CCR3_PSIZE ((uint16_t)0x0300)ÆDMA_CCR3_PSIZE_0 ((uint16_t)0x0100)ÇDMA_CCR3_PSIZE_1 ((uint16_t)0x0200)ÉDMA_CCR3_MSIZE ((uint16_t)0x0C00)ÊDMA_CCR3_MSIZE_0 ((uint16_t)0x0400)ËDMA_CCR3_MSIZE_1 ((uint16_t)0x0800)ÍDMA_CCR3_PL ((uint16_t)0x3000)ÎDMA_CCR3_PL_0 ((uint16_t)0x1000)ÏDMA_CCR3_PL_1 ((uint16_t)0x2000)ÑDMA_CCR3_MEM2MEM ((uint16_t)0x4000)ÔDMA_CCR4_EN ((uint16_t)0x0001)ÕDMA_CCR4_TCIE ((uint16_t)0x0002)ÖDMA_CCR4_HTIE ((uint16_t)0x0004)×DMA_CCR4_TEIE ((uint16_t)0x0008)ØDMA_CCR4_DIR ((uint16_t)0x0010)ÙDMA_CCR4_CIRC ((uint16_t)0x0020)ÚDMA_CCR4_PINC ((uint16_t)0x0040)ÛDMA_CCR4_MINC ((uint16_t)0x0080)ÝDMA_CCR4_PSIZE ((uint16_t)0x0300)ÞDMA_CCR4_PSIZE_0 ((uint16_t)0x0100)ßDMA_CCR4_PSIZE_1 ((uint16_t)0x0200)áDMA_CCR4_MSIZE ((uint16_t)0x0C00)âDMA_CCR4_MSIZE_0 ((uint16_t)0x0400)ãDMA_CCR4_MSIZE_1 ((uint16_t)0x0800)åDMA_CCR4_PL ((uint16_t)0x3000)æDMA_CCR4_PL_0 ((uint16_t)0x1000)çDMA_CCR4_PL_1 ((uint16_t)0x2000)éDMA_CCR4_MEM2MEM ((uint16_t)0x4000)ìDMA_CCR5_EN ((uint16_t)0x0001)íDMA_CCR5_TCIE ((uint16_t)0x0002)îDMA_CCR5_HTIE ((uint16_t)0x0004)ïDMA_CCR5_TEIE ((uint16_t)0x0008)ðDMA_CCR5_DIR ((uint16_t)0x0010)ñDMA_CCR5_CIRC ((uint16_t)0x0020)òDMA_CCR5_PINC ((uint16_t)0x0040)óDMA_CCR5_MINC ((uint16_t)0x0080)õDMA_CCR5_PSIZE ((uint16_t)0x0300)öDMA_CCR5_PSIZE_0 ((uint16_t)0x0100)÷DMA_CCR5_PSIZE_1 ((uint16_t)0x0200)ùDMA_CCR5_MSIZE ((uint16_t)0x0C00)úDMA_CCR5_MSIZE_0 ((uint16_t)0x0400)ûDMA_CCR5_MSIZE_1 ((uint16_t)0x0800)ýDMA_CCR5_PL ((uint16_t)0x3000)þDMA_CCR5_PL_0 ((uint16_t)0x1000)ÿDMA_CCR5_PL_1 ((uint16_t)0x2000)DMA_CCR5_MEM2MEM ((uint16_t)0x4000)DMA_CCR6_EN ((uint16_t)0x0001)DMA_CCR6_TCIE ((uint16_t)0x0002)DMA_CCR6_HTIE ((uint16_t)0x0004)DMA_CCR6_TEIE ((uint16_t)0x0008)DMA_CCR6_DIR ((uint16_t)0x0010)DMA_CCR6_CIRC ((uint16_t)0x0020)DMA_CCR6_PINC ((uint16_t)0x0040)DMA_CCR6_MINC ((uint16_t)0x0080)DMA_CCR6_PSIZE ((uint16_t)0x0300)DMA_CCR6_PSIZE_0 ((uint16_t)0x0100)DMA_CCR6_PSIZE_1 ((uint16_t)0x0200)DMA_CCR6_MSIZE ((uint16_t)0x0C00)DMA_CCR6_MSIZE_0 ((uint16_t)0x0400)DMA_CCR6_MSIZE_1 ((uint16_t)0x0800)DMA_CCR6_PL ((uint16_t)0x3000)DMA_CCR6_PL_0 ((uint16_t)0x1000)DMA_CCR6_PL_1 ((uint16_t)0x2000)DMA_CCR6_MEM2MEM ((uint16_t)0x4000)DMA_CCR7_EN ((uint16_t)0x0001)DMA_CCR7_TCIE ((uint16_t)0x0002)DMA_CCR7_HTIE ((uint16_t)0x0004)DMA_CCR7_TEIE ((uint16_t)0x0008) DMA_CCR7_DIR ((uint16_t)0x0010)¡DMA_CCR7_CIRC ((uint16_t)0x0020)¢DMA_CCR7_PINC ((uint16_t)0x0040)£DMA_CCR7_MINC ((uint16_t)0x0080)¥DMA_CCR7_PSIZE , ((uint16_t)0x0300)¦DMA_CCR7_PSIZE_0 ((uint16_t)0x0100)§DMA_CCR7_PSIZE_1 ((uint16_t)0x0200)©DMA_CCR7_MSIZE ((uint16_t)0x0C00)ªDMA_CCR7_MSIZE_0 ((uint16_t)0x0400)«DMA_CCR7_MSIZE_1 ((uint16_t)0x0800)DMA_CCR7_PL ((uint16_t)0x3000)®DMA_CCR7_PL_0 ((uint16_t)0x1000)¯DMA_CCR7_PL_1 ((uint16_t)0x2000)±DMA_CCR7_MEM2MEM ((uint16_t)0x4000)´DMA_CNDTR1_NDT ((uint16_t)0xFFFF)·DMA_CNDTR2_NDT ((uint16_t)0xFFFF)ºDMA_CNDTR3_NDT ((uint16_t)0xFFFF)½DMA_CNDTR4_NDT ((uint16_t)0xFFFF)ÀDMA_CNDTR5_NDT ((uint16_t)0xFFFF)ÃDMA_CNDTR6_NDT ((uint16_t)0xFFFF)ÆDMA_CNDTR7_NDT ((uint16_t)0xFFFF)ÉDMA_CPAR1_PA ((uint32_t)0xFFFFFFFF)ÌDMA_CPAR2_PA ((uint32_t)0xFFFFFFFF)ÏDMA_CPAR3_PA ((uint32_t)0xFFFFFFFF)ÓDMA_CPAR4_PA ((uint32_t)0xFFFFFFFF)ÖDMA_CPAR5_PA ((uint32_t)0xFFFFFFFF)ÙDMA_CPAR6_PA ((uint32_t)0xFFFFFFFF)ÝDMA_CPAR7_PA ((uint32_t)0xFFFFFFFF)àDMA_CMAR1_MA ((uint32_t)0xFFFFFFFF)ãDMA_CMAR2_MA ((uint32_t)0xFFFFFFFF)æDMA_CMAR3_MA ((uint32_t)0xFFFFFFFF)êDMA_CMAR4_MA ((uint32_t)0xFFFFFFFF)íDMA_CMAR5_MA ((uint32_t)0xFFFFFFFF)ðDMA_CMAR6_MA ((uint32_t)0xFFFFFFFF)óDMA_CMAR7_MA ((uint32_t)0xFFFFFFFF)üADC_SR_AWD ((uint8_t)0x01)ýADC_SR_EOC ((uint8_t)0x02)þADC_SR_JEOC ((uint8_t)0x04)ÿADC_SR_JSTRT ((uint8_t)0x08)ADC_SR_STRT ((uint8_t)0x10)ADC_CR1_AWDCH ((uint32_t)0x0000001F)ADC_CR1_AWDCH_0 ((uint32_t)0x00000001)ADC_CR1_AWDCH_1 ((uint32_t)0x00000002)ADC_CR1_AWDCH_2 ((uint32_t)0x00000004)ADC_CR1_AWDCH_3 ((uint32_t)0x00000008)ADC_CR1_AWDCH_4 ((uint32_t)0x00000010)ADC_CR1_EOCIE ((uint32_t)0x00000020)ADC_CR1_AWDIE ((uint32_t)0x00000040)ADC_CR1_JEOCIE ((uint32_t)0x00000080)ADC_CR1_SCAN ((uint32_t)0x00000100)ADC_CR1_AWDSGL ((uint32_t)0x00000200)ADC_CR1_JAUTO ((uint32_t)0x00000400)ADC_CR1_DISCEN ((uint32_t)0x00000800)ADC_CR1_JDISCEN ((uint32_t)0x00001000)ADC_CR1_DISCNUM ((uint32_t)0x0000E000)ADC_CR1_DISCNUM_0 ((uint32_t)0x00002000)ADC_CR1_DISCNUM_1 ((uint32_t)0x00004000)ADC_CR1_DISCNUM_2 ((uint32_t)0x00008000)ADC_CR1_DUALMOD ((uint32_t)0x000F0000)ADC_CR1_DUALMOD_0 ((uint32_t)0x00010000)ADC_CR1_DUALMOD_1 ((uint32_t)0x00020000)ADC_CR1_DUALMOD_2 ((uint32_t)0x00040000)ADC_CR1_DUALMOD_3 ((uint32_t)0x00080000)ADC_CR1_JAWDEN ((uint32_t)0x00400000)ADC_CR1_AWDEN ((uint32_t)0x00800000)£ADC_CR2_ADON ((uint32_t)0x00000001)¤ADC_CR2_CONT ((uint32_t)0x00000002)¥ADC_CR2_CAL ((uint32_t)0x00000004)¦ADC_CR2_RSTCAL ((uint32_t)0x00000008)§ADC_CR2_DMA ((uint32_t)0x00000100)¨ADC_CR2_ALIGN ((uint32_t)0x00000800)ªADC_CR2_JEXTSEL ((uint32_t)0x00007000)«ADC_CR2_JEXTSEL_0 ((uint32_t)0x00001000)¬ADC_CR2_JEXTSEL_1 ((uint32_t)0x00002000)ADC_CR2_JEXTSEL_2 ((uint32_t)0x00004000)¯ADC_CR2_JEXTTRIG ((uint32_t)0x00008000)±ADC_CR2_EXTSEL ((uint32_t)0x000E0000)²ADC_CR2_EXTSEL_0 ((uint32_t)0x00020000)³ADC_CR2_EXTSEL_1 ((uint32_t)0x00040000)´ADC_CR2_EXTSEL_2 ((uint32_t)0x00080000)¶ADC_CR2_EXTTRIG ((uint32_t)0x00100000)·ADC_CR2_JSWSTART ((uint32_t)0x00200000)¸ADC_CR2_SWSTART ((uint32_t)0x00400000)¹ADC_CR2_TSVREFE ((uint32_t)0x00800000)¼ADC_SMPR1_SMP10 ((uint32_t)0x00000007)½ADC_SMPR1_SMP10_0 ((uint32_t)0x00000001)¾ADC_SMPR1_SMP10_1 ((uint32_t)0x00000002)¿ADC_SMPR1_SMP10_2 ((uint32_t)0x00000004)ÁADC_SMPR1_SMP11 ((uint32_t)0x00000038)ÂADC_SMPR1_SMP11_0 ((uint32_t)0x00000008)ÃADC_SMPR1_SMP11_1 ((uint32_t)0x00000010)ÄADC_SMPR1_SMP11_2 ((uint32_t)0x00000020)ÆADC_SMPR1_SMP12 ((uint32_t)0x000001C0)ÇADC_SMPR1_SMP12_0 ((uint32_t)0x00000040)ÈADC_SMPR1_SMP12_1 ((uint32_t)0x00000080)ÉADC_SMPR1_SMP12_2 ((uint32_t)0x00000100)ËADC_SMPR1_SMP13 ((uint32_t)0x00000E00)ÌADC_SMPR1_SMP13_0 ((uint32_t)0x00000200)ÍADC_SMPR1_SMP13_1 ((uint32_t)0x00000400)ÎADC_SMPR1_SMP13_2 ((uint32_t)0x00000800)ÐADC_SMPR1_SMP14 ((uint32_t)0x00007000)ÑADC_SMPR1_SMP14_0 ((uint32_t)0x00001000)ÒADC_SMPR1_SMP14_1 ((uint32_t)0x00002000)ÓADC_SMPR1_SMP14_2 ((uint32_t)0x00004000)ÕADC_SMPR1_SMP15 ((uint32_t)0x00038000)ÖADC_SMPR1_SMP15_0 ((uint32_t)0x00008000)×ADC_SMPR1_SMP15_1 ((uint32_t)0x00010000)ØADC_SMPR1_SMP15_2 ((uint32_t)0x00020000)ÚADC_SMPR1_SMP16 ((uint32_t)0x001C0000)ÛADC_SMPR1_SMP16_0 ((uint32_t)0x00040000)ÜADC_SMPR1_SMP16_1 ((uint32_t)0x00080000)ÝADC_SMPR1_SMP16_2 ((uint32_t)0x00100000)ßADC_SMPR1_SMP17 ((uint32_t)0x00E00000)àADC_SMPR1_SMP17_0 ((uint32_t)0x00200000)áADC_SMPR1_SMP17_1 ((uint32_t)0x00400000)âADC_SMPR1_SMP17_2 ((uint32_t)0x00800000)åADC_SMPR2_SMP0 ((uint32_t)0x00000007)æADC_SMPR2_SMP0_0 ((uint32_t)0x00000001)çADC_SMPR2_SMP0_1 ((uint32_t)0x00000002)èADC_SMPR2_SMP0_2 ((uint32_t)0x00000004)êADC_SMPR2_SMP1 ((uint32_t)0x00000038)ëADC_SMPR2_SMP1_0 ((uint32_t)0x00000008)ìADC_SMPR2_SMP1_1 ((uint32_t)0x00000010)íADC_SMPR2_SMP1_2 ((uint32_t)0x00000020)ïADC_SMPR2_SMP2 ((uint32_t)0x000001C0)ðADC_SMPR2_SMP2_0 ((uint32_t)0x00000040)ñADC_SMPR2_SMP2_1 ((uint32_t)0x00000080)òADC_SMPR2_SMP2_2 ((uint32_t)0x00000100)ôADC_SMPR2_SMP3 ((uint32_t)0x00000E00)õADC_SMPR2_SMP3_0 ((uint32_t)0x00000200)öADC_SMPR2_SMP3_1 ((uint32_t)0x00000400)÷ADC_SMPR2_SMP3_2 ((uint32_t)0x00000800)ùADC_SMPR2_SMP4 ((uint32_t)0x00007000)úADC_SMPR2_SMP4_0 ((uint32_t)0x00001000)ûADC_SMPR2_SMP4_1 ((uint32_t)0x00002000)üADC_SMPR2_SMP4_2 ((uint32_t)0x00004000)þADC_SMPR2_SMP5 ((uint32_t)0x00038000)ÿADC_SMPR2_SMP5_0 ((uint32_t)0x00008000)ADC_SMPR2_SMP5_1 ((uint32_t)0x00010000)ADC_SMPR2_SMP5_2 ((uint32_t)0x00020000)ADC_SMPR2_SMP6 ((uint32_t)0x001C0000)ADC_SMPR2_SMP6_0 ((uint32_t)0x00040000)ADC_SMPR2_SMP6_1 ((uint32_t)0x00080000)ADC_SMPR2_SMP6_2 ((uint32_t)0x00100000)ADC_SMPR2_SMP7 ((uint32_t)0x00E00000)ADC_SMPR2_SMP7_0 ((uint32_t)0x00200000)ADC_SMPR2_SMP7_1 ((uint32_t)0x00400000)ADC_SMPR2_SMP7_2 ((uint32_t)0x00800000)ADC_SMPR2_SMP8 ((uint32_t)0x07000000)ADC_SMPR2_SMP8_0 ((uint32_t)0x01000000)ADC_SMPR2_SMP8_1 ((uint32_t)0x02000000)ADC_SMPR2_SMP8_2 ((uint32_t)0x04000000)ADC_SMPR2_SMP9 ((uint32_t)0x38000000)ADC_SMPR2_SMP9_0 ((uint32_t)0x08000000)ADC_SMPR2_SMP9_1 ((uint32_t)0x10000000)ADC_SMPR2_SMP9_2 ((uint32_t)0x20000000)ADC_JOFR1_JOFFSET1 ((uint16_t)0x0FFF)ADC_JOFR2_JOFFSET2 ((uint16_t)0x0FFF)ADC_JOFR3_JOFFSET3 ((uint16_t)0x0FFF)¡ADC_JOFR4_JOFFSET4 ((uint16_t)0x0FFF)¤ADC_HTR_HT ((uint16_t)0x0FFF)§ADC_LTR_LT ((uint16_t)0x0FFF)ªADC_SQR1_SQ13 ((uint32_t)0x0000001F)«ADC_SQR1_SQ13_0 ((uint32_t)0x00000001)¬ADC_SQR1_SQ13_1 ((uint32_t)0x00000002)ADC_SQR1_SQ13_2 ((uint32_t)0x00000004)®ADC_SQR1_SQ13_3 ((uint32_t)0x00000008)¯ADC_SQR1_SQ13_4 ((uint32_t)0x00000010)±ADC_SQR1_SQ14 ((uint32_t)0x000003E0)²ADC_SQR1_SQ14_0 ((uint32_t)0x00000020)³ADC_SQR1_SQ14_1 ((uint32_t)0x00000040)´ADC_SQR1_SQ14_2 ((uint32_t)0x00000080)µADC_SQR1_SQ14_3 ((uint32_t)0x00000100)¶ADC_SQR1_SQ14_4 ((uint32_t)0x00000200)¸ADC_SQR1_SQ15 ((uint32_t)0x00007C00)¹ADC_SQR1_SQ15_0 ((uint32_t)0x00000400)ºADC_SQR1_SQ15_1 ((uint32_t)0x00000800)»ADC_SQR1_SQ15_2 ((uint32_t)0x00001000)¼ADC_SQR1_SQ15_3 ((uint32_t)0x00002000)½ADC_SQR1_SQ15_4 ((uint32_t)0x00004000)¿ADC_SQR1_SQ16 ((uint32_t)0x000F8000)ÀADC_SQR1_SQ16_0 ((uint32_t)0x00008000)ÁADC_SQR1_SQ16_1 ((uint32_t)0x00010000)ÂADC_SQR1_SQ16_2 ((uint32_t)0x00020000)ÃADC_SQR1_SQ16_3 ((uint32_t)0x00040000)ÄADC_SQR1_SQ16_4 ((uint32_t)0x00080000)ÆADC_SQR1_L ((uint32_t)0x00F00000)ÇADC_SQR1_L_0 ((uint32_t)0x00100000)ÈADC_SQR1_L_1 ((uint32_t)0x00200000)ÉADC_SQR1_L_2 ((uint32_t)0x00400000)ÊADC_SQR1_L_3 ((uint32_t)0x00800000)ÍADC_SQR2_SQ7 ((uint32_t)0x0000001F)ÎADC_SQR2_SQ7_0 ((uint32_t)0x00000001)ÏADC_SQR2_SQ7_1 ((uint32_t)0x00000002)ÐADC_SQR2_SQ7_2 ((uint32_t)0x00000004)ÑADC_SQR2_SQ7_3 ((uint32_t)0x00000008)ÒADC_SQR2_SQ7_4 ((uint32_t)0x00000010)ÔADC_SQR2_SQ8 ((uint32_t)0x000003E0)ÕADC_SQR2_SQ8_0 ((uint32_t)0x00000020)ÖADC_SQR2_SQ8_1 ((uint32_t)0x00000040)×ADC_SQR2_SQ8_2 ((uint32_t)0x00000080)ØADC_SQR2_SQ8_3 ((uint32_t)0x00000100)ÙADC_SQR2_SQ8_4 ((uint32_t)0x00000200)ÛADC_SQR2_SQ9 ((uint32_t)0x00007C00)ÜADC_SQR2_SQ9_0 ((uint32_t)0x00000400)ÝADC_SQR2_SQ9_1 ((uint32_t)0x00000800)ÞADC_SQR2_SQ9_2 ((uint32_t)0x00001000)ßADC_SQR2_SQ9_3 ((uint32_t)0x00002000)àADC_SQR2_SQ9_4 ((uint32_t)0x00004000)âADC_SQR2_SQ10 ((uint32_t)0x000F8000)ãADC_SQR2_SQ10_0 ((uint32_t)0x00008000)äADC_SQR2_SQ10_1 ((uint32_t)0x00010000)åADC_SQR2_SQ10_2 ((uint32_t)0x00020000)æADC_SQR2_SQ10_3 ((uint32_t)0x00040000)çADC_SQR2_SQ10_4 ((uint32_t)0x00080000)éADC_SQR2_SQ11 ((uint32_t)0x01F00000)êADC_SQR2_SQ11_0 ((uint32_t)0x00100000)ëADC_SQR2_SQ11_1 ((uint32_t)0x00200000)ìADC_SQR2_SQ11_2 ((uint32_t)0x00400000)íADC_SQR2_SQ11_3 ((uint32_t)0x00800000)îADC_SQR2_SQ11_4 ((uint32_t)0x01000000)ðADC_SQR2_SQ12 ((uint32_t)0x3E000000)ñADC_SQR2_SQ12_0 ((uint32_t)0x02000000)òADC_SQR2_SQ12_1 ((uint32_t)0x04000000)óADC_SQR2_SQ12_2 ((uint32_t)0x08000000)ôADC_SQR2_SQ12_3 ((uint32_t)0x10000000)õADC_SQR2_SQ12_4 ((uint32_t)0x20000000)øADC_SQR3_SQ1 ((uint32_t)0x0000001F)ùADC_SQR3_SQ1_0 ((uint32_t)0x00000001)úADC_SQR3_SQ1_1 ((uint32_t)0x00000002)ûADC_SQR3_SQ1_2 ((uint32_t)0x00000004)üADC_SQR3_SQ1_3 ((uint32_t)0x00000008)ýADC_SQR3_SQ1_4 ((uint32_t)0x00000010)ÿADC_SQR3_SQ2 ((uint32_t)0x000003E0)ADC_SQR3_SQ2_0 ((uint32_t)0x00000020)ADC_SQR3_SQ2_1 ((uint32_t)0x00000040)ADC_SQR3_SQ2_2 ((uint32_t)0x00000080)ADC_SQR3_SQ2_3 ((uint32_t)0x00000100)ADC_SQR3_SQ2_4 ((uint32_t)0x00000200)ADC_SQR3_SQ3 ((uint32_t)0x00007C00)ADC_SQR3_SQ3_0 ((uint32_t)0x00000400)ADC_SQR3_SQ3_1 ((uint32_t)0x00000800)ADC_SQR3_SQ3_2 ((uint32_t)0x00001000)ADC_SQR3_SQ3_3 ((uint32_t)0x00002000)ADC_SQR3_SQ3_4 ((uint32_t)0x00004000)ADC_SQR3_SQ4 ((uint32_t)0x000F8000)ADC_SQR3_SQ4_0 ((uint32_t)0x00008000)ADC_SQR3_SQ4_1 ((uint32_t)0x00010000)ADC_SQR3_SQ4_2 ((uint32_t)0x00020000)ADC_SQR3_SQ4_3 ((uint32_t)0x00040000)ADC_SQR3_SQ4_4 ((uint32_t)0x00080000)ADC_SQR3_SQ5 ((uint32_t)0x01F00000)ADC_SQR3_SQ5_0 ((uint32_t)0x00100000)ADC_SQR3_SQ5_1 ((uint32_t)0x00200000)ADC_SQR3_SQ5_2 ((uint32_t)0x00400000)ADC_SQR3_SQ5_3 ((uint32_t)0x00800000)ADC_SQR3_SQ5_4 ((uint32_t)0x01000000)ADC_SQR3_SQ6 ((uint32_t)0x3E000000)ADC_SQR3_SQ6_0 ((uint32_t)0x02000000)ADC_SQR3_SQ6_1 ((uint32_t)0x04000000)ADC_SQR3_SQ6_2 ((uint32_t)0x08000000)ADC_SQR3_SQ6_3 ((uint32_t)0x10000000) ADC_SQR3_SQ6_4 ((uint32_t)0x20000000)£ADC_JSQR_JSQ1 ((uint32_t)0x0000001F)¤ADC_JSQR_JSQ1_0 ((uint32_t)0x00000001)¥ADC_JSQR_JSQ1_1 ((uint32_t)0x00000002)¦ADC_JSQR_JSQ1_2 ((uint32_t)0x00000004)§ADC_JSQR_JSQ1_3 ((uint32_t)0x00000008)¨ADC_JSQR_JSQ1_4 ((uint32_t)0x00000010)ªADC_JSQR_JSQ2 ((uint32_t)0x000003E0)«ADC_JSQR_JSQ2_0 ((uint32_t)0x00000020)¬ADC_JSQR_JSQ2_1 ((uint32_t)0x00000040)ADC_JSQR_JSQ2_2 ((uint32_t)0x00000080)®ADC_JSQR_JSQ2_3 ((uint32_t)0x00000100)¯ADC_JSQR_JSQ2_4 ((uint32_t)0x00000200)±ADC_JSQR_JSQ3 ((uint32_t)0x00007C00)²ADC_JSQR_JSQ3_0 ((uint32_t)0x00000400)³ADC_JSQR_JSQ3_1 ((uint32_t)0x00000800)´ADC_JSQR_JSQ3_2 ((uint32_t)0x00001000)µADC_JSQR_JSQ3_3 ((uint32_t)0x00002000)¶ADC_JSQR_JSQ3_4 ((uint32_t)0x00004000)¸ADC_JSQR_JSQ4 ((uint32_t)0x000F8000)¹ADC_JSQR_JSQ4_0 ((uint32_t)0x00008000)ºADC_JSQR_JSQ4_1 ((uint32_t)0x00010000)»ADC_JSQR_JSQ4_2 ((uint32_t)0x00020000)¼ADC_JSQR_JSQ4_3 ((uint32_t)0x00040000)½ADC_JSQR_JSQ4_4 ((uint32_t)0x00080000)¿ADC_JSQR_JL ((uint32_t)0x00300000)ÀADC_JSQR_JL_0 ((uint32_t)0x00100000)ÁADC_JSQR_JL_1 ((uint32_t)0x00200000)ÄADC_JDR1_JDATA ((uint16_t)0xFFFF)ÇADC_JDR2_JDATA ((uint16_t)0xFFFF)ÊADC_JDR3_JDATA ((uint16_t)0xFFFF)ÍADC_JDR4_JDATA ((uint16_t)0xFFFF)ÐADC_DR_DATA ((uint32_t)0x0000FFFF)ÑADC_DR_ADC2DATA ((uint32_t)0xFFFF0000)ÚDAC_CR_EN1 ((uint32_t)0x00000001)ÛDAC_CR_BOFF1 ((uint32_t)0x00000002)ÜDAC_CR_TEN1 ((uint32_t)0x00000004)ÞDAC_CR_TSEL1 ((uint32_t)0x00000038)ßDAC_CR_TSEL1_0 ((uint32_t)0x00000008)àDAC_CR_TSEL1_1 ((uint32_t)0x00000010)áDAC_CR_TSEL1_2 ((uint32_t)0x00000020)ãDAC_CR_WAVE1 ((uint32_t)0x000000C0)äDAC_CR_WAVE1_0 ((uint32_t)0x00000040)åDAC_CR_WAVE1_1 ((uint32_t)0x00000080)çDAC_CR_MAMP1 ((uint32_t)0x00000F00)èDAC_CR_MAMP1_0 ((uint32_t)0x00000100)éDAC_CR_MAMP1_1 ((uint32_t)0x00000200)êDAC_CR_MAMP1_2 ((uint32_t)0x00000400)ëDAC_CR_MAMP1_3 ((uint32_t)0x00000800)íDAC_CR_DMAEN1 ((uint32_t)0x00001000)îDAC_CR_EN2 ((uint32_t)0x00010000)ïDAC_CR_BOFF2 ((uint32_t)0x00020000)ðDAC_CR_TEN2 ((uint32_t)0x00040000)òDAC_CR_TSEL2 ((uint32_t)0x00380000)óDAC_CR_TSEL2_0 ((uint32_t)0x00080000)ôDAC_CR_TSEL2_1 ((uint32_t)0x00100000)õDAC_CR_TSEL2_2 ((uint32_t)0x00200000)÷DAC_CR_WAVE2 ((uint32_t)0x00C00000)øDAC_CR_WAVE2_0 ((uint32_t)0x00400000)ùDAC_CR_WAVE2_1 ((uint32_t)0x00800000)ûDAC_CR_MAMP2 ((uint32_t)0x0F000000)üDAC_CR_MAMP2_0 ((uint32_t)0x01000000)ýDAC_CR_MAMP2_1 ((uint32_t)0x02000000)þDAC_CR_MAMP2_2 ((uint32_t)0x04000000)ÿDAC_CR_MAMP2_3 ((uint32_t)0x08000000) DAC_CR_DMAEN2 ((uint32_t)0x10000000) DAC_SWTRIGR_SWTRIG1 ((uint8_t)0x01) DAC_SWTRIGR_SWTRIG2 ((uint8_t)0x02) DAC_DHR12R1_DACC1DHR ((uint16_t)0x0FFF) DAC_DHR12L1_DACC1DHR ((uint16_t)0xFFF0) DAC_DHR8R1_DACC1DHR ((uint8_t)0xFF) DAC_DHR12R2_DACC2DHR ((uint16_t)0x0FFF) DAC_DHR12L2_DACC2DHR ((uint16_t)0xFFF0) DAC_DHR8R2_DACC2DHR ((uint8_t)0xFF) DAC_DHR12RD_DACC1DHR ((uint32_t)0x00000FFF) DAC_DHR12RD_DACC2DHR ((uint32_t)0x0FFF0000) DAC_DHR12LD_DACC1DHR ((uint32_t)0x0000FFF0) DAC_DHR12LD_DACC2DHR ((uint32_t)0xFFF00000)¢ DAC_DHR8RD_DACC1DHR ((uint16_t)0x00FF)£ DAC_DHR8RD_DACC2DHR ((uint16_t)0xFF00)¦ DAC_DOR1_DACC1DOR ((uint16_t)0x0FFF)© DAC_DOR2_DACC2DOR ((uint16_t)0x0FFF)¬ DAC_SR_DMAUDR1 ((uint32_t)0x00002000) DAC_SR_DMAUDR2 ((uint32_t)0x20000000)µ CEC_CFGR_PE ((uint16_t)0x0001)¶ CEC_CFGR_IE ((uint16_t)0x0002)· CEC_CFGR_BTEM ((uint16_t)0x0004)¸ CEC_CFGR_BPEM ((uint16_t)0x0008)» CEC_OAR_OA ((uint16_t)0x000F)¼ CEC_OAR_OA_0 ((uint16_t)0x0001)½ CEC_OAR_OA_1 ((uint16_t)0x0002)¾ CEC_OAR_OA_2 ((uint16_t)0x0004)¿ CEC_OAR_OA_3 ((uint16_t)0x0008)Â CEC_PRES_PRES ((uint16_t)0x3FFF)Å CEC_ESR_BTE ((uint16_t)0x0001)Æ CEC_ESR_BPE ((uint16_t)0x0002)Ç CEC_ESR_RBTFE ((uint16_t)0x0004)È CEC_ESR_SBE ((uint16_t)0x0008)É CEC_ESR_ACKE ((uint16_t)0x0010)Ê CEC_ESR_LINE ((uint16_t)0x0020)Ë CEC_ESR_TBTFE ((uint16_t)0x0040)Î CEC_CSR_TSOM ((uint16_t)0x0001)Ï CEC_CSR_TEOM ((uint16_t)0x0002)Ð CEC_CSR_TERR ((uint16_t)0x0004)Ñ CEC_CSR_TBTRF ((uint16_t)0x0008)Ò CEC_CSR_RSOM ((uint16_t)0x0010)Ó CEC_CSR_REOM ((uint16_t)0x0020)Ô CEC_CSR_RERR ((uint16_t)0x0040)Õ CEC_CSR_RBTF ((uint16_t)0x0080)Ø CEC_TXD_TXD ((uint16_t)0x00FF)Û CEC_RXD_RXD ((uint16_t)0x00FF)ä TIM_CR1_CEN ((uint16_t)0x0001)å TIM_CR1_UDIS ((uint16_t)0x0002)æ TIM_CR1_URS ((uint16_t)0x0004)ç TIM_CR1_OPM ((uint16_t)0x0008)è TIM_CR1_DIR ((uint16_t)0x0010)ê TIM_CR1_CMS ((uint16_t)0x0060)ë TIM_CR1_CMS_0 ((uint16_t)0x0020)ì TIM_CR1_CMS_1 ((uint16_t)0x0040)î TIM_CR1_ARPE ((uint16_t)0x0080)ð TIM_CR1_CKD ((uint16_t)0x0300)ñ TIM_CR1_CKD_0 ((uint16_t)0x0100)ò TIM_CR1_CKD_1 ((uint16_t)0x0200)õ TIM_CR2_CCPC ((uint16_t)0x0001)ö TIM_CR2_CCUS ((uint16_t)0x0004)÷ TIM_CR2_CCDS ((uint16_t)0x0008)ù TIM_CR2_MMS ((uint16_t)0x0070)ú TIM_CR2_MMS_0 ((uint16_t)0x0010)û TIM_CR2_MMS_1 ((uint16_t)0x0020)ü TIM_CR2_MMS_2 ((uint16_t)0x0040)þ TIM_CR2_TI1S ((uint16_t)0x0080)ÿ TIM_CR2_OIS1 ((uint16_t)0x0100)!TIM_CR2_OIS1N ((uint16_t)0x0200)!TIM_CR2_OIS2 ((uint16_t)0x0400)!TIM_CR2_OIS2N ((uint16_t)0x0800)!TIM_CR2_OIS3 ((uint16_t)0x1000)!TIM_CR2_OIS3N ((uint16_t)0x2000)!TIM_CR2_OIS4 ((uint16_t)0x4000)!TIM_SMCR_SMS ((uint16_t)0x0007)!TIM_SMCR_SMS_0 ((uint16_t)0x0001)!TIM_SMCR_SMS_1 ((uint16_t)0x0002)!TIM_SMCR_SMS_2 ((uint16_t)0x0004)!TIM_SMCR_TS ((uint16_t)0x0070)!TIM_SMCR_TS_0 ((uint16_t)0x0010)!TIM_SMCR_TS_1 ((uint16_t)0x0020)!TIM_SMCR_TS_2 ((uint16_t)0x0040)!TIM_SMCR_MSM ((uint16_t)0x0080)!TIM_SMCR_ETF ((uint16_t)0x0F00)!TIM_SMCR_ETF_0 ((uint16_t)0x0100)!TIM_SMCR_ETF_1 ((uint16_t)0x0200)!TIM_SMCR_ETF_2 ((uint16_t)0x0400)!TIM_SMCR_ETF_3 ((uint16_t)0x0800)!TIM_SMCR_ETPS ((uint16_t)0x3000)!TIM_SMCR_ETPS_0 ((uint16_t)0x1000)!TIM_SMCR_ETPS_1 ((uint16_t)0x2000)!TIM_SMCR_ECE ((uint16_t)0x4000)!TIM_SMCR_ETP ((uint16_t)0x8000)¢!TIM_DIER_UIE ((uint16_t)0x0001)£!TIM_DIER_CC1IE ((uint16_t)0x0002)¤!TIM_DIER_CC2IE ((uint16_t)0x0004)¥!TIM_DIER_CC3IE ((uint16_t)0x0008)¦!TIM_DIER_CC4IE ((uint16_t)0x0010)§!TIM_DIER_COMIE ((uint16_t)0x0020)¨!TIM_DIER_TIE ((uint16_t)0x0040)©!TIM_DIER_BIE ((uint16_t)0x0080)ª!TIM_DIER_UDE ((uint16_t)0x0100)«!TIM_DIER_CC1DE ((uint16_t)0x0200)¬!TIM_DIER_CC2DE ((uint16_t)0x0400)!TIM_DIER_CC3DE ((uint16_t)0x0800)®!TIM_DIER_CC4DE ((uint16_t)0x1000)¯!TIM_DIER_COMDE ((uint16_t)0x2000)°!TIM_DIER_TDE ((uint16_t)0x4000)³!TIM_SR_UIF ((uint16_t)0x0001)´!TIM_SR_CC1IF ((uint16_t)0x0002)µ!TIM_SR_CC2IF ((uint16_t)0x0004)¶!TIM_SR_CC3IF ((uint16_t)0x0008)·!TIM_SR_CC4IF ((uint16_t)0x0010)¸!TIM_SR_COMIF ((uint16_t)0x0020)¹!TIM_SR_TIF ((uint16_t)0x0040)º!TIM_SR_BIF ((uint16_t)0x0080)»!TIM_SR_CC1OF ((uint16_t)0x0200)¼!TIM_SR_CC2OF ((uint16_t)0x0400)½!TIM_SR_CC3OF ((uint16_t)0x0800)¾!TIM_SR_CC4OF ((uint16_t)0x1000)Á!TIM_EGR_UG ((uint8_t)0x01)Â!TIM_EGR_CC1G ((uint8_t)0x02)Ã!TIM_EGR_CC2G ((uint8_t)0x04)Ä!TIM_EGR_CC3G ((uint8_t)0x08)Å!TIM_EGR_CC4G ((uint8_t)0x10)Æ!TIM_EGR_COMG ((uint8_t)0x20)Ç!TIM_EGR_TG ((uint8_t)0x40)È!TIM_EGR_BG ((uint8_t)0x80)Ë!TIM_CCMR1_CC1S ((uint16_t)0x0003)Ì!TIM_CCMR1_CC1S_0 ((uint16_t)0x0001)Í!TIM_CCMR1_CC1S_1 ((uint16_t)0x0002)Ï!TIM_CCMR1_OC1FE ((uint16_t)0x0004)Ð!TIM_CCMR1_OC1PE ((uint16_t)0x0008)Ò!TIM_CCMR1_OC1M ((uint16_t)0x0070)Ó!TIM_CCMR1_OC1M_0 ((uint16_t)0x0010)Ô!TIM_CCMR1_OC1M_1 ((uint16_t)0x0020)Õ!TIM_CCMR1_OC1M_2 ((uint16_t)0x0040)×!TIM_CCMR1_OC1CE ((uint16_t)0x0080)Ù!TIM_CCMR1_CC2S ((uint16_t)0x0300)Ú!TIM_CCMR1_CC2S_0 ((uint16_t)0x0100)Û!TIM_CCMR1_CC2S_1 ((uint16_t)0x0200)Ý!TIM_CCMR1_OC2FE ((uint16_t)0x0400)Þ!TIM_CCMR1_OC2PE ((uint16_t)0x0800)à!TIM_CCMR1_OC2M ((uint16_t)0x7000)á!TIM_CCMR1_OC2M_0 ((uint16_t)0x1000)â!TIM_CCMR1_OC2M_1 ((uint16_t)0x2000)ã!TIM_CCMR1_OC2M_2 ((uint16_t)0x4000)å!TIM_CCMR1_OC2CE ((uint16_t)0x8000)é!TIM_CCMR1_IC1PSC ((uint16_t)0x000C)ê!TIM_CCMR1_IC1PSC_0 ((uint16_t)0x0004)ë!TIM_CCMR1_IC1PSC_1 ((uint16_t)0x0008)í!TIM_CCMR1_IC1F ((uint16_t)0x00F0)î!TIM_CCMR1_IC1F_0 ((uint16_t)0x0010)ï!TIM_CCMR1_IC1F_1 ((uint16_t)0x0020)ð!TIM_CCMR1_IC1F_2 ((uint16_t)0x0040)ñ!TIM_CCMR1_IC1F_3 ((uint16_t)0x0080)ó!TIM_CCMR1_IC2PSC ((uint16_t)0x0C00)ô!TIM_CCMR1_IC2PSC_0 ((uint16_t)0x0400)õ!TIM_CCMR1_IC2PSC_1 ((uint16_t)0x0800)÷!TIM_CCMR1_IC2F ((uint16_t)0xF000)ø!TIM_CCMR1_IC2F_0 ((uint16_t)0x1000)ù!TIM_CCMR1_IC2F_1 ((uint16_t)0x2000)ú!TIM_CCMR1_IC2F_2 ((uint16_t)0x4000)û!TIM_CCMR1_IC2F_3 ((uint16_t)0x8000)þ!TIM_CCMR2_CC3S ((uint16_t)0x0003)ÿ!TIM_CCMR2_CC3S_0 ((uint16_t)0x0001)"TIM_CCMR2_CC3S_1 ((uint16_t)0x0002)"TIM_CCMR2_OC3FE ((uint16_t)0x0004)"TIM_CCMR2_OC3PE ((uint16_t)0x0008)"TIM_CCMR2_OC3M ((uint16_t)0x0070)"TIM_CCMR2_OC3M_0 ((uint16_t)0x0010)"TIM_CCMR2_OC3M_1 ((uint16_t)0x0020)"TIM_CCMR2_OC3M_2 ((uint16_t)0x0040)"TIM_CCMR2_OC3CE ((uint16_t)0x0080)"TIM_CCMR2_CC4S ((uint16_t)0x0300)"TIM_CCMR2_CC4S_0 ((uint16_t)0x0100)"TIM_CCMR2_CC4S_1 ((uint16_t)0x0200)"TIM_CCMR2_OC4FE ((uint16_t)0x0400)"TIM_CCMR2_OC4PE ((uint16_t)0x0800)"TIM_CCMR2_OC4M ((uint16_t)0x7000)"TIM_CCMR2_OC4M_0 ((uint16_t)0x1000)"TIM_CCMR2_OC4M_1 ((uint16_t)0x2000)"TIM_CCMR2_OC4M_2 ((uint16_t)0x4000)"TIM_CCMR2_OC4CE ((uint16_t)0x8000)"TIM_CCMR2_IC3PSC ((uint16_t)0x000C)"TIM_CCMR2_IC3PSC_0 ((uint16_t)0x0004)"TIM_CCMR2_IC3PSC_1 ((uint16_t)0x0008) "TIM_CCMR2_IC3F ((uint16_t)0x00F0)¡"TIM_CCMR2_IC3F_0 ((uint16_t)0x0010)¢"TIM_CCMR2_IC3F_1 ((uint16_t)0x0020)£"TIM_CCMR2_IC3F_2 ((uint16_t)0x0040)¤"TIM_CCMR2_IC3F_3 ((uint16_t)0x0080)¦"TIM_CCMR2_IC4PSC ((uint16_t)0x0C00)§"TIM_CCMR2_IC4PSC_0 ((uint16_t)0x0400)¨"TIM_CCMR2_IC4PSC_1 ((uint16_t)0x0800)ª"TIM_CCMR2_IC4F ((uint16_t)0xF000)«"TIM_CCMR2_IC4F_0 ((uint16_t)0x1000)¬"TIM_CCMR2_IC4F_1 ((uint16_t)0x2000)"TIM_CCMR2_IC4F_2 ((uint16_t)0x4000)®"TIM_CCMR2_IC4F_3 ((uint16_t)0x8000)±"TIM_CCER_CC1E ((uint16_t)0x0001)²"TIM_CCER_CC1P ((uint16_t)0x0002)³"TIM_CCER_CC1NE ((uint16_t)0x0004)´"TIM_CCER_CC1NP ((uint16_t)0x0008)µ"TIM_CCER_CC2E ((uint16_t)0x0010)¶"TIM_CCER_CC2P ((uint16_t)0x0020)·"TIM_CCER_CC2NE ((uint16_t)0x0040)¸"TIM_CCER_CC2NP ((uint16_t)0x0080)¹"TIM_CCER_CC3E ((uint16_t)0x0100)º"TIM_CCER_CC3P ((uint16_t)0x0200)»"TIM_CCER_CC3NE ((uint16_t)0x0400)¼"TIM_CCER_CC3NP ((uint16_t)0x0800)½"TIM_CCER_CC4E ((uint16_t)0x1000)¾"TIM_CCER_CC4P ((uint16_t)0x2000)¿"TIM_CCER_CC4NP ((uint16_t)0x8000)Â"TIM_CNT_CNT ((uint16_t)0xFFFF)Å"TIM_PSC_PSC ((uint16_t)0xFFFF)È"TIM_ARR_ARR ((uint16_t)0xFFFF)Ë"TIM_RCR_REP ((uint8_t)0xFF)Î"TIM_CCR1_CCR1 ((uint16_t)0xFFFF)Ñ"TIM_CCR2_CCR2 ((uint16_t)0xFFFF)Ô"TIM_CCR3_CCR3 ((uint16_t)0xFFFF)×"TIM_CCR4_CCR4 ((uint16_t)0xFFFF)Ú"TIM_BDTR_DTG ((uint16_t)0x00FF)Û"TIM_BDTR_DTG_0 ((uint16_t)0x0001)Ü"TIM_BDTR_DTG_1 ((uint16_t)0x0002)Ý"TIM_BDTR_DTG_2 ((uint16_t)0x0004)Þ"TIM_BDTR_DTG_3 ((uint16_t)0x0008)ß"TIM_BDTR_DTG_4 ((uint16_t)0x0010)à"TIM_BDTR_DTG_5 ((uint16_t)0x0020)á"TIM_BDTR_DTG_6 ((uint16_t)0x0040)â"TIM_BDTR_DTG_7 ((uint16_t)0x0080)ä"TIM_BDTR_LOCK ((uint16_t)0x0300)å"TIM_BDTR_LOCK_0 ((uint16_t)0x0100)æ"TIM_BDTR_LOCK_1 ((uint16_t)0x0200)è"TIM_BDTR_OSSI ((uint16_t)0x0400)é"TIM_BDTR_OSSR ((uint16_t)0x0800)ê"TIM_BDTR_BKE ((uint16_t)0x1000)ë"TIM_BDTR_BKP ((uint16_t)0x2000)ì"TIM_BDTR_AOE ((uint16_t)0x4000)í"TIM_BDTR_MOE ((uint16_t)0x8000)ð"TIM_DCR_DBA ((uint16_t)0x001F)ñ"TIM_DCR_DBA_0 ((uint16_t)0x0001)ò"TIM_DCR_DBA_1 ((uint16_t)0x0002)ó"TIM_DCR_DBA_2 ((uint16_t)0x0004)ô"TIM_DCR_DBA_3 ((uint16_t)0x0008)õ"TIM_DCR_DBA_4 ((uint16_t)0x0010)÷"TIM_DCR_DBL ((uint16_t)0x1F00)ø"TIM_DCR_DBL_0 ((uint16_t)0x0100)ù"TIM_DCR_DBL_1 ((uint16_t)0x0200)ú"TIM_DCR_DBL_2 ((uint16_t)0x0400)û"TIM_DCR_DBL_3 ((uint16_t)0x0800)ü"TIM_DCR_DBL_4 ((uint16_t)0x1000)ÿ"TIM_DMAR_DMAB ((uint16_t)0xFFFF)#RTC_CRH_SECIE ((uint8_t)0x01)#RTC_CRH_ALRIE ((uint8_t)0x02)#RTC_CRH_OWIE ((uint8_t)0x04)#RTC_CRL_SECF ((uint8_t)0x01)#RTC_CRL_ALRF ((uint8_t)0x02)#RTC_CRL_OWF ((uint8_t)0x04)#RTC_CRL_RSF ((uint8_t)0x08)#RTC_CRL_CNF ((uint8_t)0x10)#RTC_CRL_RTOFF ((uint8_t)0x20)#RTC_PRLH_PRL ((uint16_t)0x000F)#RTC_PRLL_PRL ((uint16_t)0xFFFF)#RTC_DIVH_RTC_DIV ((uint16_t)0x000F)#RTC_DIVL_RTC_DIV ((uint16_t)0xFFFF)¡#RTC_CNTH_RTC_CNT ((uint16_t)0xFFFF)¤#RTC_CNTL_RTC_CNT ((uint16_t)0xFFFF)§#RTC_ALRH_RTC_ALR ((uint16_t)0xFFFF)ª#RTC_ALRL_RTC_ALR ((uint16_t)0xFFFF)³#IWDG_KR_KEY ((uint16_t)0xFFFF)¶#IWDG_PR_PR ((uint8_t)0x07)·#IWDG_PR_PR_0 ((uint8_t)0x01)¸#IWDG_PR_PR_1 ((uint8_t)0x02)¹#IWDG_PR_PR_2 ((uint8_t)0x04)¼#IWDG_RLR_RL ((uint16_t)0x0FFF)¿#IWDG_SR_PVU ((uint8_t)0x01)À#IWDG_SR_RVU ((uint8_t)0x02)É#WWDG_CR_T ((uint8_t)0x7F)Ê#WWDG_CR_T0 ((uint8_t)0x01)Ë#WWDG_CR_T1 ((uint8_t)0x02)Ì#WWDG_CR_T2 ((uint8_t)0x04)Í#WWDG_CR_T3 ((uint8_t)0x08)Î#WWDG_CR_T4 ((uint8_t)0x10)Ï#WWDG_CR_T5 ((uint8_t)0x20)Ð#WWDG_CR_T6 ((uint8_t)0x40)Ò#WWDG_CR_WDGA ((uint8_t)0x80)Õ#WWDG_CFR_W ((uint16_t)0x007F)Ö#WWDG_CFR_W0 ((uint16_t)0x0001)×#WWDG_CFR_W1 ((uint16_t)0x0002)Ø#WWDG_CFR_W2 ((uint16_t)0x0004)Ù#WWDG_CFR_W3 ((uint16_t)0x0008)Ú#WWDG_CFR_W4 ((uint16_t)0x0010)Û#WWDG_CFR_W5 ((uint16_t)0x0020)Ü#WWDG_CFR_W6 ((uint16_t)0x0040)Þ#WWDG_CFR_WDGTB ((uint16_t)0x0180)ß#WWDG_CFR_WDGTB0 ((uint16_t)0x0080)à#WWDG_CFR_WDGTB1 ((uint16_t)0x0100)â#WWDG_CFR_EWI ((uint16_t)0x0200)å#WWDG_SR_EWIF ((uint8_t)0x01)î#FSMC_BCR1_MBKEN ((uint32_t)0x00000001)ï#FSMC_BCR1_MUXEN ((uint32_t)0x00000002)ñ#FSMC_BCR1_MTYP ((uint32_t)0x0000000C)ò#FSMC_BCR1_MTYP_0 ((uint32_t)0x00000004)ó#FSMC_BCR1_MTYP_1 ((uint32_t)0x00000008)õ#FSMC_BCR1_MWID ((uint32_t)0x00000030)ö#FSMC_BCR1_MWID_0 ((uint32_t)0x00000010)÷#FSMC_BCR1_MWID_1 ((uint32_t)0x00000020)ù#FSMC_BCR1_FACCEN ((uint32_t)0x00000040)ú#FSMC_BCR1_BURSTEN ((uint32_t)0x00000100)û#FSMC_BCR1_WAITPOL ((uint32_t)0x00000200)ü#FSMC_BCR1_WRAPMOD ((uint32_t)0x00000400)ý#FSMC_BCR1_WAITCFG ((uint32_t)0x00000800)þ#FSMC_BCR1_WREN ((uint32_t)0x00001000)ÿ#FSMC_BCR1_WAITEN ((uint32_t)0x00002000)$FSMC_BCR1_EXTMOD ((uint32_t)0x00004000)$FSMC_BCR1_ASYNCWAIT ((uint32_t)0x00008000)$FSMC_BCR1_CBURSTRW ((uint32_t)0x00080000)$FSMC_BCR2_MBKEN ((uint32_t)0x00000001)$FSMC_BCR2_MUXEN ((uint32_t)0x00000002)$FSMC_BCR2_MTYP ((uint32_t)0x0000000C)$FSMC_BCR2_MTYP_0 ((uint32_t)0x00000004)$FSMC_BCR2_MTYP_1 ((uint32_t)0x00000008)$FSMC_BCR2_MWID ((uint32_t)0x00000030)$FSMC_BCR2_MWID_0 ((uint32_t)0x00000010)$FSMC_BCR2_MWID_1 ((uint32_t)0x00000020)$FSMC_BCR2_FACCEN ((uint32_t)0x00000040)$FSMC_BCR2_BURSTEN ((uint32_t)0x00000100)$FSMC_BCR2_WAITPOL ((uint32_t)0x00000200)$FSMC_BCR2_WRAPMOD ((uint32_t)0x00000400)$FSMC_BCR2_WAITCFG ((uint32_t)0x00000800)$FSMC_BCR2_WREN ((uint32_t)0x00001000)$FSMC_BCR2_WAITEN ((uint32_t)0x00002000)$FSMC_BCR2_EXTMOD ((uint32_t)0x00004000)$FSMC_BCR2_ASYNCWAIT ((uint32_t)0x00008000)$FSMC_BCR2_CBURSTRW ((uint32_t)0x00080000)$FSMC_BCR3_MBKEN ((uint32_t)0x00000001)$FSMC_BCR3_MUXEN ((uint32_t)0x00000002)$FSMC_BCR3_MTYP ((uint32_t)0x0000000C) $FSMC_BCR3_MTYP_0 ((uint32_t)0x00000004)¡$FSMC_BCR3_MTYP_1 ((uint32_t)0x00000008)£$FSMC_BCR3_MWID ((uint32_t)0x00000030)¤$FSMC_BCR3_MWID_0 ((uint32_t)0x00000010)¥$FSMC_BCR3_MWID_1 ((uint32_t)0x00000020)§$FSMC_BCR3_FACCEN ((uint32_t)0x00000040)¨$FSMC_BCR3_BURSTEN ((uint32_t)0x00000100)©$FSMC_BCR3_WAITPOL ((uint32_t)0x00000200)ª$FSMC_BCR3_WRAPMOD ((uint32_t)0x00000400)«$FSMC_BCR3_WAITCFG ((uint32_t)0x00000800)¬$FSMC_BCR3_WREN ((uint32_t)0x00001000)$FSMC_BCR3_WAITEN ((uint32_t)0x00002000)®$FSMC_BCR3_EXTMOD ((uint32_t)0x00004000)¯$FSMC_BCR3_ASYNCWAIT ((uint32_t)0x00008000)°$FSMC_BCR3_CBURSTRW ((uint32_t)0x00080000)³$FSMC_BCR4_MBKEN ((uint32_t)0x00000001)´$FSMC_BCR4_MUXEN ((uint32_t)0x00000002)¶$FSMC_BCR4_MTYP ((uint32_t)0x0000000C)·$FSMC_BCR4_MTYP_0 ((uint32_t)0x00000004)¸$FSMC_BCR4_MTYP_1 ((uint32_t)0x00000008)º$FSMC_BCR4_MWID ((uint32_t)0x00000030)»$FSMC_BCR4_MWID_0 ((uint32_t)0x00000010)¼$FSMC_BCR4_MWID_1 ((uint32_t)0x00000020)¾$FSMC_BCR4_FACCEN ((uint32_t)0x00000040)¿$FSMC_BCR4_BURSTEN ((uint32_t)0x00000100)À$FSMC_BCR4_WAITPOL ((uint32_t)0x00000200)Á$FSMC_BCR4_WRAPMOD ((uint32_t)0x00000400)Â$FSMC_BCR4_WAITCFG ((uint32_t)0x00000800)Ã$FSMC_BCR4_WREN ((uint32_t)0x00001000)Ä$FSMC_BCR4_WAITEN ((uint32_t)0x00002000)Å$FSMC_BCR4_EXTMOD ((uint32_t)0x00004000)Æ$FSMC_BCR4_ASYNCWAIT ((uint32_t)0x00008000)Ç$FSMC_BCR4_CBURSTRW ((uint32_t)0x00080000)Ê$FSMC_BTR1_ADDSET ((uint32_t)0x0000000F)Ë$FSMC_BTR1_ADDSET_0 ((uint32_t)0x00000001)Ì$FSMC_BTR1_ADDSET_1 ((uint32_t)0x00000002)Í$FSMC_BTR1_ADDSET_2 ((uint32_t)0x00000004)Î$FSMC_BTR1_ADDSET_3 ((uint32_t)0x00000008)Ð$FSMC_BTR1_ADDHLD ((uint32_t)0x000000F0)Ñ$FSMC_BTR1_ADDHLD_0 ((uint32_t)0x00000010)Ò$FSMC_BTR1_ADDHLD_1 ((uint32_t)0x00000020)Ó$FSMC_BTR1_ADDHLD_2 ((uint32_t)0x00000040)Ô$FSMC_BTR1_ADDHLD_3 ((uint32_t)0x00000080)Ö$FSMC_BTR1_DATAST ((uint32_t)0x0000FF00)×$FSMC_BTR1_DATAST_0 ((uint32_t)0x00000100)Ø$FSMC_BTR1_DATAST_1 ((uint32_t)0x00000200)Ù$FSMC_BTR1_DATAST_2 ((uint32_t)0x00000400)Ú$FSMC_BTR1_DATAST_3 ((uint32_t)0x00000800)Ü$FSMC_BTR1_BUSTURN ((uint32_t)0x000F0000)Ý$FSMC_BTR1_BUSTURN_0 ((uint32_t)0x00010000)Þ$FSMC_BTR1_BUSTURN_1 ((uint32_t)0x00020000)ß$FSMC_BTR1_BUSTURN_2 ((uint32_t)0x00040000)à$FSMC_BTR1_BUSTURN_3 ((uint32_t)0x00080000)â$FSMC_BTR1_CLKDIV ((uint32_t)0x00F00000)ã$FSMC_BTR1_CLKDIV_0 ((uint32_t)0x00100000)ä$FSMC_BTR1_CLKDIV_1 ((uint32_t)0x00200000)å$FSMC_BTR1_CLKDIV_2 ((uint32_t)0x00400000)æ$FSMC_BTR1_CLKDIV_3 ((uint32_t)0x00800000)è$FSMC_BTR1_DATLAT ((uint32_t)0x0F000000)é$FSMC_BTR1_DATLAT_0 ((uint32_t)0x01000000)ê$FSMC_BTR1_DATLAT_1 ((uint32_t)0x02000000)ë$FSMC_BTR1_DATLAT_2 ((uint32_t)0x04000000)ì$FSMC_BTR1_DATLAT_3 ((uint32_t)0x08000000)î$FSMC_BTR1_ACCMOD ((uint32_t)0x30000000)ï$FSMC_BTR1_ACCMOD_0 ((uint32_t)0x10000000)ð$FSMC_BTR1_ACCMOD_1 ((uint32_t)0x20000000)ó$FSMC_BTR2_ADDSET ((uint32_t)0x0000000F)ô$FSMC_BTR2_ADDSET_0 ((uint32_t)0x00000001)õ$FSMC_BTR2_ADDSET_1 ((uint32_t)0x00000002)ö$FSMC_BTR2_ADDSET_2 ((uint32_t)0x00000004)÷$FSMC_BTR2_ADDSET_3 ((uint32_t)0x00000008)ù$FSMC_BTR2_ADDHLD ((uint32_t)0x000000F0)ú$FSMC_BTR2_ADDHLD_0 ((uint32_t)0x00000010)û$FSMC_BTR2_ADDHLD_1 ((uint32_t)0x00000020)ü$FSMC_BTR2_ADDHLD_2 ((uint32_t)0x00000040)ý$FSMC_BTR2_ADDHLD_3 ((uint32_t)0x00000080)ÿ$FSMC_BTR2_DATAST ((uint32_t)0x0000FF00)%FSMC_BTR2_DATAST_0 ((uint32_t)0x00000100)%FSMC_BTR2_DATAST_1 ((uint32_t)0x00000200)%FSMC_BTR2_DATAST_2 ((uint32_t)0x00000400)%FSMC_BTR2_DATAST_3 ((uint32_t)0x00000800)%FSMC_BTR2_BUSTURN ((uint32_t)0x000F0000)%FSMC_BTR2_BUSTURN_0 ((uint32_t)0x00010000)%FSMC_BTR2_BUSTURN_1 ((uint32_t)0x00020000)%FSMC_BTR2_BUSTURN_2 ((uint32_t)0x00040000)%FSMC_BTR2_BUSTURN_3 ((uint32_t)0x00080000)%FSMC_BTR2_CLKDIV ((uint32_t)0x00F00000)%FSMC_BTR2_CLKDIV_0 ((uint32_t)0x00100000)%FSMC_BTR2_CLKDIV_1 ((uint32_t)0x00200000)%FSMC_BTR2_CLKDIV_2 ((uint32_t)0x00400000)%FSMC_BTR2_CLKDIV_3 ((uint32_t)0x00800000)%FSMC_BTR2_DATLAT ((uint32_t)0x0F000000)%FSMC_BTR2_DATLAT_0 ((uint32_t)0x01000000)%FSMC_BTR2_DATLAT_1 ((uint32_t)0x02000000)%FSMC_BTR2_DATLAT_2 ((uint32_t)0x04000000)%FSMC_BTR2_DATLAT_3 ((uint32_t)0x08000000)%FSMC_BTR2_ACCMOD ((uint32_t)0x30000000)%FSMC_BTR2_ACCMOD_0 ((uint32_t)0x10000000)%FSMC_BTR2_ACCMOD_1 ((uint32_t)0x20000000)%FSMC_BTR3_ADDSET ((uint32_t)0x0000000F)%FSMC_BTR3_ADDSET_0 ((uint32_t)0x00000001)%FSMC_BTR3_ADDSET_1 ((uint32_t)0x00000002)%FSMC_BTR3_ADDSET_2 ((uint32_t)0x00000004) %FSMC_BTR3_ADDSET_3 ((uint32_t)0x00000008)¢%FSMC_BTR3_ADDHLD ((uint32_t)0x000000F0)£%FSMC_BTR3_ADDHLD_0 ((uint32_t)0x00000010)¤%FSMC_BTR3_ADDHLD_1 ((uint32_t)0x00000020)¥%FSMC_BTR3_ADDHLD_2 ((uint32_t)0x00000040)¦%FSMC_BTR3_ADDHLD_3 ((uint32_t)0x00000080)¨%FSMC_BTR3_DATAST ((uint32_t)0x0000FF00)©%FSMC_BTR3_DATAST_0 ((uint32_t)0x00000100)ª%FSMC_BTR3_DATAST_1 ((uint32_t)0x00000200)«%FSMC_BTR3_DATAST_2 ((uint32_t)0x00000400)¬%FSMC_BTR3_DATAST_3 ((uint32_t)0x00000800)®%FSMC_BTR3_BUSTURN ((uint32_t)0x000F0000)¯%FSMC_BTR3_BUSTURN_0 ((uint32_t)0x00010000)°%FSMC_BTR3_BUSTURN_1 ((uint32_t)0x00020000)±%FSMC_BTR3_BUSTURN_2 ((uint32_t)0x00040000)²%FSMC_BTR3_BUSTURN_3 ((uint32_t)0x00080000)´%FSMC_BTR3_CLKDIV ((uint32_t)0x00F00000)µ%FSMC_BTR3_CLKDIV_0 ((uint32_t)0x00100000)¶%FSMC_BTR3_CLKDIV_1 ((uint32_t)0x00200000)·%FSMC_BTR3_CLKDIV_2 ((uint32_t)0x00400000)¸%FSMC_BTR3_CLKDIV_3 ((uint32_t)0x00800000)º%FSMC_BTR3_DATLAT ((uint32_t)0x0F000000)»%FSMC_BTR3_DATLAT_0 ((uint32_t)0x01000000)¼%FSMC_BTR3_DATLAT_1 ((uint32_t)0x02000000)½%FSMC_BTR3_DATLAT_2 ((uint32_t)0x04000000)¾%FSMC_BTR3_DATLAT_3 ((uint32_t)0x08000000)À%FSMC_BTR3_ACCMOD ((uint32_t)0x30000000)Á%FSMC_BTR3_ACCMOD_0 ((uint32_t)0x10000000)Â%FSMC_BTR3_ACCMOD_1 ((uint32_t)0x20000000)Å%FSMC_BTR4_ADDSET ((uint32_t)0x0000000F)Æ%FSMC_BTR4_ADDSET_0 ((uint32_t)0x00000001)Ç%FSMC_BTR4_ADDSET_1 ((uint32_t)0x00000002)È%FSMC_BTR4_ADDSET_2 ((uint32_t)0x00000004)É%FSMC_BTR4_ADDSET_3 ((uint32_t)0x00000008)Ë%FSMC_BTR4_ADDHLD ((uint32_t)0x000000F0)Ì%FSMC_BTR4_ADDHLD_0 ((uint32_t)0x00000010)Í%FSMC_BTR4_ADDHLD_1 ((uint32_t)0x00000020)Î%FSMC_BTR4_ADDHLD_2 ((uint32_t)0x00000040)Ï%FSMC_BTR4_ADDHLD_3 ((uint32_t)0x00000080)Ñ%FSMC_BTR4_DATAST ((uint32_t)0x0000FF00)Ò%FSMC_BTR4_DATAST_0 ((uint32_t)0x00000100)Ó%FSMC_BTR4_DATAST_1 ((uint32_t)0x00000200)Ô%FSMC_BTR4_DATAST_2 ((uint32_t)0x00000400)Õ%FSMC_BTR4_DATAST_3 ((uint32_t)0x00000800)×%FSMC_BTR4_BUSTURN ((uint32_t)0x000F0000)Ø%FSMC_BTR4_BUSTURN_0 ((uint32_t)0x00010000)Ù%FSMC_BTR4_BUSTURN_1 ((uint32_t)0x00020000)Ú%FSMC_BTR4_BUSTURN_2 ((uint32_t)0x00040000)Û%FSMC_BTR4_BUSTURN_3 ((uint32_t)0x00080000)Ý%FSMC_BTR4_CLKDIV ((uint32_t)0x00F00000)Þ%FSMC_BTR4_CLKDIV_0 ((uint32_t)0x00100000)ß%FSMC_BTR4_CLKDIV_1 ((uint32_t)0x00200000)à%FSMC_BTR4_CLKDIV_2 ((uint32_t)0x00400000)á%FSMC_BTR4_CLKDIV_3 ((uint32_t)0x00800000)ã%FSMC_BTR4_DATLAT ((uint32_t)0x0F000000)ä%FSMC_BTR4_DATLAT_0 ((uint32_t)0x01000000)å%FSMC_BTR4_DATLAT_1 ((uint32_t)0x02000000)æ%FSMC_BTR4_DATLAT_2 ((uint32_t)0x04000000)ç%FSMC_BTR4_DATLAT_3 ((uint32_t)0x08000000)é%FSMC_BTR4_ACCMOD ((uint32_t)0x30000000)ê%FSMC_BTR4_ACCMOD_0 ((uint32_t)0x10000000)ë%FSMC_BTR4_ACCMOD_1 ((uint32_t)0x20000000)î%FSMC_BWTR1_ADDSET ((uint32_t)0x0000000F)ï%FSMC_BWTR1_ADDSET_0 ((uint32_t)0x00000001)ð%FSMC_BWTR1_ADDSET_1 ((uint32_t)0x00000002)ñ%FSMC_BWTR1_ADDSET_2 ((uint32_t)0x00000004)ò%FSMC_BWTR1_ADDSET_3 ((uint32_t)0x00000008)ô%FSMC_BWTR1_ADDHLD ((uint32_t)0x000000F0)õ%FSMC_BWTR1_ADDHLD_0 ((uint32_t)0x00000010)ö%FSMC_BWTR1_ADDHLD_1 ((uint32_t)0x00000020)÷%FSMC_BWTR1_ADDHLD_2 ((uint32_t)0x00000040)ø%FSMC_BWTR1_ADDHLD_3 ((uint32_t)0x00000080)ú%FSMC_BWTR1_DATAST ((uint32_t)0x0000FF00)û%FSMC_BWTR1_DATAST_0 ((uint32_t)0x00000100)ü%FSMC_BWTR1_DATAST_1 ((uint32_t)0x00000200)ý%FSMC_BWTR1_DATAST_2 ((uint32_t)0x00000400)þ%FSMC_BWTR1_DATAST_3 ((uint32_t)0x00000800)&FSMC_BWTR1_CLKDIV ((uint32_t)0x00F00000)&FSMC_BWTR1_CLKDIV_0 ((uint32_t)0x00100000)&FSMC_BWTR1_CLKDIV_1 ((uint32_t)0x00200000)&FSMC_BWTR1_CLKDIV_2 ((uint32_t)0x00400000)&FSMC_BWTR1_CLKDIV_3 ((uint32_t)0x00800000)&FSMC_BWTR1_DATLAT ((uint32_t)0x0F000000)&FSMC_BWTR1_DATLAT_0 ((uint32_t)0x01000000)&FSMC_BWTR1_DATLAT_1 ((uint32_t)0x02000000)&FSMC_BWTR1_DATLAT_2 ((uint32_t)0x04000000)&FSMC_BWTR1_DATLAT_3 ((uint32_t)0x08000000)&FSMC_BWTR1_ACCMOD ((uint32_t)0x30000000)&FSMC_BWTR1_ACCMOD_0 ((uint32_t)0x10000000)&FSMC_BWTR1_ACCMOD_1 ((uint32_t)0x20000000)&FSMC_BWTR2_ADDSET ((uint32_t)0x0000000F)&FSMC_BWTR2_ADDSET_0 ((uint32_t)0x00000001)&FSMC_BWTR2_ADDSET_1 ((uint32_t)0x00000002)&FSMC_BWTR2_ADDSET_2 ((uint32_t)0x00000004)&FSMC_BWTR2_ADDSET_3 ((uint32_t)0x00000008)&FSMC_BWTR2_ADDHLD ((uint32_t)0x000000F0)&FSMC_BWTR2_ADDHLD_0 ((uint32_t)0x00000010)&FSMC_BWTR2_ADDHLD_1 ((uint32_t)0x00000020)&FSMC_BWTR2_ADDHLD_2 ((uint32_t)0x00000040)&FSMC_BWTR2_ADDHLD_3 ((uint32_t)0x00000080)&FSMC_BWTR2_DATAST ((uint32_t)0x0000FF00)&FSMC_BWTR2_DATAST_0 ((uint32_t)0x00000100)&FSMC_BWTR2_DATAST_1 ((uint32_t)0x00000200) &FSMC_BWTR2_DATAST_2 ((uint32_t)0x00000400)¡&FSMC_BWTR2_DATAST_3 ((uint32_t)0x00000800)£&FSMC_BWTR2_CLKDIV ((uint32_t)0x00F00000)¤&FSMC_BWTR2_CLKDIV_0 ((uint32_t)0x00100000)¥&FSMC_BWTR2_CLKDIV_1 ((uint32_t)0x00200000)¦&FSMC_BWTR2_CLKDIV_2 ((uint32_t)0x00400000)§&FSMC_BWTR2_CLKDIV_3 ((uint32_t)0x00800000)©&FSMC_BWTR2_DATLAT ((uint32_t)0x0F000000)ª&FSMC_BWTR2_DATLAT_0 ((uint32_t)0x01000000)«&FSMC_BWTR2_DATLAT_1 ((uint32_t)0x02000000)¬&FSMC_BWTR2_DATLAT_2 ((uint32_t)0x04000000)&FSMC_BWTR2_DATLAT_3 ((uint32_t)0x08000000)¯&FSMC_BWTR2_ACCMOD ((uint32_t)0x30000000)°&FSMC_BWTR2_ACCMOD_0 ((uint32_t)0x10000000)±&FSMC_BWTR2_ACCMOD_1 ((uint32_t)0x20000000)´&FSMC_BWTR3_ADDSET ((uint32_t)0x0000000F)µ&FSMC_BWTR3_ADDSET_0 ((uint32_t)0x00000001)¶&FSMC_BWTR3_ADDSET_1 ((uint32_t)0x00000002)·&FSMC_BWTR3_ADDSET_2 ((uint32_t)0x00000004)¸&FSMC_BWTR3_ADDSET_3 ((uint32_t)0x00000008)º&FSMC_BWTR3_ADDHLD ((uint32_t)0x000000F0)»&FSMC_BWTR3_ADDHLD_0 ((uint32_t)0x00000010)¼&FSMC_BWTR3_ADDHLD_1 ((uint32_t)0x00000020)½&FSMC_BWTR3_ADDHLD_2 ((uint32_t)0x00000040)¾&FSMC_BWTR3_ADDHLD_3 ((uint32_t)0x00000080)À&FSMC_BWTR3_DATAST ((uint32_t)0x0000FF00)Á&FSMC_BWTR3_DATAST_0 ((uint32_t)0x00000100)Â&FSMC_BWTR3_DATAST_1 ((uint32_t)0x00000200)Ã&FSMC_BWTR3_DATAST_2 ((uint32_t)0x00000400)Ä&FSMC_BWTR3_DATAST_3 ((uint32_t)0x00000800)Æ&FSMC_BWTR3_CLKDIV ((uint32_t)0x00F00000)Ç&FSMC_BWTR3_CLKDIV_0 ((uint32_t)0x00100000)È&FSMC_BWTR3_CLKDIV_1 ((uint32_t)0x00200000)É&FSMC_BWTR3_CLKDIV_2 ((uint32_t)0x00400000)Ê&FSMC_BWTR3_CLKDIV_3 ((uint32_t)0x00800000)Ì&FSMC_BWTR3_DATLAT ((uint32_t)0x0F000000)Í&FSMC_BWTR3_DATLAT_0 ((uint32_t)0x01000000)Î&FSMC_BWTR3_DATLAT_1 ((uint32_t)0x02000000)Ï&FSMC_BWTR3_DATLAT_2 ((uint32_t)0x04000000)Ð&FSMC_BWTR3_DATLAT_3 ((uint32_t)0x08000000)Ò&FSMC_BWTR3_ACCMOD ((uint32_t)0x30000000)Ó&FSMC_BWTR3_ACCMOD_0 ((uint32_t)0x10000000)Ô&FSMC_BWTR3_ACCMOD_1 ((uint32_t)0x20000000)×&FSMC_BWTR4_ADDSET ((uint32_t)0x0000000F)Ø&FSMC_BWTR4_ADDSET_0 ((uint32_t)0x00000001)Ù&FSMC_BWTR4_ADDSET_1 ((uint32_t)0x00000002)Ú&FSMC_BWTR4_ADDSET_2 ((uint32_t)0x00000004)Û&FSMC_BWTR4_ADDSET_3 ((uint32_t)0x00000008)Ý&FSMC_BWTR4_ADDHLD ((uint32_t)0x000000F0)Þ&FSMC_BWTR4_ADDHLD_0 ((uint32_t)0x00000010)ß&FSMC_BWTR4_ADDHLD_1 ((uint32_t)0x00000020)à&FSMC_BWTR4_ADDHLD_2 ((uint32_t)0x00000040)á&FSMC_BWTR4_ADDHLD_3 ((uint32_t)0x00000080)ã&FSMC_BWTR4_DATAST ((uint32_t)0x0000FF00)ä&FSMC_BWTR4_DATAST_0 ((uint32_t)0x00000100)å&FSMC_BWTR4_DATAST_1 ((uint32_t)0x00000200)æ&FSMC_BWTR4_DATAST_2 ((uint32_t)0x00000400)ç&FSMC_BWTR4_DATAST_3 ((uint32_t)0x00000800)é&FSMC_BWTR4_CLKDIV ((uint32_t)0x00F00000)ê&FSMC_BWTR4_CLKDIV_0 ((uint32_t)0x00100000)ë&FSMC_BWTR4_CLKDIV_1 ((uint32_t)0x00200000)ì&FSMC_BWTR4_CLKDIV_2 ((uint32_t)0x00400000)í&FSMC_BWTR4_CLKDIV_3 ((uint32_t)0x00800000)ï&FSMC_BWTR4_DATLAT ((uint32_t)0x0F000000)ð&FSMC_BWTR4_DATLAT_0 ((uint32_t)0x01000000)ñ&FSMC_BWTR4_DATLAT_1 ((uint32_t)0x02000000)ò&FSMC_BWTR4_DATLAT_2 ((uint32_t)0x04000000)ó&FSMC_BWTR4_DATLAT_3 ((uint32_t)0x08000000)õ&FSMC_BWTR4_ACCMOD ((uint32_t)0x30000000)ö&FSMC_BWTR4_ACCMOD_0 ((uint32_t)0x10000000)÷&FSMC_BWTR4_ACCMOD_1 ((uint32_t)0x20000000)ú&FSMC_PCR2_PWAITEN ((uint32_t)0x00000002)û&FSMC_PCR2_PBKEN ((uint32_t)0x00000004)ü&FSMC_PCR2_PTYP ((uint32_t)0x00000008)þ&FSMC_PCR2_PWID ((uint32_t)0x00000030)ÿ&FSMC_PCR2_PWID_0 ((uint32_t)0x00000010)'FSMC_PCR2_PWID_1 ((uint32_t)0x00000020)'FSMC_PCR2_ECCEN ((uint32_t)0x00000040)'FSMC_PCR2_TCLR ((uint32_t)0x00001E00)'FSMC_PCR2_TCLR_0 ((uint32_t)0x00000200)'FSMC_PCR2_TCLR_1 ((uint32_t)0x00000400)'FSMC_PCR2_TCLR_2 ((uint32_t)0x00000800)'FSMC_PCR2_TCLR_3 ((uint32_t)0x00001000)'FSMC_PCR2_TAR ((uint32_t)0x0001E000)'FSMC_PCR2_TAR_0 ((uint32_t)0x00002000)'FSMC_PCR2_TAR_1 ((uint32_t)0x00004000)'FSMC_PCR2_TAR_2 ((uint32_t)0x00008000)'FSMC_PCR2_TAR_3 ((uint32_t)0x00010000)'FSMC_PCR2_ECCPS ((uint32_t)0x000E0000)'FSMC_PCR2_ECCPS_0 ((uint32_t)0x00020000)'FSMC_PCR2_ECCPS_1 ((uint32_t)0x00040000)'FSMC_PCR2_ECCPS_2 ((uint32_t)0x00080000)'FSMC_PCR3_PWAITEN ((uint32_t)0x00000002)'FSMC_PCR3_PBKEN ((uint32_t)0x00000004)'FSMC_PCR3_PTYP ((uint32_t)0x00000008)'FSMC_PCR3_PWID ((uint32_t)0x00000030)'FSMC_PCR3_PWID_0 ((uint32_t)0x00000010)'FSMC_PCR3_PWID_1 ((uint32_t)0x00000020)'FSMC_PCR3_ECCEN ((uint32_t)0x00000040) 'FSMC_PCR3_TCLR ((uint32_t)0x00001E00)¡'FSMC_PCR3_TCLR_0 ((uint32_t)0x00000200)¢'FSMC_PCR3_TCLR_1 ((uint32_t)0x00000400)£'FSMC_PCR3_TCLR_2 ((uint32_t)0x00000800)¤'FSMC_PCR3_TCLR_3 ((uint32_t)0x00001000)¦'FSMC_PCR3_TAR ((uint32_t)0x0001E000)§'FSMC_PCR3_TAR_0 ((uint32_t)0x00002000)¨'FSMC_PCR3_TAR_1 ((uint32_t)0x00004000)©'FSMC_PCR3_TAR_2 ((uint32_t)0x00008000)ª'FSMC_PCR3_TAR_3 ((uint32_t)0x00010000)¬'FSMC_PCR3_ECCPS ((uint32_t)0x000E0000)'FSMC_PCR3_ECCPS_0 ((uint32_t)0x00020000)®'FSMC_PCR3_ECCPS_1 ((uint32_t)0x00040000)¯'FSMC_PCR3_ECCPS_2 ((uint32_t)0x00080000)²'FSMC_PCR4_PWAITEN ((uint32_t)0x00000002)³'FSMC_PCR4_PBKEN ((uint32_t)0x00000004)´'FSMC_PCR4_PTYP ((uint32_t)0x00000008)¶'FSMC_PCR4_PWID ((uint32_t)0x00000030)·'FSMC_PCR4_PWID_0 ((uint32_t)0x00000010)¸'FSMC_PCR4_PWID_1 ((uint32_t)0x00000020)º'FSMC_PCR4_ECCEN ((uint32_t)0x00000040)¼'FSMC_PCR4_TCLR ((uint32_t)0x00001E00)½'FSMC_PCR4_TCLR_0 ((uint32_t)0x00000200)¾'FSMC_PCR4_TCLR_1 ((uint32_t)0x00000400)¿'FSMC_PCR4_TCLR_2 ((uint32_t)0x00000800)À'FSMC_PCR4_TCLR_3 ((uint32_t)0x00001000)Â'FSMC_PCR4_TAR ((uint32_t)0x0001E000)Ã'FSMC_PCR4_TAR_0 ((uint32_t)0x00002000)Ä'FSMC_PCR4_TAR_1 ((uint32_t)0x00004000)Å'FSMC_PCR4_TAR_2 ((uint32_t)0x00008000)Æ'FSMC_PCR4_TAR_3 ((uint32_t)0x00010000)È'FSMC_PCR4_ECCPS ((uint32_t)0x000E0000)É'FSMC_PCR4_ECCPS_0 ((uint32_t)0x00020000)Ê'FSMC_PCR4_ECCPS_1 ((uint32_t)0x00040000)Ë'FSMC_PCR4_ECCPS_2 ((uint32_t)0x00080000)Î'FSMC_SR2_IRS ((uint8_t)0x01)Ï'FSMC_SR2_ILS ((uint8_t)0x02)Ð'FSMC_SR2_IFS ((uint8_t)0x04)Ñ'FSMC_SR2_IREN ((uint8_t)0x08)Ò'FSMC_SR2_ILEN ((uint8_t)0x10)Ó'FSMC_SR2_IFEN ((uint8_t)0x20)Ô'FSMC_SR2_FEMPT ((uint8_t)0x40)×'FSMC_SR3_IRS ((uint8_t)0x01)Ø'FSMC_SR3_ILS ((uint8_t)0x02)Ù'FSMC_SR3_IFS ((uint8_t)0x04)Ú'FSMC_SR3_IREN ((uint8_t)0x08)Û'FSMC_SR3_ILEN ((uint8_t)0x10)Ü'FSMC_SR3_IFEN ((uint8_t)0x20)Ý'FSMC_SR3_FEMPT ((uint8_t)0x40)à'FSMC_SR4_IRS ((uint8_t)0x01)á'FSMC_SR4_ILS ((uint8_t)0x02)â'FSMC_SR4_IFS ((uint8_t)0x04)ã'FSMC_SR4_IREN ((uint8_t)0x08)ä'FSMC_SR4_ILEN ((uint8_t)0x10)å'FSMC_SR4_IFEN ((uint8_t)0x20)æ'FSMC_SR4_FEMPT ((uint8_t)0x40)é'FSMC_PMEM2_MEMSET2 ((uint32_t)0x000000FF)ê'FSMC_PMEM2_MEMSET2_0 ((uint32_t)0x00000001)ë'FSMC_PMEM2_MEMSET2_1 ((uint32_t)0x00000002)ì'FSMC_PMEM2_MEMSET2_2 ((uint32_t)0x00000004)í'FSMC_PMEM2_MEMSET2_3 ((uint32_t)0x00000008)î'FSMC_PMEM2_MEMSET2_4 ((uint32_t)0x00000010)ï'FSMC_PMEM2_MEMSET2_5 ((uint32_t)0x00000020)ð'FSMC_PMEM2_MEMSET2_6 ((uint32_t)0x00000040)ñ'FSMC_PMEM2_MEMSET2_7 ((uint32_t)0x00000080)ó'FSMC_PMEM2_MEMWAIT2 ((uint32_t)0x0000FF00)ô'FSMC_PMEM2_MEMWAIT2_0 ((uint32_t)0x00000100)õ'FSMC_PMEM2_MEMWAIT2_1 ((uint32_t)0x00000200)ö'FSMC_PMEM2_MEMWAIT2_2 ((uint32_t)0x00000400)÷'FSMC_PMEM2_MEMWAIT2_3 ((uint32_t)0x00000800)ø'FSMC_PMEM2_MEMWAIT2_4 ((uint32_t)0x00001000)ù'FSMC_PMEM2_MEMWAIT2_5 ((uint32_t)0x00002000)ú'FSMC_PMEM2_MEMWAIT2_6 ((uint32_t)0x00004000)û'FSMC_PMEM2_MEMWAIT2_7 ((uint32_t)0x00008000)ý'FSMC_PMEM2_MEMHOLD2 ((uint32_t)0x00FF0000)þ'FSMC_PMEM2_MEMHOLD2_0 ((uint32_t)0x00010000)ÿ'FSMC_PMEM2_MEMHOLD2_1 ((uint32_t)0x00020000)(FSMC_PMEM2_MEMHOLD2_2 ((uint32_t)0x00040000)(FSMC_PMEM2_MEMHOLD2_3 ((uint32_t)0x00080000)(FSMC_PMEM2_MEMHOLD2_4 ((uint32_t)0x00100000)(FSMC_PMEM2_MEMHOLD2_5 ((uint32_t)0x00200000)(FSMC_PMEM2_MEMHOLD2_6 ((uint32_t)0x00400000)(FSMC_PMEM2_MEMHOLD2_7 ((uint32_t)0x00800000)(FSMC_PMEM2_MEMHIZ2 ((uint32_t)0xFF000000)(FSMC_PMEM2_MEMHIZ2_0 ((uint32_t)0x01000000)(FSMC_PMEM2_MEMHIZ2_1 ((uint32_t)0x02000000)(FSMC_PMEM2_MEMHIZ2_2 ((uint32_t)0x04000000)(FSMC_PMEM2_MEMHIZ2_3 ((uint32_t)0x08000000)(FSMC_PMEM2_MEMHIZ2_4 ((uint32_t)0x10000000)(FSMC_PMEM2_MEMHIZ2_5 ((uint32_t)0x20000000)(FSMC_PMEM2_MEMHIZ2_6 ((uint32_t)0x40000000)(FSMC_PMEM2_MEMHIZ2_7 ((uint32_t)0x80000000)(FSMC_PMEM3_MEMSET3 ((uint32_t)0x000000FF)(FSMC_PMEM3_MEMSET3_0 ((uint32_t)0x00000001)(FSMC_PMEM3_MEMSET3_1 ((uint32_t)0x00000002)(FSMC_PMEM3_MEMSET3_2 ((uint32_t)0x00000004)(FSMC_PMEM3_MEMSET3_3 ((uint32_t)0x00000008)(FSMC_PMEM3_MEMSET3_4 ((uint32_t)0x00000010)(FSMC_PMEM3_MEMSET3_5 ((uint32_t)0x00000020)(FSMC_PMEM3_MEMSET3_6 ((uint32_t)0x00000040)(FSMC_PMEM3_MEMSET3_7 ((uint32_t)0x00000080)(FSMC_PMEM3_MEMWAIT3 ((uint32_t)0x0000FF00)(FSMC_PMEM3_MEMWAIT3_0 ((uint32_t)0x00000100)(FSMC_PMEM3_MEMWAIT3_1 ((uint32_t)0x00000200)(FSMC_PMEM3_MEMWAIT3_2 ((uint32_t)0x00000400) (FSMC_PMEM3_MEMWAIT3_3 ((uint32_t)0x00000800)¡(FSMC_PMEM3_MEMWAIT3_4 ((uint32_t)0x00001000)¢(FSMC_PMEM3_MEMWAIT3_5 ((uint32_t)0x00002000)£(FSMC_PMEM3_MEMWAIT3_6 ((uint32_t)0x00004000)¤(FSMC_PMEM3_MEMWAIT3_7 ((uint32_t)0x00008000)¦(FSMC_PMEM3_MEMHOLD3 ((uint32_t)0x00FF0000)§(FSMC_PMEM3_MEMHOLD3_0 ((uint32_t)0x00010000)¨(FSMC_PMEM3_MEMHOLD3_1 ((uint32_t)0x00020000)©(FSMC_PMEM3_MEMHOLD3_2 ((uint32_t)0x00040000)ª(FSMC_PMEM3_MEMHOLD3_3 ((uint32_t)0x00080000)«(FSMC_PMEM3_MEMHOLD3_4 ((uint32_t)0x00100000)¬(FSMC_PMEM3_MEMHOLD3_5 ((uint32_t)0x00200000)(FSMC_PMEM3_MEMHOLD3_6 ((uint32_t)0x00400000)®(FSMC_PMEM3_MEMHOLD3_7 ((uint32_t)0x00800000)°(FSMC_PMEM3_MEMHIZ3 ((uint32_t)0xFF000000)±(FSMC_PMEM3_MEMHIZ3_0 ((uint32_t)0x01000000)²(FSMC_PMEM3_MEMHIZ3_1 ((uint32_t)0x02000000)³(FSMC_PMEM3_MEMHIZ3_2 ((uint32_t)0x04000000)´(FSMC_PMEM3_MEMHIZ3_3 ((uint32_t)0x08000000)µ(FSMC_PMEM3_MEMHIZ3_4 ((uint32_t)0x10000000)¶(FSMC_PMEM3_MEMHIZ3_5 ((uint32_t)0x20000000)·(FSMC_PMEM3_MEMHIZ3_6 ((uint32_t)0x40000000)¸(FSMC_PMEM3_MEMHIZ3_7 ((uint32_t)0x80000000)»(FSMC_PMEM4_MEMSET4 ((uint32_t)0x000000FF)¼(FSMC_PMEM4_MEMSET4_0 ((uint32_t)0x00000001)½(FSMC_PMEM4_MEMSET4_1 ((uint32_t)0x00000002)¾(FSMC_PMEM4_MEMSET4_2 ((uint32_t)0x00000004)¿(FSMC_PMEM4_MEMSET4_3 ((uint32_t)0x00000008)À(FSMC_PMEM4_MEMSET4_4 ((uint32_t)0x00000010)Á(FSMC_PMEM4_MEMSET4_5 ((uint32_t)0x00000020)Â(FSMC_PMEM4_MEMSET4_6 ((uint32_t)0x00000040)Ã(FSMC_PMEM4_MEMSET4_7 ((uint32_t)0x00000080)Å(FSMC_PMEM4_MEMWAIT4 ((uint32_t)0x0000FF00)Æ(FSMC_PMEM4_MEMWAIT4_0 ((uint32_t)0x00000100)Ç(FSMC_PMEM4_MEMWAIT4_1 ((uint32_t)0x00000200)È(FSMC_PMEM4_MEMWAIT4_2 ((uint32_t)0x00000400)É(FSMC_PMEM4_MEMWAIT4_3 ((uint32_t)0x00000800)Ê(FSMC_PMEM4_MEMWAIT4_4 ((uint32_t)0x00001000)Ë(FSMC_PMEM4_MEMWAIT4_5 ((uint32_t)0x00002000)Ì(FSMC_PMEM4_MEMWAIT4_6 ((uint32_t)0x00004000)Í(FSMC_PMEM4_MEMWAIT4_7 ((uint32_t)0x00008000)Ï(FSMC_PMEM4_MEMHOLD4 ((uint32_t)0x00FF0000)Ð(FSMC_PMEM4_MEMHOLD4_0 ((uint32_t)0x00010000)Ñ(FSMC_PMEM4_MEMHOLD4_1 ((uint32_t)0x00020000)Ò(FSMC_PMEM4_MEMHOLD4_2 ((uint32_t)0x00040000)Ó(FSMC_PMEM4_MEMHOLD4_3 ((uint32_t)0x00080000)Ô(FSMC_PMEM4_MEMHOLD4_4 ((uint32_t)0x00100000)Õ(FSMC_PMEM4_MEMHOLD4_5 ((uint32_t)0x00200000)Ö(FSMC_PMEM4_MEMHOLD4_6 ((uint32_t)0x00400000)×(FSMC_PMEM4_MEMHOLD4_7 ((uint32_t)0x00800000)Ù(FSMC_PMEM4_MEMHIZ4 ((uint32_t)0xFF000000)Ú(FSMC_PMEM4_MEMHIZ4_0 ((uint32_t)0x01000000)Û(FSMC_PMEM4_MEMHIZ4_1 ((uint32_t)0x02000000)Ü(FSMC_PMEM4_MEMHIZ4_2 ((uint32_t)0x04000000)Ý(FSMC_PMEM4_MEMHIZ4_3 ((uint32_t)0x08000000)Þ(FSMC_PMEM4_MEMHIZ4_4 ((uint32_t)0x10000000)ß(FSMC_PMEM4_MEMHIZ4_5 ((uint32_t)0x20000000)à(FSMC_PMEM4_MEMHIZ4_6 ((uint32_t)0x40000000)á(FSMC_PMEM4_MEMHIZ4_7 ((uint32_t)0x80000000)ä(FSMC_PATT2_ATTSET2 ((uint32_t)0x000000FF)å(FSMC_PATT2_ATTSET2_0 ((uint32_t)0x00000001)æ(FSMC_PATT2_ATTSET2_1 ((uint32_t)0x00000002)ç(FSMC_PATT2_ATTSET2_2 ((uint32_t)0x00000004)è(FSMC_PATT2_ATTSET2_3 ((uint32_t)0x00000008)é(FSMC_PATT2_ATTSET2_4 ((uint32_t)0x00000010)ê(FSMC_PATT2_ATTSET2_5 ((uint32_t)0x00000020)ë(FSMC_PATT2_ATTSET2_6 ((uint32_t)0x00000040)ì(FSMC_PATT2_ATTSET2_7 ((uint32_t)0x00000080)î(FSMC_PATT2_ATTWAIT2 ((uint32_t)0x0000FF00)ï(FSMC_PATT2_ATTWAIT2_0 ((uint32_t)0x00000100)ð(FSMC_PATT2_ATTWAIT2_1 ((uint32_t)0x00000200)ñ(FSMC_PATT2_ATTWAIT2_2 ((uint32_t)0x00000400)ò(FSMC_PATT2_ATTWAIT2_3 ((uint32_t)0x00000800)ó(FSMC_PATT2_ATTWAIT2_4 ((uint32_t)0x00001000)ô(FSMC_PATT2_ATTWAIT2_5 ((uint32_t)0x00002000)õ(FSMC_PATT2_ATTWAIT2_6 ((uint32_t)0x00004000)ö(FSMC_PATT2_ATTWAIT2_7 ((uint32_t)0x00008000)ø(FSMC_PATT2_ATTHOLD2 ((uint32_t)0x00FF0000)ù(FSMC_PATT2_ATTHOLD2_0 ((uint32_t)0x00010000)ú(FSMC_PATT2_ATTHOLD2_1 ((uint32_t)0x00020000)û(FSMC_PATT2_ATTHOLD2_2 ((uint32_t)0x00040000)ü(FSMC_PATT2_ATTHOLD2_3 ((uint32_t)0x00080000)ý(FSMC_PATT2_ATTHOLD2_4 ((uint32_t)0x00100000)þ(FSMC_PATT2_ATTHOLD2_5 ((uint32_t)0x00200000)ÿ(FSMC_PATT2_ATTHOLD2_6 ((uint32_t)0x00400000))FSMC_PATT2_ATTHOLD2_7 ((uint32_t)0x00800000))FSMC_PATT2_ATTHIZ2 ((uint32_t)0xFF000000))FSMC_PATT2_ATTHIZ2_0 ((uint32_t)0x01000000))FSMC_PATT2_ATTHIZ2_1 ((uint32_t)0x02000000))FSMC_PATT2_ATTHIZ2_2 ((uint32_t)0x04000000))FSMC_PATT2_ATTHIZ2_3 ((uint32_t)0x08000000))FSMC_PATT2_ATTHIZ2_4 ((uint32_t)0x10000000))FSMC_PATT2_ATTHIZ2_5 ((uint32_t)0x20000000))FSMC_PATT2_ATTHIZ2_6 ((uint32_t)0x40000000))FSMC_PATT2_ATTHIZ2_7 ((uint32_t)0x80000000))FSMC_PATT3_ATTSET3 ((uint32_t)0x000000FF))FSMC_PATT3_ATTSET3_0 ((uint32_t)0x00000001))FSMC_PATT3_ATTSET3_1 ((uint32_t)0x00000002))FSMC_PATT3_ATTSET3_2 ((uint32_t)0x00000004))FSMC_PATT3_ATTSET3_3 ((uint32_t)0x00000008))FSMC_PATT3_ATTSET3_4 ((uint32_t)0x00000010))FSMC_PATT3_ATTSET3_5 ((uint32_t)0x00000020))FSMC_PATT3_ATTSET3_6 ((uint32_t)0x00000040))FSMC_PATT3_ATTSET3_7 ((uint32_t)0x00000080))FSMC_PATT3_ATTWAIT3 ((uint32_t)0x0000FF00))FSMC_PATT3_ATTWAIT3_0 ((uint32_t)0x00000100))FSMC_PATT3_ATTWAIT3_1 ((uint32_t)0x00000200))FSMC_PATT3_ATTWAIT3_2 ((uint32_t)0x00000400))FSMC_PATT3_ATTWAIT3_3 ((uint32_t)0x00000800))FSMC_PATT3_ATTWAIT3_4 ((uint32_t)0x00001000))FSMC_PATT3_ATTWAIT3_5 ((uint32_t)0x00002000))FSMC_PATT3_ATTWAIT3_6 ((uint32_t)0x00004000))FSMC_PATT3_ATTWAIT3_7 ((uint32_t)0x00008000)¡)FSMC_PATT3_ATTHOLD3 ((uint32_t)0x00FF0000)¢)FSMC_PATT3_ATTHOLD3_0 ((uint32_t)0x00010000)£)FSMC_PATT3_ATTHOLD3_1 ((uint32_t)0x00020000)¤)FSMC_PATT3_ATTHOLD3_2 ((uint32_t)0x00040000)¥)FSMC_PATT3_ATTHOLD3_3 ((uint32_t)0x00080000)¦)FSMC_PATT3_ATTHOLD3_4 ((uint32_t)0x00100000)§)FSMC_PATT3_ATTHOLD3_5 ((uint32_t)0x00200000)¨)FSMC_PATT3_ATTHOLD3_6 ((uint32_t)0x00400000)©)FSMC_PATT3_ATTHOLD3_7 ((uint32_t)0x00800000)«)FSMC_PATT3_ATTHIZ3 ((uint32_t)0xFF000000)¬)FSMC_PATT3_ATTHIZ3_0 ((uint32_t)0x01000000))FSMC_PATT3_ATTHIZ3_1 ((uint32_t)0x02000000)®)FSMC_PATT3_ATTHIZ3_2 ((uint32_t)0x04000000)¯)FSMC_PATT3_ATTHIZ3_3 ((uint32_t)0x08000000)°)FSMC_PATT3_ATTHIZ3_4 ((uint32_t)0x10000000)±)FSMC_PATT3_ATTHIZ3_5 ((uint32_t)0x20000000)²)FSMC_PATT3_ATTHIZ3_6 ((uint32_t)0x40000000)³)FSMC_PATT3_ATTHIZ3_7 ((uint32_t)0x80000000)¶)FSMC_PATT4_ATTSET4 ((uint32_t)0x000000FF)·)FSMC_PATT4_ATTSET4_0 ((uint32_t)0x00000001)¸)FSMC_PATT4_ATTSET4_1 ((uint32_t)0x00000002)¹)FSMC_PATT4_ATTSET4_2 ((uint32_t)0x00000004)º)FSMC_PATT4_ATTSET4_3 ((uint32_t)0x00000008)»)FSMC_PATT4_ATTSET4_4 ((uint32_t)0x00000010)¼)FSMC_PATT4_ATTSET4_5 ((uint32_t)0x00000020)½)FSMC_PATT4_ATTSET4_6 ((uint32_t)0x00000040)¾)FSMC_PATT4_ATTSET4_7 ((uint32_t)0x00000080)À)FSMC_PATT4_ATTWAIT4 ((uint32_t)0x0000FF00)Á)FSMC_PATT4_ATTWAIT4_0 ((uint32_t)0x00000100)Â)FSMC_PATT4_ATTWAIT4_1 ((uint32_t)0x00000200)Ã)FSMC_PATT4_ATTWAIT4_2 ((uint32_t)0x00000400)Ä)FSMC_PATT4_ATTWAIT4_3 ((uint32_t)0x00000800)Å)FSMC_PATT4_ATTWAIT4_4 ((uint32_t)0x00001000)Æ)FSMC_PATT4_ATTWAIT4_5 ((uint32_t)0x00002000)Ç)FSMC_PATT4_ATTWAIT4_6 ((uint32_t)0x00004000)È)FSMC_PATT4_ATTWAIT4_7 ((uint32_t)0x00008000)Ê)FSMC_PATT4_ATTHOLD4 ((uint32_t)0x00FF0000)Ë)FSMC_PATT4_ATTHOLD4_0 ((uint32_t)0x00010000)Ì)FSMC_PATT4_ATTHOLD4_1 ((uint32_t)0x00020000)Í)FSMC_PATT4_ATTHOLD4_2 ((uint32_t)0x00040000)Î)FSMC_PATT4_ATTHOLD4_3 ((uint32_t)0x00080000)Ï)FSMC_PATT4_ATTHOLD4_4 ((uint32_t)0x00100000)Ð)FSMC_PATT4_ATTHOLD4_5 ((uint32_t)0x00200000)Ñ)FSMC_PATT4_ATTHOLD4_6 ((uint32_t)0x00400000)Ò)FSMC_PATT4_ATTHOLD4_7 ((uint32_t)0x00800000)Ô)FSMC_PATT4_ATTHIZ4 ((uint32_t)0xFF000000)Õ)FSMC_PATT4_ATTHIZ4_0 ((uint32_t)0x01000000)Ö)FSMC_PATT4_ATTHIZ4_1 ((uint32_t)0x02000000)×)FSMC_PATT4_ATTHIZ4_2 ((uint32_t)0x04000000)Ø)FSMC_PATT4_ATTHIZ4_3 ((uint32_t)0x08000000)Ù)FSMC_PATT4_ATTHIZ4_4 ((uint32_t)0x10000000)Ú)FSMC_PATT4_ATTHIZ4_5 ((uint32_t)0x20000000)Û)FSMC_PATT4_ATTHIZ4_6 ((uint32_t)0x40000000)Ü)FSMC_PATT4_ATTHIZ4_7 ((uint32_t)0x80000000)ß)FSMC_PIO4_IOSET4 ((uint32_t)0x000000FF)à)FSMC_PIO4_IOSET4_0 ((uint32_t)0x00000001)á)FSMC_PIO4_IOSET4_1 ((uint32_t)0x00000002)â)FSMC_PIO4_IOSET4_2 ((uint32_t)0x00000004)ã)FSMC_PIO4_IOSET4_3 ((uint32_t)0x00000008)ä)FSMC_PIO4_IOSET4_4 ((uint32_t)0x00000010)å)FSMC_PIO4_IOSET4_5 ((uint32_t)0x00000020)æ)FSMC_PIO4_IOSET4_6 ((uint32_t)0x00000040)ç)FSMC_PIO4_IOSET4_7 ((uint32_t)0x00000080)é)FSMC_PIO4_IOWAIT4 ((uint32_t)0x0000FF00)ê)FSMC_PIO4_IOWAIT4_0 ((uint32_t)0x00000100)ë)FSMC_PIO4_IOWAIT4_1 ((uint32_t)0x00000200)ì)FSMC_PIO4_IOWAIT4_2 ((uint32_t)0x00000400)í)FSMC_PIO4_IOWAIT4_3 ((uint32_t)0x00000800)î)FSMC_PIO4_IOWAIT4_4 ((uint32_t)0x00001000)ï)FSMC_PIO4_IOWAIT4_5 ((uint32_t)0x00002000)ð)FSMC_PIO4_IOWAIT4_6 ((uint32_t)0x00004000)ñ)FSMC_PIO4_IOWAIT4_7 ((uint32_t)0x00008000)ó)FSMC_PIO4_IOHOLD4 ((uint32_t)0x00FF0000)ô)FSMC_PIO4_IOHOLD4_0 ((uint32_t)0x00010000)õ)FSMC_PIO4_IOHOLD4_1 ((uint32_t)0x00020000)ö)FSMC_PIO4_IOHOLD4_2 ((uint32_t)0x00040000)÷)FSMC_PIO4_IOHOLD4_3 ((uint32_t)0x00080000)ø)FSMC_PIO4_IOHOLD4_4 ((uint32_t)0x00100000)ù)FSMC_PIO4_IOHOLD4_5 ((uint32_t)0x00200000)ú)FSMC_PIO4_IOHOLD4_6 ((uint32_t)0x00400000)û)FSMC_PIO4_IOHOLD4_7 ((uint32_t)0x00800000)ý)FSMC_PIO4_IOHIZ4 ((uint32_t)0xFF000000)þ)FSMC_PIO4_IOHIZ4_0 ((uint32_t)0x01000000)ÿ)FSMC_PIO4_IOHIZ4_1 ((uint32_t)0x02000000)*FSMC_PIO4_IOHIZ4_2 ((uint32_t)0x04000000)*FSMC_PIO4_IOHIZ4_3 ((uint32_t)0x08000000)*FSMC_PIO4_IOHIZ4_4 ((uint32_t)0x10000000)*FSMC_PIO4_IOHIZ4_5 ((uint32_t)0x20000000)*FSMC_PIO4_IOHIZ4_6 ((uint32_t)0x40000000)*FSMC_PIO4_IOHIZ4_7 ((uint32_t)0x80000000)*FSMC_ECCR2_ECC2 ((uint32_t)0xFFFFFFFF)*FSMC_ECCR3_ECC3 ((uint32_t)0xFFFFFFFF)*SDIO_POWER_PWRCTRL ((uint8_t)0x03)*SDIO_POWER_PWRCTRL_0 ((uint8_t)0x01)*SDIO_POWER_PWRCTRL_1 ((uint8_t)0x02)*SDIO_CLKCR_CLKDIV ((uint16_t)0x00FF)*SDIO_CLKCR_CLKEN ((uint16_t)0x0100)*SDIO_CLKCR_PWRSAV ((uint16_t)0x0200)*SDIO_CLKCR_BYPASS ((uint16_t)0x0400)*SDIO_CLKCR_WIDBUS ((uint16_t)0x1800)*SDIO_CLKCR_WIDBUS_0 ((uint16_t)0x0800) *SDIO_CLKCR_WIDBUS_1 ((uint16_t)0x1000)¢*SDIO_CLKCR_NEGEDGE ((uint16_t)0x2000)£*SDIO_CLKCR_HWFC_EN ((uint16_t)0x4000)¦*SDIO_ARG_CMDARG ((uint32_t)0xFFFFFFFF)©*SDIO_CMD_CMDINDEX ((uint16_t)0x003F)«*SDIO_CMD_WAITRESP ((uint16_t)0x00C0)¬*SDIO_CMD_WAITRESP_0 ((uint16_t)0x0040)*SDIO_CMD_WAITRESP_1 ((uint16_t)0x0080)¯*SDIO_CMD_WAITINT ((uint16_t)0x0100)°*SDIO_CMD_WAITPEND ((uint16_t)0x0200)±*SDIO_CMD_CPSMEN ((uint16_t)0x0400)²*SDIO_CMD_SDIOSUSPEND ((uint16_t)0x0800)³*SDIO_CMD_ENCMDCOMPL ((uint16_t)0x1000)´*SDIO_CMD_NIEN ((uint16_t)0x2000)µ*SDIO_CMD_CEATACMD ((uint16_t)0x4000)¸*SDIO_RESPCMD_RESPCMD ((uint8_t)0x3F)»*SDIO_RESP0_CARDSTATUS0 ((uint32_t)0xFFFFFFFF)¾*SDIO_RESP1_CARDSTATUS1 ((uint32_t)0xFFFFFFFF)Á*SDIO_RESP2_CARDSTATUS2 ((uint32_t)0xFFFFFFFF)Ä*SDIO_RESP3_CARDSTATUS3 ((uint32_t)0xFFFFFFFF)Ç*SDIO_RESP4_CARDSTATUS4 ((uint32_t)0xFFFFFFFF)Ê*SDIO_DTIMER_DATATIME ((uint32_t)0xFFFFFFFF)Í*SDIO_DLEN_DATALENGTH ((uint32_t)0x01FFFFFF)Ð*SDIO_DCTRL_DTEN ((uint16_t)0x0001)Ñ*SDIO_DCTRL_DTDIR ((uint16_t)0x0002)Ò*SDIO_DCTRL_DTMODE ((uint16_t)0x0004)Ó*SDIO_DCTRL_DMAEN ((uint16_t)0x0008)Õ*SDIO_DCTRL_DBLOCKSIZE ((uint16_t)0x00F0)Ö*SDIO_DCTRL_DBLOCKSIZE_0 ((uint16_t)0x0010)×*SDIO_DCTRL_DBLOCKSIZE_1 ((uint16_t)0x0020)Ø*SDIO_DCTRL_DBLOCKSIZE_2 ((uint16_t)0x0040)Ù*SDIO_DCTRL_DBLOCKSIZE_3 ((uint16_t)0x0080)Û*SDIO_DCTRL_RWSTART ((uint16_t)0x0100)Ü*SDIO_DCTRL_RWSTOP ((uint16_t)0x0200)Ý*SDIO_DCTRL_RWMOD ((uint16_t)0x0400)Þ*SDIO_DCTRL_SDIOEN ((uint16_t)0x0800)á*SDIO_DCOUNT_DATACOUNT ((uint32_t)0x01FFFFFF)ä*SDIO_STA_CCRCFAIL ((uint32_t)0x00000001)å*SDIO_STA_DCRCFAIL ((uint32_t)0x00000002)æ*SDIO_STA_CTIMEOUT ((uint32_t)0x00000004)ç*SDIO_STA_DTIMEOUT ((uint32_t)0x00000008)è*SDIO_STA_TXUNDERR ((uint32_t)0x00000010)é*SDIO_STA_RXOVERR ((uint32_t)0x00000020)ê*SDIO_STA_CMDREND ((uint32_t)0x00000040)ë*SDIO_STA_CMDSENT ((uint32_t)0x00000080)ì*SDIO_STA_DATAEND ((uint32_t)0x00000100)í*SDIO_STA_STBITERR ((uint32_t)0x00000200)î*SDIO_STA_DBCKEND ((uint32_t)0x00000400)ï*SDIO_STA_CMDACT ((uint32_t)0x00000800)ð*SDIO_STA_TXACT ((uint32_t)0x00001000)ñ*SDIO_STA_RXACT ((uint32_t)0x00002000)ò*SDIO_STA_TXFIFOHE ((uint32_t)0x00004000)ó*SDIO_STA_RXFIFOHF ((uint32_t)0x00008000)ô*SDIO_STA_TXFIFOF ((uint32_t)0x00010000)õ*SDIO_STA_RXFIFOF ((uint32_t)0x00020000)ö*SDIO_STA_TXFIFOE ((uint32_t)0x00040000)÷*SDIO_STA_RXFIFOE ((uint32_t)0x00080000)ø*SDIO_STA_TXDAVL ((uint32_t)0x00100000)ù*SDIO_STA_RXDAVL ((uint32_t)0x00200000)ú*SDIO_STA_SDIOIT ((uint32_t)0x00400000)û*SDIO_STA_CEATAEND ((uint32_t)0x00800000)þ*SDIO_ICR_CCRCFAILC ((uint32_t)0x00000001)ÿ*SDIO_ICR_DCRCFAILC ((uint32_t)0x00000002)+SDIO_ICR_CTIMEOUTC ((uint32_t)0x00000004)+SDIO_ICR_DTIMEOUTC ((uint32_t)0x00000008)+SDIO_ICR_TXUNDERRC ((uint32_t)0x00000010)+SDIO_ICR_RXOVERRC ((uint32_t)0x00000020)+SDIO_ICR_CMDRENDC ((uint32_t)0x00000040)+SDIO_ICR_CMDSENTC ((uint32_t)0x00000080)+SDIO_ICR_DATAENDC ((uint32_t)0x00000100)+SDIO_ICR_STBITERRC ((uint32_t)0x00000200)+SDIO_ICR_DBCKENDC ((uint32_t)0x00000400)+SDIO_ICR_SDIOITC ((uint32_t)0x00400000)+SDIO_ICR_CEATAENDC ((uint32_t)0x00800000)+SDIO_MASK_CCRCFAILIE ((uint32_t)0x00000001)+SDIO_MASK_DCRCFAILIE ((uint32_t)0x00000002)+SDIO_MASK_CTIMEOUTIE ((uint32_t)0x00000004)+SDIO_MASK_DTIMEOUTIE ((uint32_t)0x00000008)+SDIO_MASK_TXUNDERRIE ((uint32_t)0x00000010)+SDIO_MASK_RXOVERRIE ((uint32_t)0x00000020)+SDIO_MASK_CMDRENDIE ((uint32_t)0x00000040)+SDIO_MASK_CMDSENTIE ((uint32_t)0x00000080)+SDIO_MASK_DATAENDIE ((uint32_t)0x00000100)+SDIO_MASK_STBITERRIE ((uint32_t)0x00000200)+SDIO_MASK_DBCKENDIE ((uint32_t)0x00000400)+SDIO_MASK_CMDACTIE ((uint32_t)0x00000800)+SDIO_MASK_TXACTIE ((uint32_t)0x00001000)+SDIO_MASK_RXACTIE ((uint32_t)0x00002000)+SDIO_MASK_TXFIFOHEIE ((uint32_t)0x00004000)+SDIO_MASK_RXFIFOHFIE ((uint32_t)0x00008000)+SDIO_MASK_TXFIFOFIE ((uint32_t)0x00010000)+SDIO_MASK_RXFIFOFIE ((uint32_t)0x00020000)+SDIO_MASK_TXFIFOEIE ((uint32_t)0x00040000) +SDIO_MASK_RXFIFOEIE ((uint32_t)0x00080000)¡+SDIO_MASK_TXDAVLIE ((uint32_t)0x00100000)¢+SDIO_MASK_RXDAVLIE ((uint32_t)0x00200000)£+SDIO_MASK_SDIOITIE ((uint32_t)0x00400000)¤+SDIO_MASK_CEATAENDIE ((uint32_t)0x00800000)§+SDIO_FIFOCNT_FIFOCOUNT ((uint32_t)0x00FFFFFF)ª+SDIO_FIFO_FIFODATA ((uint32_t)0xFFFFFFFF)´+USB_EP0R_EA ((uint16_t)0x000F)¶+USB_EP0R_STAT_TX ((uint16_t)0x0030)·+USB_EP0R_STAT_TX_0 ((uint16_t)0x0010)¸+USB_EP0R_STAT_TX_1 ((uint16_t)0x0020)º+USB_EP0R_DTOG_TX ((uint16_t)0x0040)»+USB_EP0R_CTR_TX ((uint16_t)0x0080)¼+USB_EP0R_EP_KIND ((uint16_t)0x0100)¾+USB_EP0R_EP_TYPE ((uint16_t)0x0600)¿+USB_EP0R_EP_TYPE_0 ((uint16_t)0x0200)À+USB_EP0R_EP_TYPE_1 ((uint16_t)0x0400)Â+USB_EP0R_SETUP ((uint16_t)0x0800)Ä+USB_EP0R_STAT_RX ((uint16_t)0x3000)Å+USB_EP0R_STAT_RX_0 ((uint16_t)0x1000)Æ+USB_EP0R_STAT_RX_1 ((uint16_t)0x2000)È+USB_EP0R_DTOG_RX ((uint16_t)0x4000)É+USB_EP0R_CTR_RX ((uint16_t)0x8000)Ì+USB_EP1R_EA ((uint16_t)0x000F)Î+USB_EP1R_STAT_TX ((uint16_t)0x0030)Ï+USB_EP1R_STAT_TX_0 ((uint16_t)0x0010)Ð+USB_EP1R_STAT_TX_1 ((uint16_t)0x0020)Ò+USB_EP1R_DTOG_TX ((uint16_t)0x0040)Ó+USB_EP1R_CTR_TX ((uint16_t)0x0080)Ô+USB_EP1R_EP_KIND ((uint16_t)0x0100)Ö+USB_EP1R_EP_TYPE ((uint16_t)0x0600)×+USB_EP1R_EP_TYPE_0 ((uint16_t)0x0200)Ø+USB_EP1R_EP_TYPE_1 ((uint16_t)0x0400)Ú+USB_EP1R_SETUP ((uint16_t)0x0800)Ü+USB_EP1R_STAT_RX ((uint16_t)0x3000)Ý+USB_EP1R_STAT_RX_0 ((uint16_t)0x1000)Þ+USB_EP1R_STAT_RX_1 ((uint16_t)0x2000)à+USB_EP1R_DTOG_RX ((uint16_t)0x4000)á+USB_EP1R_CTR_RX ((uint16_t)0x8000)ä+USB_EP2R_EA ((uint16_t)0x000F)æ+USB_EP2R_STAT_TX ((uint16_t)0x0030)ç+USB_EP2R_STAT_TX_0 ((uint16_t)0x0010)è+USB_EP2R_STAT_TX_1 ((uint16_t)0x0020)ê+USB_EP2R_DTOG_TX ((uint16_t)0x0040)ë+USB_EP2R_CTR_TX ((uint16_t)0x0080)ì+USB_EP2R_EP_KIND ((uint16_t)0x0100)î+USB_EP2R_EP_TYPE ((uint16_t)0x0600)ï+USB_EP2R_EP_TYPE_0 ((uint16_t)0x0200)ð+USB_EP2R_EP_TYPE_1 ((uint16_t)0x0400)ò+USB_EP2R_SETUP ((uint16_t)0x0800)ô+USB_EP2R_STAT_RX ((uint16_t)0x3000)õ+USB_EP2R_STAT_RX_0 ((uint16_t)0x1000)ö+USB_EP2R_STAT_RX_1 ((uint16_t)0x2000)ø+USB_EP2R_DTOG_RX ((uint16_t)0x4000)ù+USB_EP2R_CTR_RX ((uint16_t)0x8000)ü+USB_EP3R_EA ((uint16_t)0x000F)þ+USB_EP3R_STAT_TX ((uint16_t)0x0030)ÿ+USB_EP3R_STAT_TX_0 ((uint16_t)0x0010),USB_EP3R_STAT_TX_1 ((uint16_t)0x0020),USB_EP3R_DTOG_TX ((uint16_t)0x0040),USB_EP3R_CTR_TX ((uint16_t)0x0080),USB_EP3R_EP_KIND ((uint16_t)0x0100),USB_EP3R_EP_TYPE ((uint16_t)0x0600),USB_EP3R_EP_TYPE_0 ((uint16_t)0x0200),USB_EP3R_EP_TYPE_1 ((uint16_t)0x0400),USB_EP3R_SETUP ((uint16_t)0x0800),USB_EP3R_STAT_RX ((uint16_t)0x3000),USB_EP3R_STAT_RX_0 ((uint16_t)0x1000),USB_EP3R_STAT_RX_1 ((uint16_t)0x2000),USB_EP3R_DTOG_RX ((uint16_t)0x4000),USB_EP3R_CTR_RX ((uint16_t)0x8000),USB_EP4R_EA ((uint16_t)0x000F),USB_EP4R_STAT_TX ((uint16_t)0x0030),USB_EP4R_STAT_TX_0 ((uint16_t)0x0010),USB_EP4R_STAT_TX_1 ((uint16_t)0x0020),USB_EP4R_DTOG_TX ((uint16_t)0x0040),USB_EP4R_CTR_TX ((uint16_t)0x0080),USB_EP4R_EP_KIND ((uint16_t)0x0100),USB_EP4R_EP_TYPE ((uint16_t)0x0600),USB_EP4R_EP_TYPE_0 ((uint16_t)0x0200) ,USB_EP4R_EP_TYPE_1 ((uint16_t)0x0400)¢,USB_EP4R_SETUP ((uint16_t)0x0800)¤,USB_EP4R_STAT_RX ((uint16_t)0x3000)¥,USB_EP4R_STAT_RX_0 ((uint16_t)0x1000)¦,USB_EP4R_STAT_RX_1 ((uint16_t)0x2000)¨,USB_EP4R_DTOG_RX ((uint16_t)0x4000)©,USB_EP4R_CTR_RX ((uint16_t)0x8000)¬,USB_EP5R_EA ((uint16_t)0x000F)®,USB_EP5R_STAT_TX ((uint16_t)0x0030)¯,USB_EP5R_STAT_TX_0 ((uint16_t)0x0010)°,USB_EP5R_STAT_TX_1 ((uint16_t)0x0020)²,USB_EP5R_DTOG_TX ((uint16_t)0x0040)³,USB_EP5R_CTR_TX ((uint16_t)0x0080)´,USB_EP5R_EP_KIND ((uint16_t)0x0100)¶,USB_EP5R_EP_TYPE ((uint16_t)0x0600)·,USB_EP5R_EP_TYPE_0 ((uint16_t)0x0200)¸,USB_EP5R_EP_TYPE_1 ((uint16_t)0x0400)º,USB_EP5R_SETUP ((uint16_t)0x0800)¼,USB_EP5R_STAT_RX ((uint16_t)0x3000)½,USB_EP5R_STAT_RX_0 ((uint16_t)0x1000)¾,USB_EP5R_STAT_RX_1 ((uint16_t)0x2000)À,USB_EP5R_DTOG_RX ((uint16_t)0x4000)Á,USB_EP5R_CTR_RX ((uint16_t)0x8000)Ä,USB_EP6R_EA ((uint16_t)0x000F)Æ,USB_EP6R_STAT_TX ((uint16_t)0x0030)Ç,USB_EP6R_STAT_TX_0 ((uint16_t)0x0010)È,USB_EP6R_STAT_TX_1 ((uint16_t)0x0020)Ê,USB_EP6R_DTOG_TX ((uint16_t)0x0040)Ë,USB_EP6R_CTR_TX ((uint16_t)0x0080)Ì,USB_EP6R_EP_KIND ((uint16_t)0x0100)Î,USB_EP6R_EP_TYPE ((uint16_t)0x0600)Ï,USB_EP6R_EP_TYPE_0 ((uint16_t)0x0200)Ð,USB_EP6R_EP_TYPE_1 ((uint16_t)0x0400)Ò,USB_EP6R_SETUP ((uint16_t)0x0800)Ô,USB_EP6R_STAT_RX ((uint16_t)0x3000)Õ,USB_EP6R_STAT_RX_0 ((uint16_t)0x1000)Ö,USB_EP6R_STAT_RX_1 ((uint16_t)0x2000)Ø,USB_EP6R_DTOG_RX ((uint16_t)0x4000)Ù,USB_EP6R_CTR_RX ((uint16_t)0x8000)Ü,USB_EP7R_EA ((uint16_t)0x000F)Þ,USB_EP7R_STAT_TX ((uint16_t)0x0030)ß,USB_EP7R_STAT_TX_0 ((uint16_t)0x0010)à,USB_EP7R_STAT_TX_1 ((uint16_t)0x0020)â,USB_EP7R_DTOG_TX ((uint16_t)0x0040)ã,USB_EP7R_CTR_TX ((uint16_t)0x0080)ä,USB_EP7R_EP_KIND ((uint16_t)0x0100)æ,USB_EP7R_EP_TYPE ((uint16_t)0x0600)ç,USB_EP7R_EP_TYPE_0 ((uint16_t)0x0200)è,USB_EP7R_EP_TYPE_1 ((uint16_t)0x0400)ê,USB_EP7R_SETUP ((uint16_t)0x0800)ì,USB_EP7R_STAT_RX ((uint16_t)0x3000)í,USB_EP7R_STAT_RX_0 ((uint16_t)0x1000)î,USB_EP7R_STAT_RX_1 ((uint16_t)0x2000)ð,USB_EP7R_DTOG_RX ((uint16_t)0x4000)ñ,USB_EP7R_CTR_RX ((uint16_t)0x8000)õ,USB_CNTR_FRES ((uint16_t)0x0001)ö,USB_CNTR_PDWN ((uint16_t)0x0002)÷,USB_CNTR_LP_MODE ((uint16_t)0x0004)ø,USB_CNTR_FSUSP ((uint16_t)0x0008)ù,USB_CNTR_RESUME ((uint16_t)0x0010)ú,USB_CNTR_ESOFM ((uint16_t)0x0100)û,USB_CNTR_SOFM ((uint16_t)0x0200)ü,USB_CNTR_RESETM ((uint16_t)0x0400)ý,USB_CNTR_SUSPM ((uint16_t)0x0800)þ,USB_CNTR_WKUPM ((uint16_t)0x1000)ÿ,USB_CNTR_ERRM ((uint16_t)0x2000)-USB_CNTR_PMAOVRM ((uint16_t)0x4000)-USB_CNTR_CTRM ((uint16_t)0x8000)-USB_ISTR_EP_ID ((uint16_t)0x000F)-USB_ISTR_DIR ((uint16_t)0x0010)-USB_ISTR_ESOF ((uint16_t)0x0100)-USB_ISTR_SOF ((uint16_t)0x0200)-USB_ISTR_RESET ((uint16_t)0x0400)-USB_ISTR_SUSP ((uint16_t)0x0800)-USB_ISTR_WKUP ((uint16_t)0x1000)-USB_ISTR_ERR ((uint16_t)0x2000)-USB_ISTR_PMAOVR ((uint16_t)0x4000)-USB_ISTR_CTR ((uint16_t)0x8000)-USB_FNR_FN ((uint16_t)0x07FF)-USB_FNR_LSOF ((uint16_t)0x1800)-USB_FNR_LCK ((uint16_t)0x2000)-USB_FNR_RXDM ((uint16_t)0x4000)-USB_FNR_RXDP ((uint16_t)0x8000)-USB_DADDR_ADD ((uint8_t)0x7F)-USB_DADDR_ADD0 ((uint8_t)0x01)-USB_DADDR_ADD1 ((uint8_t)0x02)-USB_DADDR_ADD2 ((uint8_t)0x04)-USB_DADDR_ADD3 ((uint8_t)0x08)-USB_DADDR_ADD4 ((uint8_t)0x10)-USB_DADDR_ADD5 ((uint8_t)0x20)-USB_DADDR_ADD6 ((uint8_t)0x40) -USB_DADDR_EF ((uint8_t)0x80)£-USB_BTABLE_BTABLE ((uint16_t)0xFFF8)§-USB_ADDR0_TX_ADDR0_TX ((uint16_t)0xFFFE)ª-USB_ADDR1_TX_ADDR1_TX ((uint16_t)0xFFFE)-USB_ADDR2_TX_ADDR2_TX ((uint16_t)0xFFFE)°-USB_ADDR3_TX_ADDR3_TX ((uint16_t)0xFFFE)³-USB_ADDR4_TX_ADDR4_TX ((uint16_t)0xFFFE)¶-USB_ADDR5_TX_ADDR5_TX ((uint16_t)0xFFFE)¹-USB_ADDR6_TX_ADDR6_TX ((uint16_t)0xFFFE)¼-USB_ADDR7_TX_ADDR7_TX ((uint16_t)0xFFFE)Á-USB_COUNT0_TX_COUNT0_TX ((uint16_t)0x03FF)Ä-USB_COUNT1_TX_COUNT1_TX ((uint16_t)0x03FF)Ç-USB_COUNT2_TX_COUNT2_TX ((uint16_t)0x03FF)Ê-USB_COUNT3_TX_COUNT3_TX ((uint16_t)0x03FF)Í-USB_COUNT4_TX_COUNT4_TX ((uint16_t)0x03FF)Ð-USB_COUNT5_TX_COUNT5_TX ((uint16_t)0x03FF)Ó-USB_COUNT6_TX_COUNT6_TX ((uint16_t)0x03FF)Ö-USB_COUNT7_TX_COUNT7_TX ((uint16_t)0x03FF)Û-USB_COUNT0_TX_0_COUNT0_TX_0 ((uint32_t)0x000003FF)Þ-USB_COUNT0_TX_1_COUNT0_TX_1 ((uint32_t)0x03FF0000)á-USB_COUNT1_TX_0_COUNT1_TX_0 ((uint32_t)0x000003FF)ä-USB_COUNT1_TX_1_COUNT1_TX_1 ((uint32_t)0x03FF0000)ç-USB_COUNT2_TX_0_COUNT2_TX_0 ((uint32_t)0x000003FF)ê-USB_COUNT2_TX_1_COUNT2_TX_1 ((uint32_t)0x03FF0000)í-USB_COUNT3_TX_0_COUNT3_TX_0 ((uint16_t)0x000003FF)ð-USB_COUNT3_TX_1_COUNT3_TX_1 ((uint16_t)0x03FF0000)ó-USB_COUNT4_TX_0_COUNT4_TX_0 ((uint32_t)0x000003FF)ö-USB_COUNT4_TX_1_COUNT4_TX_1 ((uint32_t)0x03FF0000)ù-USB_COUNT5_TX_0_COUNT5_TX_0 ((uint32_t)0x000003FF)ü-USB_COUNT5_TX_1_COUNT5_TX_1 ((uint32_t)0x03FF0000)ÿ-USB_COUNT6_TX_0_COUNT6_TX_0 ((uint32_t)0x000003FF).USB_COUNT6_TX_1_COUNT6_TX_1 ((uint32_t)0x03FF0000).USB_COUNT7_TX_0_COUNT7_TX_0 ((uint32_t)0x000003FF).USB_COUNT7_TX_1_COUNT7_TX_1 ((uint32_t)0x03FF0000).USB_ADDR0_RX_ADDR0_RX ((uint16_t)0xFFFE).USB_ADDR1_RX_ADDR1_RX ((uint16_t)0xFFFE).USB_ADDR2_RX_ADDR2_RX ((uint16_t)0xFFFE).USB_ADDR3_RX_ADDR3_RX ((uint16_t)0xFFFE).USB_ADDR4_RX_ADDR4_RX ((uint16_t)0xFFFE).USB_ADDR5_RX_ADDR5_RX ((uint16_t)0xFFFE).USB_ADDR6_RX_ADDR6_RX ((uint16_t)0xFFFE)¢.USB_ADDR7_RX_ADDR7_RX ((uint16_t)0xFFFE)§.USB_COUNT0_RX_COUNT0_RX ((uint16_t)0x03FF)©.USB_COUNT0_RX_NUM_BLOCK ((uint16_t)0x7C00)ª.USB_COUNT0_RX_NUM_BLOCK_0 ((uint16_t)0x0400)«.USB_COUNT0_RX_NUM_BLOCK_1 ((uint16_t)0x0800)¬.USB_COUNT0_RX_NUM_BLOCK_2 ((uint16_t)0x1000).USB_COUNT0_RX_NUM_BLOCK_3 ((uint16_t)0x2000)®.USB_COUNT0_RX_NUM_BLOCK_4 ((uint16_t)0x4000)°.USB_COUNT0_RX_BLSIZE ((uint16_t)0x8000)³.USB_COUNT1_RX_COUNT1_RX ((uint16_t)0x03FF)µ.USB_COUNT1_RX_NUM_BLOCK ((uint16_t)0x7C00)¶.USB_COUNT1_RX_NUM_BLOCK_0 ((uint16_t)0x0400)·.USB_COUNT1_RX_NUM_BLOCK_1 ((uint16_t)0x0800)¸.USB_COUNT1_RX_NUM_BLOCK_2 ((uint16_t)0x1000)¹.USB_COUNT1_RX_NUM_BLOCK_3 ((uint16_t)0x2000)º.USB_COUNT1_RX_NUM_BLOCK_4 ((uint16_t)0x4000)¼.USB_COUNT1_RX_BLSIZE ((uint16_t)0x8000)¿.USB_COUNT2_RX_COUNT2_RX ((uint16_t)0x03FF)Á.USB_COUNT2_RX_NUM_BLOCK ((uint16_t)0x7C00)Â.USB_COUNT2_RX_NUM_BLOCK_0 ((uint16_t)0x0400)Ã.USB_COUNT2_RX_NUM_BLOCK_1 ((uint16_t)0x0800)Ä.USB_COUNT2_RX_NUM_BLOCK_2 ((uint16_t)0x1000)Å.USB_COUNT2_RX_NUM_BLOCK_3 ((uint16_t)0x2000)Æ.USB_COUNT2_RX_NUM_BLOCK_4 ((uint16_t)0x4000)È.USB_COUNT2_RX_BLSIZE ((uint16_t)0x8000)Ë.USB_COUNT3_RX_COUNT3_RX ((uint16_t)0x03FF)Í.USB_COUNT3_RX_NUM_BLOCK ((uint16_t)0x7C00)Î.USB_COUNT3_RX_NUM_BLOCK_0 ((uint16_t)0x0400)Ï.USB_COUNT3_RX_NUM_BLOCK_1 ((uint16_t)0x0800)Ð.USB_COUNT3_RX_NUM_BLOCK_2 ((uint16_t)0x1000)Ñ.USB_COUNT3_RX_NUM_BLOCK_3 ((uint16_t)0x2000)Ò.USB_COUNT3_RX_NUM_BLOCK_4 ((uint16_t)0x4000)Ô.USB_COUNT3_RX_BLSIZE ((uint16_t)0x8000)×.USB_COUNT4_RX_COUNT4_RX ((uint16_t)0x03FF)Ù.USB_COUNT4_RX_NUM_BLOCK ((uint16_t)0x7C00)Ú.USB_COUNT4_RX_NUM_BLOCK_0 ((uint16_t)0x0400)Û.USB_COUNT4_RX_NUM_BLOCK_1 ((uint16_t)0x0800)Ü.USB_COUNT4_RX_NUM_BLOCK_2 ((uint16_t)0x1000)Ý.USB_COUNT4_RX_NUM_BLOCK_3 ((uint16_t)0x2000)Þ.USB_COUNT4_RX_NUM_BLOCK_4 ((uint16_t)0x4000)à.USB_COUNT4_RX_BLSIZE ((uint16_t)0x8000)ã.USB_COUNT5_RX_COUNT5_RX ((uint16_t)0x03FF)å.USB_COUNT5_RX_NUM_BLOCK ((uint16_t)0x7C00)æ.USB_COUNT5_RX_NUM_BLOCK_0 ((uint16_t)0x0400)ç.USB_COUNT5_RX_NUM_BLOCK_1 ((uint16_t)0x0800)è.USB_COUNT5_RX_NUM_BLOCK_2 ((uint16_t)0x1000)é.USB_COUNT5_RX_NUM_BLOCK_3 ((uint16_t)0x2000)ê.USB_COUNT5_RX_NUM_BLOCK_4 ((uint16_t)0x4000)ì.USB_COUNT5_RX_BLSIZE ((uint16_t)0x8000)ï.USB_COUNT6_RX_COUNT6_RX ((uint16_t)0x03FF)ñ.USB_COUNT6_RX_NUM_BLOCK ((uint16_t)0x7C00)ò.USB_COUNT6_RX_NUM_BLOCK_0 ((uint16_t)0x0400)ó.USB_COUNT6_RX_NUM_BLOCK_1 ((uint16_t)0x0800)ô.USB_COUNT6_RX_NUM_BLOCK_2 ((uint16_t)0x1000)õ.USB_COUNT6_RX_NUM_BLOCK_3 ((uint16_t)0x2000)ö.USB_COUNT6_RX_NUM_BLOCK_4 ((uint16_t)0x4000)ø.USB_COUNT6_RX_BLSIZE ((uint16_t)0x8000)û.USB_COUNT7_RX_COUNT7_RX ((uint16_t)0x03FF)ý.USB_COUNT7_RX_NUM_BLOCK ((uint16_t)0x7C00)þ.USB_COUNT7_RX_NUM_BLOCK_0 ((uint16_t)0x0400)ÿ.USB_COUNT7_RX_NUM_BLOCK_1 ((uint16_t)0x0800)/USB_COUNT7_RX_NUM_BLOCK_2 ((uint16_t)0x1000)/USB_COUNT7_RX_NUM_BLOCK_3 ((uint16_t)0x2000)/USB_COUNT7_RX_NUM_BLOCK_4 ((uint16_t)0x4000)/USB_COUNT7_RX_BLSIZE ((uint16_t)0x8000)/USB_COUNT0_RX_0_COUNT0_RX_0 ((uint32_t)0x000003FF)/USB_COUNT0_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)/USB_COUNT0_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)/USB_COUNT0_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)/USB_COUNT0_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)/USB_COUNT0_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000)/USB_COUNT0_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)/USB_COUNT0_RX_0_BLSIZE_0 ((uint32_t)0x00008000)/USB_COUNT0_RX_1_COUNT0_RX_1 ((uint32_t)0x03FF0000)/USB_COUNT0_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)/USB_COUNT0_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)/USB_COUNT0_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)/USB_COUNT0_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)/USB_COUNT0_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)/USB_COUNT0_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)/USB_COUNT0_RX_1_BLSIZE_1 ((uint32_t)0x80000000)¡/USB_COUNT1_RX_0_COUNT1_RX_0 ((uint32_t)0x000003FF)£/USB_COUNT1_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)¤/USB_COUNT1_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)¥/USB_COUNT1_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)¦/USB_COUNT1_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)§/USB_COUNT1_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000)¨/USB_COUNT1_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)ª/USB_COUNT1_RX_0_BLSIZE_0 ((uint32_t)0x00008000)/USB_COUNT1_RX_1_COUNT1_RX_1 ((uint32_t)0x03FF0000)¯/USB_COUNT1_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)°/USB_COUNT1_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)±/USB_COUNT1_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)²/USB_COUNT1_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)³/USB_COUNT1_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)´/USB_COUNT1_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)¶/USB_COUNT1_RX_1_BLSIZE_1 ((uint32_t)0x80000000)¹/USB_COUNT2_RX_0_COUNT2_RX_0 ((uint32_t)0x000003FF)»/USB_COUNT2_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)¼/USB_COUNT2_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)½/USB_COUNT2_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)¾/USB_COUNT2_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)¿/USB_COUNT2_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000)À/USB_COUNT2_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)Â/USB_COUNT2_RX_0_BLSIZE_0 ((uint32_t)0x00008000)Å/USB_COUNT2_RX_1_COUNT2_RX_1 ((uint32_t)0x03FF0000)Ç/USB_COUNT2_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)È/USB_COUNT2_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)É/USB_COUNT2_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)Ê/USB_COUNT2_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)Ë/USB_COUNT2_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)Ì/USB_COUNT2_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)Î/USB_COUNT2_RX_1_BLSIZE_1 ((uint32_t)0x80000000)Ñ/USB_COUNT3_RX_0_COUNT3_RX_0 ((uint32_t)0x000003FF)Ó/USB_COUNT3_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)Ô/USB_COUNT3_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)Õ/USB_COUNT3_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)Ö/USB_COUNT3_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)×/USB_COUNT3_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000)Ø/USB_COUNT3_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)Ú/USB_COUNT3_RX_0_BLSIZE_0 ((uint32_t)0x00008000)Ý/USB_COUNT3_RX_1_COUNT3_RX_1 ((uint32_t)0x03FF0000)ß/USB_COUNT3_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)à/USB_COUNT3_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)á/USB_COUNT3_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)â/USB_COUNT3_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)ã/USB_COUNT3_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)ä/USB_COUNT3_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)æ/USB_COUNT3_RX_1_BLSIZE_1 ((uint32_t)0x80000000)é/USB_COUNT4_RX_0_COUNT4_RX_0 ((uint32_t)0x000003FF)ë/USB_COUNT4_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)ì/USB_COUNT4_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)í/USB_COUNT4_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)î/USB_COUNT4_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)ï/USB_COUNT4_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000)ð/USB_COUNT4_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)ò/USB_COUNT4_RX_0_BLSIZE_0 ((uint32_t)0x00008000)õ/USB_COUNT4_RX_1_COUNT4_RX_1 ((uint32_t)0x03FF0000)÷/USB_COUNT4_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)ø/USB_COUNT4_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)ù/USB_COUNT4_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)ú/USB_COUNT4_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)û/USB_COUNT4_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)ü/USB_COUNT4_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)þ/USB_COUNT4_RX_1_BLSIZE_1 ((uint32_t)0x80000000)0USB_COUNT5_RX_0_COUNT5_RX_0 ((uint32_t)0x000003FF)0USB_COUNT5_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)0USB_COUNT5_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)0USB_COUNT5_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)0USB_COUNT5_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)0USB_COUNT5_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000)0USB_COUNT5_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)0USB_COUNT5_RX_0_BLSIZE_0 ((uint32_t)0x00008000)0USB_COUNT5_RX_1_COUNT5_RX_1 ((uint32_t)0x03FF0000)0USB_COUNT5_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)0USB_COUNT5_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)0USB_COUNT5_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)0USB_COUNT5_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)0USB_COUNT5_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)0USB_COUNT5_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)0USB_COUNT5_RX_1_BLSIZE_1 ((uint32_t)0x80000000)0USB_COUNT6_RX_0_COUNT6_RX_0 ((uint32_t)0x000003FF)0USB_COUNT6_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)0USB_COUNT6_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)0USB_COUNT6_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)0USB_COUNT6_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)0USB_COUNT6_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) 0USB_COUNT6_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)¢0USB_COUNT6_RX_0_BLSIZE_0 ((uint32_t)0x00008000)¥0USB_COUNT6_RX_1_COUNT6_RX_1 ((uint32_t)0x03FF0000)§0USB_COUNT6_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)¨0USB_COUNT6_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)©0USB_COUNT6_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)ª0USB_COUNT6_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)«0USB_COUNT6_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)¬0USB_COUNT6_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)®0USB_COUNT6_RX_1_BLSIZE_1 ((uint32_t)0x80000000)±0USB_COUNT7_RX_0_COUNT7_RX_0 ((uint32_t)0x000003FF)³0USB_COUNT7_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00)´0USB_COUNT7_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400)µ0USB_COUNT7_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800)¶0USB_COUNT7_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000)·0USB_COUNT7_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000)¸0USB_COUNT7_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000)º0USB_COUNT7_RX_0_BLSIZE_0 ((uint32_t)0x00008000)½0USB_COUNT7_RX_1_COUNT7_RX_1 ((uint32_t)0x03FF0000)¿0USB_COUNT7_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000)À0USB_COUNT7_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000)Á0USB_COUNT7_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000)Â0USB_COUNT7_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000)Ã0USB_COUNT7_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000)Ä0USB_COUNT7_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000)Æ0USB_COUNT7_RX_1_BLSIZE_1 ((uint32_t)0x80000000)Ð0CAN_MCR_INRQ ((uint16_t)0x0001)Ñ0CAN_MCR_SLEEP ((uint16_t)0x0002)Ò0CAN_MCR_TXFP ((uint16_t)0x0004)Ó0CAN_MCR_RFLM ((uint16_t)0x0008)Ô0CAN_MCR_NART ((uint16_t)0x0010)Õ0CAN_MCR_AWUM ((uint16_t)0x0020)Ö0CAN_MCR_ABOM ((uint16_t)0x0040)×0CAN_MCR_TTCM ((uint16_t)0x0080)Ø0CAN_MCR_RESET ((uint16_t)0x8000)Û0CAN_MSR_INAK ((uint16_t)0x0001)Ü0CAN_MSR_SLAK ((uint16_t)0x0002)Ý0CAN_MSR_ERRI ((uint16_t)0x0004)Þ0CAN_MSR_WKUI ((uint16_t)0x0008)ß0CAN_MSR_SLAKI ((uint16_t)0x0010)à0CAN_MSR_TXM ((uint16_t)0x0100)á0CAN_MSR_RXM ((uint16_t)0x0200)â0CAN_MSR_SAMP ((uint16_t)0x0400)ã0CAN_MSR_RX ((uint16_t)0x0800)æ0CAN_TSR_RQCP0 ((uint32_t)0x00000001)ç0CAN_TSR_TXOK0 ((uint32_t)0x00000002)è0CAN_TSR_ALST0 ((uint32_t)0x00000004)é0CAN_TSR_TERR0 ((uint32_t)0x00000008)ê0CAN_TSR_ABRQ0 ((uint32_t)0x00000080)ë0CAN_TSR_RQCP1 ((uint32_t)0x00000100)ì0CAN_TSR_TXOK1 ((uint32_t)0x00000200)í0CAN_TSR_ALST1 ((uint32_t)0x00000400)î0CAN_TSR_TERR1 ((uint32_t)0x00000800)ï0CAN_TSR_ABRQ1 ((uint32_t)0x00008000)ð0CAN_TSR_RQCP2 ((uint32_t)0x00010000)ñ0CAN_TSR_TXOK2 ((uint32_t)0x00020000)ò0CAN_TSR_ALST2 ((uint32_t)0x00040000)ó0CAN_TSR_TERR2 ((uint32_t)0x00080000)ô0CAN_TSR_ABRQ2 ((uint32_t)0x00800000)õ0CAN_TSR_CODE ((uint32_t)0x03000000)÷0CAN_TSR_TME ((uint32_t)0x1C000000)ø0CAN_TSR_TME0 ((uint32_t)0x04000000)ù0CAN_TSR_TME1 ((uint32_t)0x08000000)ú0CAN_TSR_TME2 ((uint32_t)0x10000000)ü0CAN_TSR_LOW ((uint32_t)0xE0000000)ý0CAN_TSR_LOW0 ((uint32_t)0x20000000)þ0CAN_TSR_LOW1 ((uint32_t)0x40000000)ÿ0CAN_TSR_LOW2 ((uint32_t)0x80000000)1CAN_RF0R_FMP0 ((uint8_t)0x03)1CAN_RF0R_FULL0 ((uint8_t)0x08)1CAN_RF0R_FOVR0 ((uint8_t)0x10)1CAN_RF0R_RFOM0 ((uint8_t)0x20)1CAN_RF1R_FMP1 ((uint8_t)0x03)1CAN_RF1R_FULL1 ((uint8_t)0x08)1CAN_RF1R_FOVR1 ((uint8_t)0x10)1CAN_RF1R_RFOM1 ((uint8_t)0x20)1CAN_IER_TMEIE ((uint32_t)0x00000001)1CAN_IER_FMPIE0 ((uint32_t)0x00000002)1CAN_IER_FFIE0 ((uint32_t)0x00000004)1CAN_IER_FOVIE0 ((uint32_t)0x00000008)1CAN_IER_FMPIE1 ((uint32_t)0x00000010)1CAN_IER_FFIE1 ((uint32_t)0x00000020)1CAN_IER_FOVIE1 ((uint32_t)0x00000040)1CAN_IER_EWGIE ((uint32_t)0x00000100)1CAN_IER_EPVIE ((uint32_t)0x00000200)1CAN_IER_BOFIE ((uint32_t)0x00000400)1CAN_IER_LECIE ((uint32_t)0x00000800)1CAN_IER_ERRIE ((uint32_t)0x00008000)1CAN_IER_WKUIE ((uint32_t)0x00010000)1CAN_IER_SLKIE ((uint32_t)0x00020000)1CAN_ESR_EWGF ((uint32_t)0x00000001)1CAN_ESR_EPVF ((uint32_t)0x00000002) 1CAN_ESR_BOFF ((uint32_t)0x00000004)¢1CAN_ESR_LEC ((uint32_t)0x00000070)£1CAN_ESR_LEC_0 ((uint32_t)0x00000010)¤1CAN_ESR_LEC_1 ((uint32_t)0x00000020)¥1CAN_ESR_LEC_2 ((uint32_t)0x00000040)§1CAN_ESR_TEC ((uint32_t)0x00FF0000)¨1CAN_ESR_REC ((uint32_t)0xFF000000)«1CAN_BTR_BRP ((uint32_t)0x000003FF)¬1CAN_BTR_TS1 ((uint32_t)0x000F0000)1CAN_BTR_TS2 ((uint32_t)0x00700000)®1CAN_BTR_SJW ((uint32_t)0x03000000)¯1CAN_BTR_LBKM ((uint32_t)0x40000000)°1CAN_BTR_SILM ((uint32_t)0x80000000)´1CAN_TI0R_TXRQ ((uint32_t)0x00000001)µ1CAN_TI0R_RTR ((uint32_t)0x00000002)¶1CAN_TI0R_IDE ((uint32_t)0x00000004)·1CAN_TI0R_EXID ((uint32_t)0x001FFFF8)¸1CAN_TI0R_STID ((uint32_t)0xFFE00000)»1CAN_TDT0R_DLC ((uint32_t)0x0000000F)¼1CAN_TDT0R_TGT ((uint32_t)0x00000100)½1CAN_TDT0R_TIME ((uint32_t)0xFFFF0000)À1CAN_TDL0R_DATA0 ((uint32_t)0x000000FF)Á1CAN_TDL0R_DATA1 ((uint32_t)0x0000FF00)Â1CAN_TDL0R_DATA2 ((uint32_t)0x00FF0000)Ã1CAN_TDL0R_DATA3 ((uint32_t)0xFF000000)Æ1CAN_TDH0R_DATA4 ((uint32_t)0x000000FF)Ç1CAN_TDH0R_DATA5 ((uint32_t)0x0000FF00)È1CAN_TDH0R_DATA6 ((uint32_t)0x00FF0000)É1CAN_TDH0R_DATA7 ((uint32_t)0xFF000000)Ì1CAN_TI1R_TXRQ ((uint32_t)0x00000001)Í1CAN_TI1R_RTR ((uint32_t)0x00000002)Î1CAN_TI1R_IDE ((uint32_t)0x00000004)Ï1CAN_TI1R_EXID ((uint32_t)0x001FFFF8)Ð1CAN_TI1R_STID ((uint32_t)0xFFE00000)Ó1CAN_TDT1R_DLC ((uint32_t)0x0000000F)Ô1CAN_TDT1R_TGT ((uint32_t)0x00000100)Õ1CAN_TDT1R_TIME ((uint32_t)0xFFFF0000)Ø1CAN_TDL1R_DATA0 ((uint32_t)0x000000FF)Ù1CAN_TDL1R_DATA1 ((uint32_t)0x0000FF00)Ú1CAN_TDL1R_DATA2 ((uint32_t)0x00FF0000)Û1CAN_TDL1R_DATA3 ((uint32_t)0xFF000000)Þ1CAN_TDH1R_DATA4 ((uint32_t)0x000000FF)ß1CAN_TDH1R_DATA5 ((uint32_t)0x0000FF00)à1CAN_TDH1R_DATA6 ((uint32_t)0x00FF0000)á1CAN_TDH1R_DATA7 ((uint32_t)0xFF000000)ä1CAN_TI2R_TXRQ ((uint32_t)0x00000001)å1CAN_TI2R_RTR ((uint32_t)0x00000002)æ1CAN_TI2R_IDE ((uint32_t)0x00000004)ç1CAN_TI2R_EXID ((uint32_t)0x001FFFF8)è1CAN_TI2R_STID ((uint32_t)0xFFE00000)ë1CAN_TDT2R_DLC ((uint32_t)0x0000000F)ì1CAN_TDT2R_TGT ((uint32_t)0x00000100)í1CAN_TDT2R_TIME ((uint32_t)0xFFFF0000)ð1CAN_TDL2R_DATA0 ((uint32_t)0x000000FF)ñ1CAN_TDL2R_DATA1 ((uint32_t)0x0000FF00)ò1CAN_TDL2R_DATA2 ((uint32_t)0x00FF0000)ó1CAN_TDL2R_DATA3 ((uint32_t)0xFF000000)ö1CAN_TDH2R_DATA4 ((uint32_t)0x000000FF)÷1CAN_TDH2R_DATA5 ((uint32_t)0x0000FF00)ø1CAN_TDH2R_DATA6 ((uint32_t)0x00FF0000)ù1CAN_TDH2R_DATA7 ((uint32_t)0xFF000000)ü1CAN_RI0R_RTR ((uint32_t)0x00000002)ý1CAN_RI0R_IDE ((uint32_t)0x00000004)þ1CAN_RI0R_EXID ((uint32_t)0x001FFFF8)ÿ1CAN_RI0R_STID ((uint32_t)0xFFE00000)2CAN_RDT0R_DLC ((uint32_t)0x0000000F)2CAN_RDT0R_FMI ((uint32_t)0x0000FF00)2CAN_RDT0R_TIME ((uint32_t)0xFFFF0000)2CAN_RDL0R_DATA0 ((uint32_t)0x000000FF)2CAN_RDL0R_DATA1 ((uint32_t)0x0000FF00)2CAN_RDL0R_DATA2 ((uint32_t)0x00FF0000)2CAN_RDL0R_DATA3 ((uint32_t)0xFF000000)2CAN_RDH0R_DATA4 ((uint32_t)0x000000FF)2CAN_RDH0R_DATA5 ((uint32_t)0x0000FF00)2CAN_RDH0R_DATA6 ((uint32_t)0x00FF0000)2CAN_RDH0R_DATA7 ((uint32_t)0xFF000000)2CAN_RI1R_RTR ((uint32_t)0x00000002)2CAN_RI1R_IDE ((uint32_t)0x00000004)2CAN_RI1R_EXID ((uint32_t)0x001FFFF8)2CAN_RI1R_STID ((uint32_t)0xFFE00000)2CAN_RDT1R_DLC ((uint32_t)0x0000000F)2CAN_RDT1R_FMI ((uint32_t)0x0000FF00)2CAN_RDT1R_TIME ((uint32_t)0xFFFF0000)2CAN_RDL1R_DATA0 ((uint32_t)0x000000FF)2CAN_RDL1R_DATA1 ((uint32_t)0x0000FF00) 2CAN_RDL1R_DATA2 ((uint32_t)0x00FF0000)¡2CAN_RDL1R_DATA3 ((uint32_t)0xFF000000)¤2CAN_RDH1R_DATA4 ((uint32_t)0x000000FF)¥2CAN_RDH1R_DATA5 ((uint32_t)0x0000FF00)¦2CAN_RDH1R_DATA6 ((uint32_t)0x00FF0000)§2CAN_RDH1R_DATA7 ((uint32_t)0xFF000000)«2CAN_FMR_FINIT ((uint8_t)0x01)®2CAN_FM1R_FBM ((uint16_t)0x3FFF)¯2CAN_FM1R_FBM0 ((uint16_t)0x0001)°2CAN_FM1R_FBM1 ((uint16_t)0x0002)±2CAN_FM1R_FBM2 ((uint16_t)0x0004)²2CAN_FM1R_FBM3 ((uint16_t)0x0008)³2CAN_FM1R_FBM4 ((uint16_t)0x0010)´2CAN_FM1R_FBM5 ((uint16_t)0x0020)µ2CAN_FM1R_FBM6 ((uint16_t)0x0040)¶2CAN_FM1R_FBM7 ((uint16_t)0x0080)·2CAN_FM1R_FBM8 ((uint16_t)0x0100)¸2CAN_FM1R_FBM9 ((uint16_t)0x0200)¹2CAN_FM1R_FBM10 ((uint16_t)0x0400)º2CAN_FM1R_FBM11 ((uint16_t)0x0800)»2CAN_FM1R_FBM12 ((uint16_t)0x1000)¼2CAN_FM1R_FBM13 ((uint16_t)0x2000)¿2CAN_FS1R_FSC ((uint16_t)0x3FFF)À2CAN_FS1R_FSC0 ((uint16_t)0x0001)Á2CAN_FS1R_FSC1 ((uint16_t)0x0002)Â2CAN_FS1R_FSC2 ((uint16_t)0x0004)Ã2CAN_FS1R_FSC3 ((uint16_t)0x0008)Ä2CAN_FS1R_FSC4 ((uint16_t)0x0010)Å2CAN_FS1R_FSC5 ((uint16_t)0x0020)Æ2CAN_FS1R_FSC6 ((uint16_t)0x0040)Ç2CAN_FS1R_FSC7 ((uint16_t)0x0080)È2CAN_FS1R_FSC8 ((uint16_t)0x0100)É2CAN_FS1R_FSC9 ((uint16_t)0x0200)Ê2CAN_FS1R_FSC10 ((uint16_t)0x0400)Ë2CAN_FS1R_FSC11 ((uint16_t)0x0800)Ì2CAN_FS1R_FSC12 ((uint16_t)0x1000)Í2CAN_FS1R_FSC13 ((uint16_t)0x2000)Ð2CAN_FFA1R_FFA ((uint16_t)0x3FFF)Ñ2CAN_FFA1R_FFA0 ((uint16_t)0x0001)Ò2CAN_FFA1R_FFA1 ((uint16_t)0x0002)Ó2CAN_FFA1R_FFA2 ((uint16_t)0x0004)Ô2CAN_FFA1R_FFA3 ((uint16_t)0x0008)Õ2CAN_FFA1R_FFA4 ((uint16_t)0x0010)Ö2CAN_FFA1R_FFA5 ((uint16_t)0x0020)×2CAN_FFA1R_FFA6 ((uint16_t)0x0040)Ø2CAN_FFA1R_FFA7 ((uint16_t)0x0080)Ù2CAN_FFA1R_FFA8 ((uint16_t)0x0100)Ú2CAN_FFA1R_FFA9 ((uint16_t)0x0200)Û2CAN_FFA1R_FFA10 ((uint16_t)0x0400)Ü2CAN_FFA1R_FFA11 ((uint16_t)0x0800)Ý2CAN_FFA1R_FFA12 ((uint16_t)0x1000)Þ2CAN_FFA1R_FFA13 ((uint16_t)0x2000)á2CAN_FA1R_FACT ((uint16_t)0x3FFF)â2CAN_FA1R_FACT0 ((uint16_t)0x0001)ã2CAN_FA1R_FACT1 ((uint16_t)0x0002)ä2CAN_FA1R_FACT2 ((uint16_t)0x0004)å2CAN_FA1R_FACT3 ((uint16_t)0x0008)æ2CAN_FA1R_FACT4 ((uint16_t)0x0010)ç2CAN_FA1R_FACT5 ((uint16_t)0x0020)è2CAN_FA1R_FACT6 ((uint16_t)0x0040)é2CAN_FA1R_FACT7 ((uint16_t)0x0080)ê2CAN_FA1R_FACT8 ((uint16_t)0x0100)ë2CAN_FA1R_FACT9 ((uint16_t)0x0200)ì2CAN_FA1R_FACT10 ((uint16_t)0x0400)í2CAN_FA1R_FACT11 ((uint16_t)0x0800)î2CAN_FA1R_FACT12 ((uint16_t)0x1000)ï2CAN_FA1R_FACT13 ((uint16_t)0x2000)ò2CAN_F0R1_FB0 ((uint32_t)0x00000001)ó2CAN_F0R1_FB1 ((uint32_t)0x00000002)ô2CAN_F0R1_FB2 ((uint32_t)0x00000004)õ2CAN_F0R1_FB3 ((uint32_t)0x00000008)ö2CAN_F0R1_FB4 ((uint32_t)0x00000010)÷2CAN_F0R1_FB5 ((uint32_t)0x00000020)ø2CAN_F0R1_FB6 ((uint32_t)0x00000040)ù2CAN_F0R1_FB7 ((uint32_t)0x00000080)ú2CAN_F0R1_FB8 ((uint32_t)0x00000100)û2CAN_F0R1_FB9 ((uint32_t)0x00000200)ü2CAN_F0R1_FB10 ((uint32_t)0x00000400)ý2CAN_F0R1_FB11 ((uint32_t)0x00000800)þ2CAN_F0R1_FB12 ((uint32_t)0x00001000)ÿ2CAN_F0R1_FB13 ((uint32_t)0x00002000)3CAN_F0R1_FB14 ((uint32_t)0x00004000)3CAN_F0R1_FB15 ((uint32_t)0x00008000)3CAN_F0R1_FB16 ((uint32_t)0x00010000)3CAN_F0R1_FB17 ((uint32_t)0x00020000)3CAN_F0R1_FB18 ((uint32_t)0x00040000)3CAN_F0R1_FB19 ((uint32_t)0x00080000)3CAN_F0R1_FB20 ((uint32_t)0x00100000)3CAN_F0R1_FB21 ((uint32_t)0x00200000)3CAN_F0R1_FB22 ((uint32_t)0x00400000)3CAN_F0R1_FB23 ((uint32_t)0x00800000)3CAN_F0R1_FB24 ((uint32_t)0x01000000)3CAN_F0R1_FB25 ((uint32_t)0x02000000)3CAN_F0R1_FB26 ((uint32_t)0x04000000)3CAN_F0R1_FB27 ((uint32_t)0x08000000)3CAN_F0R1_FB28 ((uint32_t)0x10000000)3CAN_F0R1_FB29 ((uint32_t)0x20000000)3CAN_F0R1_FB30 ((uint32_t)0x40000000)3CAN_F0R1_FB31 ((uint32_t)0x80000000)3CAN_F1R1_FB0 ((uint32_t)0x00000001)3CAN_F1R1_FB1 ((uint32_t)0x00000002)3CAN_F1R1_FB2 ((uint32_t)0x00000004)3CAN_F1R1_FB3 ((uint32_t)0x00000008)3CAN_F1R1_FB4 ((uint32_t)0x00000010)3CAN_F1R1_FB5 ((uint32_t)0x00000020)3CAN_F1R1_FB6 ((uint32_t)0x00000040)3CAN_F1R1_FB7 ((uint32_t)0x00000080)3CAN_F1R1_FB8 ((uint32_t)0x00000100)3CAN_F1R1_FB9 ((uint32_t)0x00000200)3CAN_F1R1_FB10 ((uint32_t)0x00000400)3CAN_F1R1_FB11 ((uint32_t)0x00000800) 3CAN_F1R1_FB12 ((uint32_t)0x00001000)¡3CAN_F1R1_FB13 ((uint32_t)0x00002000)¢3CAN_F1R1_FB14 ((uint32_t)0x00004000)£3CAN_F1R1_FB15 ((uint32_t)0x00008000)¤3CAN_F1R1_FB16 ((uint32_t)0x00010000)¥3CAN_F1R1_FB17 ((uint32_t)0x00020000)¦3CAN_F1R1_FB18 ((uint32_t)0x00040000)§3CAN_F1R1_FB19 ((uint32_t)0x00080000)¨3CAN_F1R1_FB20 ((uint32_t)0x00100000)©3CAN_F1R1_FB21 ((uint32_t)0x00200000)ª3CAN_F1R1_FB22 ((uint32_t)0x00400000)«3CAN_F1R1_FB23 ((uint32_t)0x00800000)¬3CAN_F1R1_FB24 ((uint32_t)0x01000000)3CAN_F1R1_FB25 ((uint32_t)0x02000000)®3CAN_F1R1_FB26 ((uint32_t)0x04000000)¯3CAN_F1R1_FB27 ((uint32_t)0x08000000)°3CAN_F1R1_FB28 ((uint32_t)0x10000000)±3CAN_F1R1_FB29 ((uint32_t)0x20000000)²3CAN_F1R1_FB30 ((uint32_t)0x40000000)³3CAN_F1R1_FB31 ((uint32_t)0x80000000)¶3CAN_F2R1_FB0 ((uint32_t)0x00000001)·3CAN_F2R1_FB1 ((uint32_t)0x00000002)¸3CAN_F2R1_FB2 ((uint32_t)0x00000004)¹3CAN_F2R1_FB3 ((uint32_t)0x00000008)º3CAN_F2R1_FB4 ((uint32_t)0x00000010)»3CAN_F2R1_FB5 ((uint32_t)0x00000020)¼3CAN_F2R1_FB6 ((uint32_t)0x00000040)½3CAN_F2R1_FB7 ((uint32_t)0x00000080)¾3CAN_F2R1_FB8 ((uint32_t)0x00000100)¿3CAN_F2R1_FB9 ((uint32_t)0x00000200)À3CAN_F2R1_FB10 ((uint32_t)0x00000400)Á3CAN_F2R1_FB11 ((uint32_t)0x00000800)Â3CAN_F2R1_FB12 ((uint32_t)0x00001000)Ã3CAN_F2R1_FB13 ((uint32_t)0x00002000)Ä3CAN_F2R1_FB14 ((uint32_t)0x00004000)Å3CAN_F2R1_FB15 ((uint32_t)0x00008000)Æ3CAN_F2R1_FB16 ((uint32_t)0x00010000)Ç3CAN_F2R1_FB17 ((uint32_t)0x00020000)È3CAN_F2R1_FB18 ((uint32_t)0x00040000)É3CAN_F2R1_FB19 ((uint32_t)0x00080000)Ê3CAN_F2R1_FB20 ((uint32_t)0x00100000)Ë3CAN_F2R1_FB21 ((uint32_t)0x00200000)Ì3CAN_F2R1_FB22 ((uint32_t)0x00400000)Í3CAN_F2R1_FB23 ((uint32_t)0x00800000)Î3CAN_F2R1_FB24 ((uint32_t)0x01000000)Ï3CAN_F2R1_FB25 ((uint32_t)0x02000000)Ð3CAN_F2R1_FB26 ((uint32_t)0x04000000)Ñ3CAN_F2R1_FB27 ((uint32_t)0x08000000)Ò3CAN_F2R1_FB28 ((uint32_t)0x10000000)Ó3CAN_F2R1_FB29 ((uint32_t)0x20000000)Ô3CAN_F2R1_FB30 ((uint32_t)0x40000000)Õ3CAN_F2R1_FB31 ((uint32_t)0x80000000)Ø3CAN_F3R1_FB0 ((uint32_t)0x00000001)Ù3CAN_F3R1_FB1 ((uint32_t)0x00000002)Ú3CAN_F3R1_FB2 ((uint32_t)0x00000004)Û3CAN_F3R1_FB3 ((uint32_t)0x00000008)Ü3CAN_F3R1_FB4 ((uint32_t)0x00000010)Ý3CAN_F3R1_FB5 ((uint32_t)0x00000020)Þ3CAN_F3R1_FB6 ((uint32_t)0x00000040)ß3CAN_F3R1_FB7 ((uint32_t)0x00000080)à3CAN_F3R1_FB8 ((uint32_t)0x00000100)á3CAN_F3R1_FB9 ((uint32_t)0x00000200)â3CAN_F3R1_FB10 ((uint32_t)0x00000400)ã3CAN_F3R1_FB11 ((uint32_t)0x00000800)ä3CAN_F3R1_FB12 ((uint32_t)0x00001000)å3CAN_F3R1_FB13 ((uint32_t)0x00002000)æ3CAN_F3R1_FB14 ((uint32_t)0x00004000)ç3CAN_F3R1_FB15 ((uint32_t)0x00008000)è3CAN_F3R1_FB16 ((uint32_t)0x00010000)é3CAN_F3R1_FB17 ((uint32_t)0x00020000)ê3CAN_F3R1_FB18 ((uint32_t)0x00040000)ë3CAN_F3R1_FB19 ((uint32_t)0x00080000)ì3CAN_F3R1_FB20 ((uint32_t)0x00100000)í3CAN_F3R1_FB21 ((uint32_t)0x00200000)î3CAN_F3R1_FB22 ((uint32_t)0x00400000)ï3CAN_F3R1_FB23 ((uint32_t)0x00800000)ð3CAN_F3R1_FB24 ((uint32_t)0x01000000)ñ3CAN_F3R1_FB25 ((uint32_t)0x02000000)ò3CAN_F3R1_FB26 ((uint32_t)0x04000000)ó3CAN_F3R1_FB27 ((uint32_t)0x08000000)ô3CAN_F3R1_FB28 ((uint32_t)0x10000000)õ3CAN_F3R1_FB29 ((uint32_t)0x20000000)ö3CAN_F3R1_FB30 ((uint32_t)0x40000000)÷3CAN_F3R1_FB31 ((uint32_t)0x80000000)ú3CAN_F4R1_FB0 ((uint32_t)0x00000001)û3CAN_F4R1_FB1 ((uint32_t)0x00000002)ü3CAN_F4R1_FB2 ((uint32_t)0x00000004)ý3CAN_F4R1_FB3 ((uint32_t)0x00000008)þ3CAN_F4R1_FB4 ((uint32_t)0x00000010)ÿ3CAN_F4R1_FB5 ((uint32_t)0x00000020)4CAN_F4R1_FB6 ((uint32_t)0x00000040)4CAN_F4R1_FB7 ((uint32_t)0x00000080)4CAN_F4R1_FB8 ((uint32_t)0x00000100)4CAN_F4R1_FB9 ((uint32_t)0x00000200)4CAN_F4R1_FB10 ((uint32_t)0x00000400)4CAN_F4R1_FB11 ((uint32_t)0x00000800)4CAN_F4R1_FB12 ((uint32_t)0x00001000)4CAN_F4R1_FB13 ((uint32_t)0x00002000)4CAN_F4R1_FB14 ((uint32_t)0x00004000)4CAN_F4R1_FB15 ((uint32_t)0x00008000)4CAN_F4R1_FB16 ((uint32_t)0x00010000)4CAN_F4R1_FB17 ((uint32_t)0x00020000)4CAN_F4R1_FB18 ((uint32_t)0x00040000)4CAN_F4R1_FB19 ((uint32_t)0x00080000)4CAN_F4R1_FB20 ((uint32_t)0x00100000)4CAN_F4R1_FB21 ((uint32_t)0x00200000)4CAN_F4R1_FB22 ((uint32_t)0x00400000)4CAN_F4R1_FB23 ((uint32_t)0x00800000)4CAN_F4R1_FB24 ((uint32_t)0x01000000)4CAN_F4R1_FB25 ((uint32_t)0x02000000)4CAN_F4R1_FB26 ((uint32_t)0x04000000)4CAN_F4R1_FB27 ((uint32_t)0x08000000)4CAN_F4R1_FB28 ((uint32_t)0x10000000)4CAN_F4R1_FB29 ((uint32_t)0x20000000)4CAN_F4R1_FB30 ((uint32_t)0x40000000)4CAN_F4R1_FB31 ((uint32_t)0x80000000)4CAN_F5R1_FB0 ((uint32_t)0x00000001)4CAN_F5R1_FB1 ((uint32_t)0x00000002)4CAN_F5R1_FB2 ((uint32_t)0x00000004)4CAN_F5R1_FB3 ((uint32_t)0x00000008) 4CAN_F5R1_FB4 ((uint32_t)0x00000010)¡4CAN_F5R1_FB5 ((uint32_t)0x00000020)¢4CAN_F5R1_FB6 ((uint32_t)0x00000040)£4CAN_F5R1_FB7 ((uint32_t)0x00000080)¤4CAN_F5R1_FB8 ((uint32_t)0x00000100)¥4CAN_F5R1_FB9 ((uint32_t)0x00000200)¦4CAN_F5R1_FB10 ((uint32_t)0x00000400)§4CAN_F5R1_FB11 ((uint32_t)0x00000800)¨4CAN_F5R1_FB12 ((uint32_t)0x00001000)©4CAN_F5R1_FB13 ((uint32_t)0x00002000)ª4CAN_F5R1_FB14 ((uint32_t)0x00004000)«4CAN_F5R1_FB15 ((uint32_t)0x00008000)¬4CAN_F5R1_FB16 ((uint32_t)0x00010000)4CAN_F5R1_FB17 ((uint32_t)0x00020000)®4CAN_F5R1_FB18 ((uint32_t)0x00040000)¯4CAN_F5R1_FB19 ((uint32_t)0x00080000)°4CAN_F5R1_FB20 ((uint32_t)0x00100000)±4CAN_F5R1_FB21 ((uint32_t)0x00200000)²4CAN_F5R1_FB22 ((uint32_t)0x00400000)³4CAN_F5R1_FB23 ((uint32_t)0x00800000)´4CAN_F5R1_FB24 ((uint32_t)0x01000000)µ4CAN_F5R1_FB25 ((uint32_t)0x02000000)¶4CAN_F5R1_FB26 ((uint32_t)0x04000000)·4CAN_F5R1_FB27 ((uint32_t)0x08000000)¸4CAN_F5R1_FB28 ((uint32_t)0x10000000)¹4CAN_F5R1_FB29 ((uint32_t)0x20000000)º4CAN_F5R1_FB30 ((uint32_t)0x40000000)»4CAN_F5R1_FB31 ((uint32_t)0x80000000)¾4CAN_F6R1_FB0 ((uint32_t)0x00000001)¿4CAN_F6R1_FB1 ((uint32_t)0x00000002)À4CAN_F6R1_FB2 ((uint32_t)0x00000004)Á4CAN_F6R1_FB3 ((uint32_t)0x00000008)Â4CAN_F6R1_FB4 ((uint32_t)0x00000010)Ã4CAN_F6R1_FB5 ((uint32_t)0x00000020)Ä4CAN_F6R1_FB6 ((uint32_t)0x00000040)Å4CAN_F6R1_FB7 ((uint32_t)0x00000080)Æ4CAN_F6R1_FB8 ((uint32_t)0x00000100)Ç4CAN_F6R1_FB9 ((uint32_t)0x00000200)È4CAN_F6R1_FB10 ((uint32_t)0x00000400)É4CAN_F6R1_FB11 ((uint32_t)0x00000800)Ê4CAN_F6R1_FB12 ((uint32_t)0x00001000)Ë4CAN_F6R1_FB13 ((uint32_t)0x00002000)Ì4CAN_F6R1_FB14 ((uint32_t)0x00004000)Í4CAN_F6R1_FB15 ((uint32_t)0x00008000)Î4CAN_F6R1_FB16 ((uint32_t)0x00010000)Ï4CAN_F6R1_FB17 ((uint32_t)0x00020000)Ð4CAN_F6R1_FB18 ((uint32_t)0x00040000)Ñ4CAN_F6R1_FB19 ((uint32_t)0x00080000)Ò4CAN_F6R1_FB20 ((uint32_t)0x00100000)Ó4CAN_F6R1_FB21 ((uint32_t)0x00200000)Ô4CAN_F6R1_FB22 ((uint32_t)0x00400000)Õ4CAN_F6R1_FB23 ((uint32_t)0x00800000)Ö4CAN_F6R1_FB24 ((uint32_t)0x01000000)×4CAN_F6R1_FB25 ((uint32_t)0x02000000)Ø4CAN_F6R1_FB26 ((uint32_t)0x04000000)Ù4CAN_F6R1_FB27 ((uint32_t)0x08000000)Ú4CAN_F6R1_FB28 ((uint32_t)0x10000000)Û4CAN_F6R1_FB29 ((uint32_t)0x20000000)Ü4CAN_F6R1_FB30 ((uint32_t)0x40000000)Ý4CAN_F6R1_FB31 ((uint32_t)0x80000000)à4CAN_F7R1_FB0 ((uint32_t)0x00000001)á4CAN_F7R1_FB1 ((uint32_t)0x00000002)â4CAN_F7R1_FB2 ((uint32_t)0x00000004)ã4CAN_F7R1_FB3 ((uint32_t)0x00000008)ä4CAN_F7R1_FB4 ((uint32_t)0x00000010)å4CAN_F7R1_FB5 ((uint32_t)0x00000020)æ4CAN_F7R1_FB6 ((uint32_t)0x00000040)ç4CAN_F7R1_FB7 ((uint32_t)0x00000080)è4CAN_F7R1_FB8 ((uint32_t)0x00000100)é4CAN_F7R1_FB9 ((uint32_t)0x00000200)ê4CAN_F7R1_FB10 ((uint32_t)0x00000400)ë4CAN_F7R1_FB11 ((uint32_t)0x00000800)ì4CAN_F7R1_FB12 ((uint32_t)0x00001000)í4CAN_F7R1_FB13 ((uint32_t)0x00002000)î4CAN_F7R1_FB14 ((uint32_t)0x00004000)ï4CAN_F7R1_FB15 ((uint32_t)0x00008000)ð4CAN_F7R1_FB16 ((uint32_t)0x00010000)ñ4CAN_F7R1_FB17 ((uint32_t)0x00020000)ò4CAN_F7R1_FB18 ((uint32_t)0x00040000)ó4CAN_F7R1_FB19 ((uint32_t)0x00080000)ô4CAN_F7R1_FB20 ((uint32_t)0x00100000)õ4CAN_F7R1_FB21 ((uint32_t)0x00200000)ö4CAN_F7R1_FB22 ((uint32_t)0x00400000)÷4CAN_F7R1_FB23 ((uint32_t)0x00800000)ø4CAN_F7R1_FB24 ((uint32_t)0x01000000)ù4CAN_F7R1_FB25 ((uint32_t)0x02000000)ú4CAN_F7R1_FB26 ((uint32_t)0x04000000)û4CAN_F7R1_FB27 ((uint32_t)0x08000000)ü4CAN_F7R1_FB28 ((uint32_t)0x10000000)ý4CAN_F7R1_FB29 ((uint32_t)0x20000000)þ4CAN_F7R1_FB30 ((uint32_t)0x40000000)ÿ4CAN_F7R1_FB31 ((uint32_t)0x80000000)5CAN_F8R1_FB0 ((uint32_t)0x00000001)5CAN_F8R1_FB1 ((uint32_t)0x00000002)5CAN_F8R1_FB2 ((uint32_t)0x00000004)5CAN_F8R1_FB3 ((uint32_t)0x00000008)5CAN_F8R1_FB4 ((uint32_t)0x00000010)5CAN_F8R1_FB5 ((uint32_t)0x00000020)5CAN_F8R1_FB6 ((uint32_t)0x00000040)5CAN_F8R1_FB7 ((uint32_t)0x00000080)5CAN_F8R1_FB8 ((uint32_t)0x00000100)5CAN_F8R1_FB9 ((uint32_t)0x00000200)5CAN_F8R1_FB10 ((uint32_t)0x00000400)5CAN_F8R1_FB11 ((uint32_t)0x00000800)5CAN_F8R1_FB12 ((uint32_t)0x00001000)5CAN_F8R1_FB13 ((uint32_t)0x00002000)5CAN_F8R1_FB14 ((uint32_t)0x00004000)5CAN_F8R1_FB15 ((uint32_t)0x00008000)5CAN_F8R1_FB16 ((uint32_t)0x00010000)5CAN_F8R1_FB17 ((uint32_t)0x00020000)5CAN_F8R1_FB18 ((uint32_t)0x00040000)5CAN_F8R1_FB19 ((uint32_t)0x00080000)5CAN_F8R1_FB20 ((uint32_t)0x00100000)5CAN_F8R1_FB21 ((uint32_t)0x00200000)5CAN_F8R1_FB22 ((uint32_t)0x00400000)5CAN_F8R1_FB23 ((uint32_t)0x00800000)5CAN_F8R1_FB24 ((uint32_t)0x01000000)5CAN_F8R1_FB25 ((uint32_t)0x02000000)5CAN_F8R1_FB26 ((uint32_t)0x04000000)5CAN_F8R1_FB27 ((uint32_t)0x08000000)5CAN_F8R1_FB28 ((uint32_t)0x10000000)5CAN_F8R1_FB29 ((uint32_t)0x20000000) 5CAN_F8R1_FB30 ((uint32_t)0x40000000)¡5CAN_F8R1_FB31 ((uint32_t)0x80000000)¤5CAN_F9R1_FB0 ((uint32_t)0x00000001)¥5CAN_F9R1_FB1 ((uint32_t)0x00000002)¦5CAN_F9R1_FB2 ((uint32_t)0x00000004)§5CAN_F9R1_FB3 ((uint32_t)0x00000008)¨5CAN_F9R1_FB4 ((uint32_t)0x00000010)©5CAN_F9R1_FB5 ((uint32_t)0x00000020)ª5CAN_F9R1_FB6 ((uint32_t)0x00000040)«5CAN_F9R1_FB7 ((uint32_t)0x00000080)¬5CAN_F9R1_FB8 ((uint32_t)0x00000100)5CAN_F9R1_FB9 ((uint32_t)0x00000200)®5CAN_F9R1_FB10 ((uint32_t)0x00000400)¯5CAN_F9R1_FB11 ((uint32_t)0x00000800)°5CAN_F9R1_FB12 ((uint32_t)0x00001000)±5CAN_F9R1_FB13 ((uint32_t)0x00002000)²5CAN_F9R1_FB14 ((uint32_t)0x00004000)³5CAN_F9R1_FB15 ((uint32_t)0x00008000)´5CAN_F9R1_FB16 ((uint32_t)0x00010000)µ5CAN_F9R1_FB17 ((uint32_t)0x00020000)¶5CAN_F9R1_FB18 ((uint32_t)0x00040000)·5CAN_F9R1_FB19 ((uint32_t)0x00080000)¸5CAN_F9R1_FB20 ((uint32_t)0x00100000)¹5CAN_F9R1_FB21 ((uint32_t)0x00200000)º5CAN_F9R1_FB22 ((uint32_t)0x00400000)»5CAN_F9R1_FB23 ((uint32_t)0x00800000)¼5CAN_F9R1_FB24 ((uint32_t)0x01000000)½5CAN_F9R1_FB25 ((uint32_t)0x02000000)¾5CAN_F9R1_FB26 ((uint32_t)0x04000000)¿5CAN_F9R1_FB27 ((uint32_t)0x08000000)À5CAN_F9R1_FB28 ((uint32_t)0x10000000)Á5CAN_F9R1_FB29 ((uint32_t)0x20000000)Â5CAN_F9R1_FB30 ((uint32_t)0x40000000)Ã5CAN_F9R1_FB31 ((uint32_t)0x80000000)Æ5CAN_F10R1_FB0 ((uint32_t)0x00000001)Ç5CAN_F10R1_FB1 ((uint32_t)0x00000002)È5CAN_F10R1_FB2 ((uint32_t)0x00000004)É5CAN_F10R1_FB3 ((uint32_t)0x00000008)Ê5CAN_F10R1_FB4 ((uint32_t)0x00000010)Ë5CAN_F10R1_FB5 ((uint32_t)0x00000020)Ì5CAN_F10R1_FB6 ((uint32_t)0x00000040)Í5CAN_F10R1_FB7 ((uint32_t)0x00000080)Î5CAN_F10R1_FB8 ((uint32_t)0x00000100)Ï5CAN_F10R1_FB9 ((uint32_t)0x00000200)Ð5CAN_F10R1_FB10 ((uint32_t)0x00000400)Ñ5CAN_F10R1_FB11 ((uint32_t)0x00000800)Ò5CAN_F10R1_FB12 ((uint32_t)0x00001000)Ó5CAN_F10R1_FB13 ((uint32_t)0x00002000)Ô5CAN_F10R1_FB14 ((uint32_t)0x00004000)Õ5CAN_F10R1_FB15 ((uint32_t)0x00008000)Ö5CAN_F10R1_FB16 ((uint32_t)0x00010000)×5CAN_F10R1_FB17 ((uint32_t)0x00020000)Ø5CAN_F10R1_FB18 ((uint32_t)0x00040000)Ù5CAN_F10R1_FB19 ((uint32_t)0x00080000)Ú5CAN_F10R1_FB20 ((uint32_t)0x00100000)Û5CAN_F10R1_FB21 ((uint32_t)0x00200000)Ü5CAN_F10R1_FB22 ((uint32_t)0x00400000)Ý5CAN_F10R1_FB23 ((uint32_t)0x00800000)Þ5CAN_F10R1_FB24 ((uint32_t)0x01000000)ß5CAN_F10R1_FB25 ((uint32_t)0x02000000)à5CAN_F10R1_FB26 ((uint32_t)0x04000000)á5CAN_F10R1_FB27 ((uint32_t)0x08000000)â5CAN_F10R1_FB28 ((uint32_t)0x10000000)ã5CAN_F10R1_FB29 ((uint32_t)0x20000000)ä5CAN_F10R1_FB30 ((uint32_t)0x40000000)å5CAN_F10R1_FB31 ((uint32_t)0x80000000)è5CAN_F11R1_FB0 ((uint32_t)0x00000001)é5CAN_F11R1_FB1 ((uint32_t)0x00000002)ê5CAN_F11R1_FB2 ((uint32_t)0x00000004)ë5CAN_F11R1_FB3 ((uint32_t)0x00000008)ì5CAN_F11R1_FB4 ((uint32_t)0x00000010)í5CAN_F11R1_FB5 ((uint32_t)0x00000020)î5CAN_F11R1_FB6 ((uint32_t)0x00000040)ï5CAN_F11R1_FB7 ((uint32_t)0x00000080)ð5CAN_F11R1_FB8 ((uint32_t)0x00000100)ñ5CAN_F11R1_FB9 ((uint32_t)0x00000200)ò5CAN_F11R1_FB10 ((uint32_t)0x00000400)ó5CAN_F11R1_FB11 ((uint32_t)0x00000800)ô5CAN_F11R1_FB12 ((uint32_t)0x00001000)õ5CAN_F11R1_FB13 ((uint32_t)0x00002000)ö5CAN_F11R1_FB14 ((uint32_t)0x00004000)÷5CAN_F11R1_FB15 ((uint32_t)0x00008000)ø5CAN_F11R1_FB16 ((uint32_t)0x00010000)ù5CAN_F11R1_FB17 ((uint32_t)0x00020000)ú5CAN_F11R1_FB18 ((uint32_t)0x00040000)û5CAN_F11R1_FB19 ((uint32_t)0x00080000)ü5CAN_F11R1_FB20 ((uint32_t)0x00100000)ý5CAN_F11R1_FB21 ((uint32_t)0x00200000)þ5CAN_F11R1_FB22 ((uint32_t)0x00400000)ÿ5CAN_F11R1_FB23 ((uint32_t)0x00800000)6CAN_F11R1_FB24 ((uint32_t)0x01000000)6CAN_F11R1_FB25 ((uint32_t)0x02000000)6CAN_F11R1_FB26 ((uint32_t)0x04000000)6CAN_F11R1_FB27 ((uint32_t)0x08000000)6CAN_F11R1_FB28 ((uint32_t)0x10000000)6CAN_F11R1_FB29 ((uint32_t)0x20000000)6CAN_F11R1_FB30 ((uint32_t)0x40000000)6CAN_F11R1_FB31 ((uint32_t)0x80000000)6CAN_F12R1_FB0 ((uint32_t)0x00000001)6CAN_F12R1_FB1 ((uint32_t)0x00000002)6CAN_F12R1_FB2 ((uint32_t)0x00000004)6CAN_F12R1_FB3 ((uint32_t)0x00000008)6CAN_F12R1_FB4 ((uint32_t)0x00000010)6CAN_F12R1_FB5 ((uint32_t)0x00000020)6CAN_F12R1_FB6 ((uint32_t)0x00000040)6CAN_F12R1_FB7 ((uint32_t)0x00000080)6CAN_F12R1_FB8 ((uint32_t)0x00000100)6CAN_F12R1_FB9 ((uint32_t)0x00000200)6CAN_F12R1_FB10 ((uint32_t)0x00000400)6CAN_F12R1_FB11 ((uint32_t)0x00000800)6CAN_F12R1_FB12 ((uint32_t)0x00001000)6CAN_F12R1_FB13 ((uint32_t)0x00002000)6CAN_F12R1_FB14 ((uint32_t)0x00004000)6CAN_F12R1_FB15 ((uint32_t)0x00008000)6CAN_F12R1_FB16 ((uint32_t)0x00010000)6CAN_F12R1_FB17 ((uint32_t)0x00020000)6CAN_F12R1_FB18 ((uint32_t)0x00040000)6CAN_F12R1_FB19 ((uint32_t)0x00080000)6CAN_F12R1_FB20 ((uint32_t)0x00100000)6CAN_F12R1_FB21 ((uint32_t)0x00200000) 6CAN_F12R1_FB22 ((uint32_t)0x00400000)¡6CAN_F12R1_FB23 ((uint32_t)0x00800000)¢6CAN_F12R1_FB24 ((uint32_t)0x01000000)£6CAN_F12R1_FB25 ((uint32_t)0x02000000)¤6CAN_F12R1_FB26 ((uint32_t)0x04000000)¥6CAN_F12R1_FB27 ((uint32_t)0x08000000)¦6CAN_F12R1_FB28 ((uint32_t)0x10000000)§6CAN_F12R1_FB29 ((uint32_t)0x20000000)¨6CAN_F12R1_FB30 ((uint32_t)0x40000000)©6CAN_F12R1_FB31 ((uint32_t)0x80000000)¬6CAN_F13R1_FB0 ((uint32_t)0x00000001)6CAN_F13R1_FB1 ((uint32_t)0x00000002)®6CAN_F13R1_FB2 ((uint32_t)0x00000004)¯6CAN_F13R1_FB3 ((uint32_t)0x00000008)°6CAN_F13R1_FB4 ((uint32_t)0x00000010)±6CAN_F13R1_FB5 ((uint32_t)0x00000020)²6CAN_F13R1_FB6 ((uint32_t)0x00000040)³6CAN_F13R1_FB7 ((uint32_t)0x00000080)´6CAN_F13R1_FB8 ((uint32_t)0x00000100)µ6CAN_F13R1_FB9 ((uint32_t)0x00000200)¶6CAN_F13R1_FB10 ((uint32_t)0x00000400)·6CAN_F13R1_FB11 ((uint32_t)0x00000800)¸6CAN_F13R1_FB12 ((uint32_t)0x00001000)¹6CAN_F13R1_FB13 ((uint32_t)0x00002000)º6CAN_F13R1_FB14 ((uint32_t)0x00004000)»6CAN_F13R1_FB15 ((uint32_t)0x00008000)¼6CAN_F13R1_FB16 ((uint32_t)0x00010000)½6CAN_F13R1_FB17 ((uint32_t)0x00020000)¾6CAN_F13R1_FB18 ((uint32_t)0x00040000)¿6CAN_F13R1_FB19 ((uint32_t)0x00080000)À6CAN_F13R1_FB20 ((uint32_t)0x00100000)Á6CAN_F13R1_FB21 ((uint32_t)0x00200000)Â6CAN_F13R1_FB22 ((uint32_t)0x00400000)Ã6CAN_F13R1_FB23 ((uint32_t)0x00800000)Ä6CAN_F13R1_FB24 ((uint32_t)0x01000000)Å6CAN_F13R1_FB25 ((uint32_t)0x02000000)Æ6CAN_F13R1_FB26 ((uint32_t)0x04000000)Ç6CAN_F13R1_FB27 ((uint32_t)0x08000000)È6CAN_F13R1_FB28 ((uint32_t)0x10000000)É6CAN_F13R1_FB29 ((uint32_t)0x20000000)Ê6CAN_F13R1_FB30 ((uint32_t)0x40000000)Ë6CAN_F13R1_FB31 ((uint32_t)0x80000000)Î6CAN_F0R2_FB0 ((uint32_t)0x00000001)Ï6CAN_F0R2_FB1 ((uint32_t)0x00000002)Ð6CAN_F0R2_FB2 ((uint32_t)0x00000004)Ñ6CAN_F0R2_FB3 ((uint32_t)0x00000008)Ò6CAN_F0R2_FB4 ((uint32_t)0x00000010)Ó6CAN_F0R2_FB5 ((uint32_t)0x00000020)Ô6CAN_F0R2_FB6 ((uint32_t)0x00000040)Õ6CAN_F0R2_FB7 ((uint32_t)0x00000080)Ö6CAN_F0R2_FB8 ((uint32_t)0x00000100)×6CAN_F0R2_FB9 ((uint32_t)0x00000200)Ø6CAN_F0R2_FB10 ((uint32_t)0x00000400)Ù6CAN_F0R2_FB11 ((uint32_t)0x00000800)Ú6CAN_F0R2_FB12 ((uint32_t)0x00001000)Û6CAN_F0R2_FB13 ((uint32_t)0x00002000)Ü6CAN_F0R2_FB14 ((uint32_t)0x00004000)Ý6CAN_F0R2_FB15 ((uint32_t)0x00008000)Þ6CAN_F0R2_FB16 ((uint32_t)0x00010000)ß6CAN_F0R2_FB17 ((uint32_t)0x00020000)à6CAN_F0R2_FB18 ((uint32_t)0x00040000)á6CAN_F0R2_FB19 ((uint32_t)0x00080000)â6CAN_F0R2_FB20 ((uint32_t)0x00100000)ã6CAN_F0R2_FB21 ((uint32_t)0x00200000)ä6CAN_F0R2_FB22 ((uint32_t)0x00400000)å6CAN_F0R2_FB23 ((uint32_t)0x00800000)æ6CAN_F0R2_FB24 ((uint32_t)0x01000000)ç6CAN_F0R2_FB25 ((uint32_t)0x02000000)è6CAN_F0R2_FB26 ((uint32_t)0x04000000)é6CAN_F0R2_FB27 ((uint32_t)0x08000000)ê6CAN_F0R2_FB28 ((uint32_t)0x10000000)ë6CAN_F0R2_FB29 ((uint32_t)0x20000000)ì6CAN_F0R2_FB30 ((uint32_t)0x40000000)í6CAN_F0R2_FB31 ((uint32_t)0x80000000)ð6CAN_F1R2_FB0 ((uint32_t)0x00000001)ñ6CAN_F1R2_FB1 ((uint32_t)0x00000002)ò6CAN_F1R2_FB2 ((uint32_t)0x00000004)ó6CAN_F1R2_FB3 ((uint32_t)0x00000008)ô6CAN_F1R2_FB4 ((uint32_t)0x00000010)õ6CAN_F1R2_FB5 ((uint32_t)0x00000020)ö6CAN_F1R2_FB6 ((uint32_t)0x00000040)÷6CAN_F1R2_FB7 ((uint32_t)0x00000080)ø6CAN_F1R2_FB8 ((uint32_t)0x00000100)ù6CAN_F1R2_FB9 ((uint32_t)0x00000200)ú6CAN_F1R2_FB10 ((uint32_t)0x00000400)û6CAN_F1R2_FB11 ((uint32_t)0x00000800)ü6CAN_F1R2_FB12 ((uint32_t)0x00001000)ý6CAN_F1R2_FB13 ((uint32_t)0x00002000)þ6CAN_F1R2_FB14 ((uint32_t)0x00004000)ÿ6CAN_F1R2_FB15 ((uint32_t)0x00008000)7CAN_F1R2_FB16 ((uint32_t)0x00010000)7CAN_F1R2_FB17 ((uint32_t)0x00020000)7CAN_F1R2_FB18 ((uint32_t)0x00040000)7CAN_F1R2_FB19 ((uint32_t)0x00080000)7CAN_F1R2_FB20 ((uint32_t)0x00100000)7CAN_F1R2_FB21 ((uint32_t)0x00200000)7CAN_F1R2_FB22 ((uint32_t)0x00400000)7CAN_F1R2_FB23 ((uint32_t)0x00800000)7CAN_F1R2_FB24 ((uint32_t)0x01000000)7CAN_F1R2_FB25 ((uint32_t)0x02000000)7CAN_F1R2_FB26 ((uint32_t)0x04000000)7CAN_F1R2_FB27 ((uint32_t)0x08000000)7CAN_F1R2_FB28 ((uint32_t)0x10000000)7CAN_F1R2_FB29 ((uint32_t)0x20000000)7CAN_F1R2_FB30 ((uint32_t)0x40000000)7CAN_F1R2_FB31 ((uint32_t)0x80000000)7CAN_F2R2_FB0 ((uint32_t)0x00000001)7CAN_F2R2_FB1 ((uint32_t)0x00000002)7CAN_F2R2_FB2 ((uint32_t)0x00000004)7CAN_F2R2_FB3 ((uint32_t)0x00000008)7CAN_F2R2_FB4 ((uint32_t)0x00000010)7CAN_F2R2_FB5 ((uint32_t)0x00000020)7CAN_F2R2_FB6 ((uint32_t)0x00000040)7CAN_F2R2_FB7 ((uint32_t)0x00000080)7CAN_F2R2_FB8 ((uint32_t)0x00000100)7CAN_F2R2_FB9 ((uint32_t)0x00000200)7CAN_F2R2_FB10 ((uint32_t)0x00000400)7CAN_F2R2_FB11 ((uint32_t)0x00000800)7CAN_F2R2_FB12 ((uint32_t)0x00001000)7CAN_F2R2_FB13 ((uint32_t)0x00002000) 7CAN_F2R2_FB14 ((uint32_t)0x00004000)¡7CAN_F2R2_FB15 ((uint32_t)0x00008000)¢7CAN_F2R2_FB16 ((uint32_t)0x00010000)£7CAN_F2R2_FB17 ((uint32_t)0x00020000)¤7CAN_F2R2_FB18 ((uint32_t)0x00040000)¥7CAN_F2R2_FB19 ((uint32_t)0x00080000)¦7CAN_F2R2_FB20 ((uint32_t)0x00100000)§7CAN_F2R2_FB21 ((uint32_t)0x00200000)¨7CAN_F2R2_FB22 ((uint32_t)0x00400000)©7CAN_F2R2_FB23 ((uint32_t)0x00800000)ª7CAN_F2R2_FB24 ((uint32_t)0x01000000)«7CAN_F2R2_FB25 ((uint32_t)0x02000000)¬7CAN_F2R2_FB26 ((uint32_t)0x04000000)7CAN_F2R2_FB27 ((uint32_t)0x08000000)®7CAN_F2R2_FB28 ((uint32_t)0x10000000)¯7CAN_F2R2_FB29 ((uint32_t)0x20000000)°7CAN_F2R2_FB30 ((uint32_t)0x40000000)±7CAN_F2R2_FB31 ((uint32_t)0x80000000)´7CAN_F3R2_FB0 ((uint32_t)0x00000001)µ7CAN_F3R2_FB1 ((uint32_t)0x00000002)¶7CAN_F3R2_FB2 ((uint32_t)0x00000004)·7CAN_F3R2_FB3 ((uint32_t)0x00000008)¸7CAN_F3R2_FB4 ((uint32_t)0x00000010)¹7CAN_F3R2_FB5 ((uint32_t)0x00000020)º7CAN_F3R2_FB6 ((uint32_t)0x00000040)»7CAN_F3R2_FB7 ((uint32_t)0x00000080)¼7CAN_F3R2_FB8 ((uint32_t)0x00000100)½7CAN_F3R2_FB9 ((uint32_t)0x00000200)¾7CAN_F3R2_FB10 ((uint32_t)0x00000400)¿7CAN_F3R2_FB11 ((uint32_t)0x00000800)À7CAN_F3R2_FB12 ((uint32_t)0x00001000)Á7CAN_F3R2_FB13 ((uint32_t)0x00002000)Â7CAN_F3R2_FB14 ((uint32_t)0x00004000)Ã7CAN_F3R2_FB15 ((uint32_t)0x00008000)Ä7CAN_F3R2_FB16 ((uint32_t)0x00010000)Å7CAN_F3R2_FB17 ((uint32_t)0x00020000)Æ7CAN_F3R2_FB18 ((uint32_t)0x00040000)Ç7CAN_F3R2_FB19 ((uint32_t)0x00080000)È7CAN_F3R2_FB20 ((uint32_t)0x00100000)É7CAN_F3R2_FB21 ((uint32_t)0x00200000)Ê7CAN_F3R2_FB22 ((uint32_t)0x00400000)Ë7CAN_F3R2_FB23 ((uint32_t)0x00800000)Ì7CAN_F3R2_FB24 ((uint32_t)0x01000000)Í7CAN_F3R2_FB25 ((uint32_t)0x02000000)Î7CAN_F3R2_FB26 ((uint32_t)0x04000000)Ï7CAN_F3R2_FB27 ((uint32_t)0x08000000)Ð7CAN_F3R2_FB28 ((uint32_t)0x10000000)Ñ7CAN_F3R2_FB29 ((uint32_t)0x20000000)Ò7CAN_F3R2_FB30 ((uint32_t)0x40000000)Ó7CAN_F3R2_FB31 ((uint32_t)0x80000000)Ö7CAN_F4R2_FB0 ((uint32_t)0x00000001)×7CAN_F4R2_FB1 ((uint32_t)0x00000002)Ø7CAN_F4R2_FB2 ((uint32_t)0x00000004)Ù7CAN_F4R2_FB3 ((uint32_t)0x00000008)Ú7CAN_F4R2_FB4 ((uint32_t)0x00000010)Û7CAN_F4R2_FB5 ((uint32_t)0x00000020)Ü7CAN_F4R2_FB6 ((uint32_t)0x00000040)Ý7CAN_F4R2_FB7 ((uint32_t)0x00000080)Þ7CAN_F4R2_FB8 ((uint32_t)0x00000100)ß7CAN_F4R2_FB9 ((uint32_t)0x00000200)à7CAN_F4R2_FB10 ((uint32_t)0x00000400)á7CAN_F4R2_FB11 ((uint32_t)0x00000800)â7CAN_F4R2_FB12 ((uint32_t)0x00001000)ã7CAN_F4R2_FB13 ((uint32_t)0x00002000)ä7CAN_F4R2_FB14 ((uint32_t)0x00004000)å7CAN_F4R2_FB15 ((uint32_t)0x00008000)æ7CAN_F4R2_FB16 ((uint32_t)0x00010000)ç7CAN_F4R2_FB17 ((uint32_t)0x00020000)è7CAN_F4R2_FB18 ((uint32_t)0x00040000)é7CAN_F4R2_FB19 ((uint32_t)0x00080000)ê7CAN_F4R2_FB20 ((uint32_t)0x00100000)ë7CAN_F4R2_FB21 ((uint32_t)0x00200000)ì7CAN_F4R2_FB22 ((uint32_t)0x00400000)í7CAN_F4R2_FB23 ((uint32_t)0x00800000)î7CAN_F4R2_FB24 ((uint32_t)0x01000000)ï7CAN_F4R2_FB25 ((uint32_t)0x02000000)ð7CAN_F4R2_FB26 ((uint32_t)0x04000000)ñ7CAN_F4R2_FB27 ((uint32_t)0x08000000)ò7CAN_F4R2_FB28 ((uint32_t)0x10000000)ó7CAN_F4R2_FB29 ((uint32_t)0x20000000)ô7CAN_F4R2_FB30 ((uint32_t)0x40000000)õ7CAN_F4R2_FB31 ((uint32_t)0x80000000)ø7CAN_F5R2_FB0 ((uint32_t)0x00000001)ù7CAN_F5R2_FB1 ((uint32_t)0x00000002)ú7CAN_F5R2_FB2 ((uint32_t)0x00000004)û7CAN_F5R2_FB3 ((uint32_t)0x00000008)ü7CAN_F5R2_FB4 ((uint32_t)0x00000010)ý7CAN_F5R2_FB5 ((uint32_t)0x00000020)þ7CAN_F5R2_FB6 ((uint32_t)0x00000040)ÿ7CAN_F5R2_FB7 ((uint32_t)0x00000080)8CAN_F5R2_FB8 ((uint32_t)0x00000100)8CAN_F5R2_FB9 ((uint32_t)0x00000200)8CAN_F5R2_FB10 ((uint32_t)0x00000400)8CAN_F5R2_FB11 ((uint32_t)0x00000800)8CAN_F5R2_FB12 ((uint32_t)0x00001000)8CAN_F5R2_FB13 ((uint32_t)0x00002000)8CAN_F5R2_FB14 ((uint32_t)0x00004000)8CAN_F5R2_FB15 ((uint32_t)0x00008000)8CAN_F5R2_FB16 ((uint32_t)0x00010000)8CAN_F5R2_FB17 ((uint32_t)0x00020000)8CAN_F5R2_FB18 ((uint32_t)0x00040000)8CAN_F5R2_FB19 ((uint32_t)0x00080000)8CAN_F5R2_FB20 ((uint32_t)0x00100000)8CAN_F5R2_FB21 ((uint32_t)0x00200000)8CAN_F5R2_FB22 ((uint32_t)0x00400000)8CAN_F5R2_FB23 ((uint32_t)0x00800000)8CAN_F5R2_FB24 ((uint32_t)0x01000000)8CAN_F5R2_FB25 ((uint32_t)0x02000000)8CAN_F5R2_FB26 ((uint32_t)0x04000000)8CAN_F5R2_FB27 ((uint32_t)0x08000000)8CAN_F5R2_FB28 ((uint32_t)0x10000000)8CAN_F5R2_FB29 ((uint32_t)0x20000000)8CAN_F5R2_FB30 ((uint32_t)0x40000000)8CAN_F5R2_FB31 ((uint32_t)0x80000000)8CAN_F6R2_FB0 ((uint32_t)0x00000001)8CAN_F6R2_FB1 ((uint32_t)0x00000002)8CAN_F6R2_FB2 ((uint32_t)0x00000004)8CAN_F6R2_FB3 ((uint32_t)0x00000008)8CAN_F6R2_FB4 ((uint32_t)0x00000010)8CAN_F6R2_FB5 ((uint32_t)0x00000020) 8CAN_F6R2_FB6 ((uint32_t)0x00000040)¡8CAN_F6R2_FB7 ((uint32_t)0x00000080)¢8CAN_F6R2_FB8 ((uint32_t)0x00000100)£8CAN_F6R2_FB9 ((uint32_t)0x00000200)¤8CAN_F6R2_FB10 ((uint32_t)0x00000400)¥8CAN_F6R2_FB11 ((uint32_t)0x00000800)¦8CAN_F6R2_FB12 ((uint32_t)0x00001000)§8CAN_F6R2_FB13 ((uint32_t)0x00002000)¨8CAN_F6R2_FB14 ((uint32_t)0x00004000)©8CAN_F6R2_FB15 ((uint32_t)0x00008000)ª8CAN_F6R2_FB16 ((uint32_t)0x00010000)«8CAN_F6R2_FB17 ((uint32_t)0x00020000)¬8CAN_F6R2_FB18 ((uint32_t)0x00040000)8CAN_F6R2_FB19 ((uint32_t)0x00080000)®8CAN_F6R2_FB20 ((uint32_t)0x00100000)¯8CAN_F6R2_FB21 ((uint32_t)0x00200000)°8CAN_F6R2_FB22 ((uint32_t)0x00400000)±8CAN_F6R2_FB23 ((uint32_t)0x00800000)²8CAN_F6R2_FB24 ((uint32_t)0x01000000)³8CAN_F6R2_FB25 ((uint32_t)0x02000000)´8CAN_F6R2_FB26 ((uint32_t)0x04000000)µ8CAN_F6R2_FB27 ((uint32_t)0x08000000)¶8CAN_F6R2_FB28 ((uint32_t)0x10000000)·8CAN_F6R2_FB29 ((uint32_t)0x20000000)¸8CAN_F6R2_FB30 ((uint32_t)0x40000000)¹8CAN_F6R2_FB31 ((uint32_t)0x80000000)¼8CAN_F7R2_FB0 ((uint32_t)0x00000001)½8CAN_F7R2_FB1 ((uint32_t)0x00000002)¾8CAN_F7R2_FB2 ((uint32_t)0x00000004)¿8CAN_F7R2_FB3 ((uint32_t)0x00000008)À8CAN_F7R2_FB4 ((uint32_t)0x00000010)Á8CAN_F7R2_FB5 ((uint32_t)0x00000020)Â8CAN_F7R2_FB6 ((uint32_t)0x00000040)Ã8CAN_F7R2_FB7 ((uint32_t)0x00000080)Ä8CAN_F7R2_FB8 ((uint32_t)0x00000100)Å8CAN_F7R2_FB9 ((uint32_t)0x00000200)Æ8CAN_F7R2_FB10 ((uint32_t)0x00000400)Ç8CAN_F7R2_FB11 ((uint32_t)0x00000800)È8CAN_F7R2_FB12 ((uint32_t)0x00001000)É8CAN_F7R2_FB13 ((uint32_t)0x00002000)Ê8CAN_F7R2_FB14 ((uint32_t)0x00004000)Ë8CAN_F7R2_FB15 ((uint32_t)0x00008000)Ì8CAN_F7R2_FB16 ((uint32_t)0x00010000)Í8CAN_F7R2_FB17 ((uint32_t)0x00020000)Î8CAN_F7R2_FB18 ((uint32_t)0x00040000)Ï8CAN_F7R2_FB19 ((uint32_t)0x00080000)Ð8CAN_F7R2_FB20 ((uint32_t)0x00100000)Ñ8CAN_F7R2_FB21 ((uint32_t)0x00200000)Ò8CAN_F7R2_FB22 ((uint32_t)0x00400000)Ó8CAN_F7R2_FB23 ((uint32_t)0x00800000)Ô8CAN_F7R2_FB24 ((uint32_t)0x01000000)Õ8CAN_F7R2_FB25 ((uint32_t)0x02000000)Ö8CAN_F7R2_FB26 ((uint32_t)0x04000000)×8CAN_F7R2_FB27 ((uint32_t)0x08000000)Ø8CAN_F7R2_FB28 ((uint32_t)0x10000000)Ù8CAN_F7R2_FB29 ((uint32_t)0x20000000)Ú8CAN_F7R2_FB30 ((uint32_t)0x40000000)Û8CAN_F7R2_FB31 ((uint32_t)0x80000000)Þ8CAN_F8R2_FB0 ((uint32_t)0x00000001)ß8CAN_F8R2_FB1 ((uint32_t)0x00000002)à8CAN_F8R2_FB2 ((uint32_t)0x00000004)á8CAN_F8R2_FB3 ((uint32_t)0x00000008)â8CAN_F8R2_FB4 ((uint32_t)0x00000010)ã8CAN_F8R2_FB5 ((uint32_t)0x00000020)ä8CAN_F8R2_FB6 ((uint32_t)0x00000040)å8CAN_F8R2_FB7 ((uint32_t)0x00000080)æ8CAN_F8R2_FB8 ((uint32_t)0x00000100)ç8CAN_F8R2_FB9 ((uint32_t)0x00000200)è8CAN_F8R2_FB10 ((uint32_t)0x00000400)é8CAN_F8R2_FB11 ((uint32_t)0x00000800)ê8CAN_F8R2_FB12 ((uint32_t)0x00001000)ë8CAN_F8R2_FB13 ((uint32_t)0x00002000)ì8CAN_F8R2_FB14 ((uint32_t)0x00004000)í8CAN_F8R2_FB15 ((uint32_t)0x00008000)î8CAN_F8R2_FB16 ((uint32_t)0x00010000)ï8CAN_F8R2_FB17 ((uint32_t)0x00020000)ð8CAN_F8R2_FB18 ((uint32_t)0x00040000)ñ8CAN_F8R2_FB19 ((uint32_t)0x00080000)ò8CAN_F8R2_FB20 ((uint32_t)0x00100000)ó8CAN_F8R2_FB21 ((uint32_t)0x00200000)ô8CAN_F8R2_FB22 ((uint32_t)0x00400000)õ8CAN_F8R2_FB23 ((uint32_t)0x00800000)ö8CAN_F8R2_FB24 ((uint32_t)0x01000000)÷8CAN_F8R2_FB25 ((uint32_t)0x02000000)ø8CAN_F8R2_FB26 ((uint32_t)0x04000000)ù8CAN_F8R2_FB27 ((uint32_t)0x08000000)ú8CAN_F8R2_FB28 ((uint32_t)0x10000000)û8CAN_F8R2_FB29 ((uint32_t)0x20000000)ü8CAN_F8R2_FB30 ((uint32_t)0x40000000)ý8CAN_F8R2_FB31 ((uint32_t)0x80000000)9CAN_F9R2_FB0 ((uint32_t)0x00000001)9CAN_F9R2_FB1 ((uint32_t)0x00000002)9CAN_F9R2_FB2 ((uint32_t)0x00000004)9CAN_F9R2_FB3 ((uint32_t)0x00000008)9CAN_F9R2_FB4 ((uint32_t)0x00000010)9CAN_F9R2_FB5 ((uint32_t)0x00000020)9CAN_F9R2_FB6 ((uint32_t)0x00000040)9CAN_F9R2_FB7 ((uint32_t)0x00000080)9CAN_F9R2_FB8 ((uint32_t)0x00000100)9CAN_F9R2_FB9 ((uint32_t)0x00000200)9CAN_F9R2_FB10 ((uint32_t)0x00000400)9CAN_F9R2_FB11 ((uint32_t)0x00000800)9CAN_F9R2_FB12 ((uint32_t)0x00001000)9CAN_F9R2_FB13 ((uint32_t)0x00002000)9CAN_F9R2_FB14 ((uint32_t)0x00004000)9CAN_F9R2_FB15 ((uint32_t)0x00008000)9CAN_F9R2_FB16 ((uint32_t)0x00010000)9CAN_F9R2_FB17 ((uint32_t)0x00020000)9CAN_F9R2_FB18 ((uint32_t)0x00040000)9CAN_F9R2_FB19 ((uint32_t)0x00080000)9CAN_F9R2_FB20 ((uint32_t)0x00100000)9CAN_F9R2_FB21 ((uint32_t)0x00200000)9CAN_F9R2_FB22 ((uint32_t)0x00400000)9CAN_F9R2_FB23 ((uint32_t)0x00800000)9CAN_F9R2_FB24 ((uint32_t)0x01000000)9CAN_F9R2_FB25 ((uint32_t)0x02000000)9CAN_F9R2_FB26 ((uint32_t)0x04000000)9CAN_F9R2_FB27 ((uint32_t)0x08000000)9CAN_F9R2_FB28 ((uint32_t)0x10000000)9CAN_F9R2_FB29 ((uint32_t)0x20000000)9CAN_F9R2_FB30 ((uint32_t)0x40000000)9CAN_F9R2_FB31 ((uint32_t)0x80000000)¢9CAN_F10R2_FB0 ((uint32_t)0x00000001)£9CAN_F10R2_FB1 ((uint32_t)0x00000002)¤9CAN_F10R2_FB2 ((uint32_t)0x00000004)¥9CAN_F10R2_FB3 ((uint32_t)0x00000008)¦9CAN_F10R2_FB4 ((uint32_t)0x00000010)§9CAN_F10R2_FB5 ((uint32_t)0x00000020)¨9CAN_F10R2_FB6 ((uint32_t)0x00000040)©9CAN_F10R2_FB7 ((uint32_t)0x00000080)ª9CAN_F10R2_FB8 ((uint32_t)0x00000100)«9CAN_F10R2_FB9 ((uint32_t)0x00000200)¬9CAN_F10R2_FB10 ((uint32_t)0x00000400)9CAN_F10R2_FB11 ((uint32_t)0x00000800)®9CAN_F10R2_FB12 ((uint32_t)0x00001000)¯9CAN_F10R2_FB13 ((uint32_t)0x00002000)°9CAN_F10R2_FB14 ((uint32_t)0x00004000)±9CAN_F10R2_FB15 ((uint32_t)0x00008000)²9CAN_F10R2_FB16 ((uint32_t)0x00010000)³9CAN_F10R2_FB17 ((uint32_t)0x00020000)´9CAN_F10R2_FB18 ((uint32_t)0x00040000)µ9CAN_F10R2_FB19 ((uint32_t)0x00080000)¶9CAN_F10R2_FB20 ((uint32_t)0x00100000)·9CAN_F10R2_FB21 ((uint32_t)0x00200000)¸9CAN_F10R2_FB22 ((uint32_t)0x00400000)¹9CAN_F10R2_FB23 ((uint32_t)0x00800000)º9CAN_F10R2_FB24 ((uint32_t)0x01000000)»9CAN_F10R2_FB25 ((uint32_t)0x02000000)¼9CAN_F10R2_FB26 ((uint32_t)0x04000000)½9CAN_F10R2_FB27 ((uint32_t)0x08000000)¾9CAN_F10R2_FB28 ((uint32_t)0x10000000)¿9CAN_F10R2_FB29 ((uint32_t)0x20000000)À9CAN_F10R2_FB30 ((uint32_t)0x40000000)Á9CAN_F10R2_FB31 ((uint32_t)0x80000000)Ä9CAN_F11R2_FB0 ((uint32_t)0x00000001)Å9CAN_F11R2_FB1 ((uint32_t)0x00000002)Æ9CAN_F11R2_FB2 ((uint32_t)0x00000004)Ç9CAN_F11R2_FB3 ((uint32_t)0x00000008)È9CAN_F11R2_FB4 ((uint32_t)0x00000010)É9CAN_F11R2_FB5 ((uint32_t)0x00000020)Ê9CAN_F11R2_FB6 ((uint32_t)0x00000040)Ë9CAN_F11R2_FB7 ((uint32_t)0x00000080)Ì9CAN_F11R2_FB8 ((uint32_t)0x00000100)Í9CAN_F11R2_FB9 ((uint32_t)0x00000200)Î9CAN_F11R2_FB10 ((uint32_t)0x00000400)Ï9CAN_F11R2_FB11 ((uint32_t)0x00000800)Ð9CAN_F11R2_FB12 ((uint32_t)0x00001000)Ñ9CAN_F11R2_FB13 ((uint32_t)0x00002000)Ò9CAN_F11R2_FB14 ((uint32_t)0x00004000)Ó9CAN_F11R2_FB15 ((uint32_t)0x00008000)Ô9CAN_F11R2_FB16 ((uint32_t)0x00010000)Õ9CAN_F11R2_FB17 ((uint32_t)0x00020000)Ö9CAN_F11R2_FB18 ((uint32_t)0x00040000)×9CAN_F11R2_FB19 ((uint32_t)0x00080000)Ø9CAN_F11R2_FB20 ((uint32_t)0x00100000)Ù9CAN_F11R2_FB21 ((uint32_t)0x00200000)Ú9CAN_F11R2_FB22 ((uint32_t)0x00400000)Û9CAN_F11R2_FB23 ((uint32_t)0x00800000)Ü9CAN_F11R2_FB24 ((uint32_t)0x01000000)Ý9CAN_F11R2_FB25 ((uint32_t)0x02000000)Þ9CAN_F11R2_FB26 ((uint32_t)0x04000000)ß9CAN_F11R2_FB27 ((uint32_t)0x08000000)à9CAN_F11R2_FB28 ((uint32_t)0x10000000)á9CAN_F11R2_FB29 ((uint32_t)0x20000000)â9CAN_F11R2_FB30 ((uint32_t)0x40000000)ã9CAN_F11R2_FB31 ((uint32_t)0x80000000)æ9CAN_F12R2_FB0 ((uint32_t)0x00000001)ç9CAN_F12R2_FB1 ((uint32_t)0x00000002)è9CAN_F12R2_FB2 ((uint32_t)0x00000004)é9CAN_F12R2_FB3 ((uint32_t)0x00000008)ê9CAN_F12R2_FB4 ((uint32_t)0x00000010)ë9CAN_F12R2_FB5 ((uint32_t)0x00000020)ì9CAN_F12R2_FB6 ((uint32_t)0x00000040)í9CAN_F12R2_FB7 ((uint32_t)0x00000080)î9CAN_F12R2_FB8 ((uint32_t)0x00000100)ï9CAN_F12R2_FB9 ((uint32_t)0x00000200)ð9CAN_F12R2_FB10 ((uint32_t)0x00000400)ñ9CAN_F12R2_FB11 ((uint32_t)0x00000800)ò9CAN_F12R2_FB12 ((uint32_t)0x00001000)ó9CAN_F12R2_FB13 ((uint32_t)0x00002000)ô9CAN_F12R2_FB14 ((uint32_t)0x00004000)õ9CAN_F12R2_FB15 ((uint32_t)0x00008000)ö9CAN_F12R2_FB16 ((uint32_t)0x00010000)÷9CAN_F12R2_FB17 ((uint32_t)0x00020000)ø9CAN_F12R2_FB18 ((uint32_t)0x00040000)ù9CAN_F12R2_FB19 ((uint32_t)0x00080000)ú9CAN_F12R2_FB20 ((uint32_t)0x00100000)û9CAN_F12R2_FB21 ((uint32_t)0x00200000)ü9CAN_F12R2_FB22 ((uint32_t)0x00400000)ý9CAN_F12R2_FB23 ((uint32_t)0x00800000)þ9CAN_F12R2_FB24 ((uint32_t)0x01000000)ÿ9CAN_F12R2_FB25 ((uint32_t)0x02000000):CAN_F12R2_FB26 ((uint32_t)0x04000000):CAN_F12R2_FB27 ((uint32_t)0x08000000):CAN_F12R2_FB28 ((uint32_t)0x10000000):CAN_F12R2_FB29 ((uint32_t)0x20000000):CAN_F12R2_FB30 ((uint32_t)0x40000000):CAN_F12R2_FB31 ((uint32_t)0x80000000):CAN_F13R2_FB0 ((uint32_t)0x00000001):CAN_F13R2_FB1 ((uint32_t)0x00000002):CAN_F13R2_FB2 ((uint32_t)0x00000004):CAN_F13R2_FB3 ((uint32_t)0x00000008):CAN_F13R2_FB4 ((uint32_t)0x00000010):CAN_F13R2_FB5 ((uint32_t)0x00000020):CAN_F13R2_FB6 ((uint32_t)0x00000040):CAN_F13R2_FB7 ((uint32_t)0x00000080):CAN_F13R2_FB8 ((uint32_t)0x00000100):CAN_F13R2_FB9 ((uint32_t)0x00000200):CAN_F13R2_FB10 ((uint32_t)0x00000400):CAN_F13R2_FB11 ((uint32_t)0x00000800):CAN_F13R2_FB12 ((uint32_t)0x00001000):CAN_F13R2_FB13 ((uint32_t)0x00002000):CAN_F13R2_FB14 ((uint32_t)0x00004000):CAN_F13R2_FB15 ((uint32_t)0x00008000):CAN_F13R2_FB16 ((uint32_t)0x00010000):CAN_F13R2_FB17 ((uint32_t)0x00020000):CAN_F13R2_FB18 ((uint32_t)0x00040000):CAN_F13R2_FB19 ((uint32_t)0x00080000):CAN_F13R2_FB20 ((uint32_t)0x00100000):CAN_F13R2_FB21 ((uint32_t)0x00200000):CAN_F13R2_FB22 ((uint32_t)0x00400000):CAN_F13R2_FB23 ((uint32_t)0x00800000) :CAN_F13R2_FB24 ((uint32_t)0x01000000)¡:CAN_F13R2_FB25 ((uint32_t)0x02000000)¢:CAN_F13R2_FB26 ((uint32_t)0x04000000)£:CAN_F13R2_FB27 ((uint32_t)0x08000000)¤:CAN_F13R2_FB28 ((uint32_t)0x10000000)¥:CAN_F13R2_FB29 ((uint32_t)0x20000000)¦:CAN_F13R2_FB30 ((uint32_t)0x40000000)§:CAN_F13R2_FB31 ((uint32_t)0x80000000)°:SPI_CR1_CPHA ((uint16_t)0x0001)±:SPI_CR1_CPOL ((uint16_t)0x0002)²:SPI_CR1_MSTR ((uint16_t)0x0004)´:SPI_CR1_BR ((uint16_t)0x0038)µ:SPI_CR1_BR_0 ((uint16_t)0x0008)¶:SPI_CR1_BR_1 ((uint16_t)0x0010)·:SPI_CR1_BR_2 ((uint16_t)0x0020)¹:SPI_CR1_SPE ((uint16_t)0x0040)º:SPI_CR1_LSBFIRST ((uint16_t)0x0080)»:SPI_CR1_SSI ((uint16_t)0x0100)¼:SPI_CR1_SSM ((uint16_t)0x0200)½:SPI_CR1_RXONLY ((uint16_t)0x0400)¾:SPI_CR1_DFF ((uint16_t)0x0800)¿:SPI_CR1_CRCNEXT ((uint16_t)0x1000)À:SPI_CR1_CRCEN ((uint16_t)0x2000)Á:SPI_CR1_BIDIOE ((uint16_t)0x4000)Â:SPI_CR1_BIDIMODE ((uint16_t)0x8000)Å:SPI_CR2_RXDMAEN ((uint8_t)0x01)Æ:SPI_CR2_TXDMAEN ((uint8_t)0x02)Ç:SPI_CR2_SSOE ((uint8_t)0x04)È:SPI_CR2_ERRIE ((uint8_t)0x20)É:SPI_CR2_RXNEIE ((uint8_t)0x40)Ê:SPI_CR2_TXEIE ((uint8_t)0x80)Í:SPI_SR_RXNE ((uint8_t)0x01)Î:SPI_SR_TXE ((uint8_t)0x02)Ï:SPI_SR_CHSIDE ((uint8_t)0x04)Ð:SPI_SR_UDR ((uint8_t)0x08)Ñ:SPI_SR_CRCERR ((uint8_t)0x10)Ò:SPI_SR_MODF ((uint8_t)0x20)Ó:SPI_SR_OVR ((uint8_t)0x40)Ô:SPI_SR_BSY ((uint8_t)0x80)×:SPI_DR_DR ((uint16_t)0xFFFF)Ú:SPI_CRCPR_CRCPOLY ((uint16_t)0xFFFF)Ý:SPI_RXCRCR_RXCRC ((uint16_t)0xFFFF)à:SPI_TXCRCR_TXCRC ((uint16_t)0xFFFF)ã:SPI_I2SCFGR_CHLEN ((uint16_t)0x0001)å:SPI_I2SCFGR_DATLEN ((uint16_t)0x0006)æ:SPI_I2SCFGR_DATLEN_0 ((uint16_t)0x0002)ç:SPI_I2SCFGR_DATLEN_1 ((uint16_t)0x0004)é:SPI_I2SCFGR_CKPOL ((uint16_t)0x0008)ë:SPI_I2SCFGR_I2SSTD ((uint16_t)0x0030)ì:SPI_I2SCFGR_I2SSTD_0 ((uint16_t)0x0010)í:SPI_I2SCFGR_I2SSTD_1 ((uint16_t)0x0020)ï:SPI_I2SCFGR_PCMSYNC ((uint16_t)0x0080)ñ:SPI_I2SCFGR_I2SCFG ((uint16_t)0x0300)ò:SPI_I2SCFGR_I2SCFG_0 ((uint16_t)0x0100)ó:SPI_I2SCFGR_I2SCFG_1 ((uint16_t)0x0200)õ:SPI_I2SCFGR_I2SE ((uint16_t)0x0400)ö:SPI_I2SCFGR_I2SMOD ((uint16_t)0x0800)ù:SPI_I2SPR_I2SDIV ((uint16_t)0x00FF)ú:SPI_I2SPR_ODD ((uint16_t)0x0100)û:SPI_I2SPR_MCKOE ((uint16_t)0x0200);I2C_CR1_PE ((uint16_t)0x0001);I2C_CR1_SMBUS ((uint16_t)0x0002);I2C_CR1_SMBTYPE ((uint16_t)0x0008);I2C_CR1_ENARP ((uint16_t)0x0010);I2C_CR1_ENPEC ((uint16_t)0x0020);I2C_CR1_ENGC ((uint16_t)0x0040);I2C_CR1_NOSTRETCH ((uint16_t)0x0080);I2C_CR1_START ((uint16_t)0x0100);I2C_CR1_STOP ((uint16_t)0x0200);I2C_CR1_ACK ((uint16_t)0x0400);I2C_CR1_POS ((uint16_t)0x0800);I2C_CR1_PEC ((uint16_t)0x1000);I2C_CR1_ALERT ((uint16_t)0x2000);I2C_CR1_SWRST ((uint16_t)0x8000);I2C_CR2_FREQ ((uint16_t)0x003F);I2C_CR2_FREQ_0 ((uint16_t)0x0001);I2C_CR2_FREQ_1 ((uint16_t)0x0002);I2C_CR2_FREQ_2 ((uint16_t)0x0004);I2C_CR2_FREQ_3 ((uint16_t)0x0008);I2C_CR2_FREQ_4 ((uint16_t)0x0010);I2C_CR2_FREQ_5 ((uint16_t)0x0020);I2C_CR2_ITERREN ((uint16_t)0x0100);I2C_CR2_ITEVTEN ((uint16_t)0x0200);I2C_CR2_ITBUFEN ((uint16_t)0x0400);I2C_CR2_DMAEN ((uint16_t)0x0800) ;I2C_CR2_LAST ((uint16_t)0x1000)£;I2C_OAR1_ADD1_7 ((uint16_t)0x00FE)¤;I2C_OAR1_ADD8_9 ((uint16_t)0x0300)¦;I2C_OAR1_ADD0 ((uint16_t)0x0001)§;I2C_OAR1_ADD1 ((uint16_t)0x0002)¨;I2C_OAR1_ADD2 ((uint16_t)0x0004)©;I2C_OAR1_ADD3 ((uint16_t)0x0008)ª;I2C_OAR1_ADD4 ((uint16_t)0x0010)«;I2C_OAR1_ADD5 ((uint16_t)0x0020)¬;I2C_OAR1_ADD6 ((uint16_t)0x0040);I2C_OAR1_ADD7 ((uint16_t)0x0080)®;I2C_OAR1_ADD8 ((uint16_t)0x0100)¯;I2C_OAR1_ADD9 ((uint16_t)0x0200)±;I2C_OAR1_ADDMODE ((uint16_t)0x8000)´;I2C_OAR2_ENDUAL ((uint8_t)0x01)µ;I2C_OAR2_ADD2 ((uint8_t)0xFE)¸;I2C_DR_DR ((uint8_t)0xFF)»;I2C_SR1_SB ((uint16_t)0x0001)¼;I2C_SR1_ADDR ((uint16_t)0x0002)½;I2C_SR1_BTF ((uint16_t)0x0004)¾;I2C_SR1_ADD10 ((uint16_t)0x0008)¿;I2C_SR1_STOPF ((uint16_t)0x0010)À;I2C_SR1_RXNE ((uint16_t)0x0040)Á;I2C_SR1_TXE ((uint16_t)0x0080)Â;I2C_SR1_BERR ((uint16_t)0x0100)Ã;I2C_SR1_ARLO ((uint16_t)0x0200)Ä;I2C_SR1_AF ((uint16_t)0x0400)Å;I2C_SR1_OVR ((uint16_t)0x0800)Æ;I2C_SR1_PECERR ((uint16_t)0x1000)Ç;I2C_SR1_TIMEOUT ((uint16_t)0x4000)È;I2C_SR1_SMBALERT ((uint16_t)0x8000)Ë;I2C_SR2_MSL ((uint16_t)0x0001)Ì;I2C_SR2_BUSY ((uint16_t)0x0002)Í;I2C_SR2_TRA ((uint16_t)0x0004)Î;I2C_SR2_GENCALL ((uint16_t)0x0010)Ï;I2C_SR2_SMBDEFAULT ((uint16_t)0x0020)Ð;I2C_SR2_SMBHOST ((uint16_t)0x0040)Ñ;I2C_SR2_DUALF ((uint16_t)0x0080)Ò;I2C_SR2_PEC ((uint16_t)0xFF00)Õ;I2C_CCR_CCR ((uint16_t)0x0FFF)Ö;I2C_CCR_DUTY ((uint16_t)0x4000)×;I2C_CCR_FS ((uint16_t)0x8000)Ú;I2C_TRISE_TRISE ((uint8_t)0x3F)ã;USART_SR_PE ((uint16_t)0x0001)ä;USART_SR_FE ((uint16_t)0x0002)å;USART_SR_NE ((uint16_t)0x0004)æ;USART_SR_ORE ((uint16_t)0x0008)ç;USART_SR_IDLE ((uint16_t)0x0010)è;USART_SR_RXNE ((uint16_t)0x0020)é;USART_SR_TC ((uint16_t)0x0040)ê;USART_SR_TXE ((uint16_t)0x0080)ë;USART_SR_LBD ((uint16_t)0x0100)ì;USART_SR_CTS ((uint16_t)0x0200)ï;USART_DR_DR ((uint16_t)0x01FF)ò;USART_BRR_DIV_Fraction ((uint16_t)0x000F)ó;USART_BRR_DIV_Mantissa ((uint16_t)0xFFF0)ö;USART_CR1_SBK ((uint16_t)0x0001)÷;USART_CR1_RWU ((uint16_t)0x0002)ø;USART_CR1_RE ((uint16_t)0x0004)ù;USART_CR1_TE ((uint16_t)0x0008)ú;USART_CR1_IDLEIE ((uint16_t)0x0010)û;USART_CR1_RXNEIE ((uint16_t)0x0020)ü;USART_CR1_TCIE ((uint16_t)0x0040)ý;USART_CR1_TXEIE ((uint16_t)0x0080)þ;USART_CR1_PEIE ((uint16_t)0x0100)ÿ;USART_CR1_PS ((uint16_t)0x0200)<USART_CR1_PCE ((uint16_t)0x0400)<USART_CR1_WAKE ((uint16_t)0x0800)<USART_CR1_M ((uint16_t)0x1000)<USART_CR1_UE ((uint16_t)0x2000)<USART_CR1_OVER8 ((uint16_t)0x8000)<USART_CR2_ADD ((uint16_t)0x000F)<USART_CR2_LBDL ((uint16_t)0x0020)<USART_CR2_LBDIE ((uint16_t)0x0040)<USART_CR2_LBCL ((uint16_t)0x0100)<USART_CR2_CPHA ((uint16_t)0x0200)<USART_CR2_CPOL ((uint16_t)0x0400)<USART_CR2_CLKEN ((uint16_t)0x0800)<USART_CR2_STOP ((uint16_t)0x3000)<USART_CR2_STOP_0 ((uint16_t)0x1000)<USART_CR2_STOP_1 ((uint16_t)0x2000)<USART_CR2_LINEN ((uint16_t)0x4000)<USART_CR3_EIE ((uint16_t)0x0001)<USART_CR3_IREN ((uint16_t)0x0002)<USART_CR3_IRLP ((uint16_t)0x0004)<USART_CR3_HDSEL ((uint16_t)0x0008)<USART_CR3_NACK ((uint16_t)0x0010)<USART_CR3_SCEN ((uint16_t)0x0020)<USART_CR3_DMAR ((uint16_t)0x0040)<USART_CR3_DMAT ((uint16_t)0x0080)<USART_CR3_RTSE ((uint16_t)0x0100)<USART_CR3_CTSE ((uint16_t)0x0200) <USART_CR3_CTSIE ((uint16_t)0x0400)¡<USART_CR3_ONEBIT ((uint16_t)0x0800)¤<USART_GTPR_PSC ((uint16_t)0x00FF)¥<USART_GTPR_PSC_0 ((uint16_t)0x0001)¦<USART_GTPR_PSC_1 ((uint16_t)0x0002)§<USART_GTPR_PSC_2 ((uint16_t)0x0004)¨<USART_GTPR_PSC_3 ((uint16_t)0x0008)©<USART_GTPR_PSC_4 ((uint16_t)0x0010)ª<USART_GTPR_PSC_5 ((uint16_t)0x0020)«<USART_GTPR_PSC_6 ((uint16_t)0x0040)¬<USART_GTPR_PSC_7 ((uint16_t)0x0080)®<USART_GTPR_GT ((uint16_t)0xFF00)·<DBGMCU_IDCODE_DEV_ID ((uint32_t)0x00000FFF)¹<DBGMCU_IDCODE_REV_ID ((uint32_t)0xFFFF0000)º<DBGMCU_IDCODE_REV_ID_0 ((uint32_t)0x00010000)»<DBGMCU_IDCODE_REV_ID_1 ((uint32_t)0x00020000)¼<DBGMCU_IDCODE_REV_ID_2 ((uint32_t)0x00040000)½<DBGMCU_IDCODE_REV_ID_3 ((uint32_t)0x00080000)¾<DBGMCU_IDCODE_REV_ID_4 ((uint32_t)0x00100000)¿<DBGMCU_IDCODE_REV_ID_5 ((uint32_t)0x00200000)À<DBGMCU_IDCODE_REV_ID_6 ((uint32_t)0x00400000)Á<DBGMCU_IDCODE_REV_ID_7 ((uint32_t)0x00800000)Â<DBGMCU_IDCODE_REV_ID_8 ((uint32_t)0x01000000)Ã<DBGMCU_IDCODE_REV_ID_9 ((uint32_t)0x02000000)Ä<DBGMCU_IDCODE_REV_ID_10 ((uint32_t)0x04000000)Å<DBGMCU_IDCODE_REV_ID_11 ((uint32_t)0x08000000)Æ<DBGMCU_IDCODE_REV_ID_12 ((uint32_t)0x10000000)Ç<DBGMCU_IDCODE_REV_ID_13 ((uint32_t)0x20000000)È<DBGMCU_IDCODE_REV_ID_14 ((uint32_t)0x40000000)É<DBGMCU_IDCODE_REV_ID_15 ((uint32_t)0x80000000)Ì<DBGMCU_CR_DBG_SLEEP ((uint32_t)0x00000001)Í<DBGMCU_CR_DBG_STOP ((uint32_t)0x00000002)Î<DBGMCU_CR_DBG_STANDBY ((uint32_t)0x00000004)Ï<DBGMCU_CR_TRACE_IOEN ((uint32_t)0x00000020)Ñ<DBGMCU_CR_TRACE_MODE ((uint32_t)0x000000C0)Ò<DBGMCU_CR_TRACE_MODE_0 ((uint32_t)0x00000040)Ó<DBGMCU_CR_TRACE_MODE_1 ((uint32_t)0x00000080)Õ<DBGMCU_CR_DBG_IWDG_STOP ((uint32_t)0x00000100)Ö<DBGMCU_CR_DBG_WWDG_STOP ((uint32_t)0x00000200)×<DBGMCU_CR_DBG_TIM1_STOP ((uint32_t)0x00000400)Ø<DBGMCU_CR_DBG_TIM2_STOP ((uint32_t)0x00000800)Ù<DBGMCU_CR_DBG_TIM3_STOP ((uint32_t)0x00001000)Ú<DBGMCU_CR_DBG_TIM4_STOP ((uint32_t)0x00002000)Û<DBGMCU_CR_DBG_CAN1_STOP ((uint32_t)0x00004000)Ü<DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000)Ý<DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000)Þ<DBGMCU_CR_DBG_TIM8_STOP ((uint32_t)0x00020000)ß<DBGMCU_CR_DBG_TIM5_STOP ((uint32_t)0x00040000)à<DBGMCU_CR_DBG_TIM6_STOP ((uint32_t)0x00080000)á<DBGMCU_CR_DBG_TIM7_STOP ((uint32_t)0x00100000)â<DBGMCU_CR_DBG_CAN2_STOP ((uint32_t)0x00200000)ã<DBGMCU_CR_DBG_TIM15_STOP ((uint32_t)0x00400000)ä<DBGMCU_CR_DBG_TIM16_STOP ((uint32_t)0x00800000)å<DBGMCU_CR_DBG_TIM17_STOP ((uint32_t)0x01000000)æ<DBGMCU_CR_DBG_TIM12_STOP ((uint32_t)0x02000000)ç<DBGMCU_CR_DBG_TIM13_STOP ((uint32_t)0x04000000)è<DBGMCU_CR_DBG_TIM14_STOP ((uint32_t)0x08000000)é<DBGMCU_CR_DBG_TIM9_STOP ((uint32_t)0x10000000)ê<DBGMCU_CR_DBG_TIM10_STOP ((uint32_t)0x20000000)ë<DBGMCU_CR_DBG_TIM11_STOP ((uint32_t)0x40000000)ô<FLASH_ACR_LATENCY ((uint8_t)0x03)õ<FLASH_ACR_LATENCY_0 ((uint8_t)0x00)ö<FLASH_ACR_LATENCY_1 ((uint8_t)0x01)÷<FLASH_ACR_LATENCY_2 ((uint8_t)0x02)ù<FLASH_ACR_HLFCYA ((uint8_t)0x08)ú<FLASH_ACR_PRFTBE ((uint8_t)0x10)û<FLASH_ACR_PRFTBS ((uint8_t)0x20)þ<FLASH_KEYR_FKEYR ((uint32_t)0xFFFFFFFF)=FLASH_OPTKEYR_OPTKEYR ((uint32_t)0xFFFFFFFF)=FLASH_SR_BSY ((uint8_t)0x01)=FLASH_SR_PGERR ((uint8_t)0x04)=FLASH_SR_WRPRTERR ((uint8_t)0x10)=FLASH_SR_EOP ((uint8_t)0x20)=FLASH_CR_PG ((uint16_t)0x0001)=FLASH_CR_PER ((uint16_t)0x0002)=FLASH_CR_MER ((uint16_t)0x0004)=FLASH_CR_OPTPG ((uint16_t)0x0010)=FLASH_CR_OPTER ((uint16_t)0x0020)=FLASH_CR_STRT ((uint16_t)0x0040)=FLASH_CR_LOCK ((uint16_t)0x0080)=FLASH_CR_OPTWRE ((uint16_t)0x0200)=FLASH_CR_ERRIE ((uint16_t)0x0400)=FLASH_CR_EOPIE ((uint16_t)0x1000)=FLASH_AR_FAR ((uint32_t)0xFFFFFFFF)=FLASH_OBR_OPTERR ((uint16_t)0x0001)=FLASH_OBR_RDPRT ((uint16_t)0x0002)=FLASH_OBR_USER ((uint16_t)0x03FC)=FLASH_OBR_WDG_SW ((uint16_t)0x0004)=FLASH_OBR_nRST_STOP ((uint16_t)0x0008)=FLASH_OBR_nRST_STDBY ((uint16_t)0x0010) =FLASH_OBR_BFB2 ((uint16_t)0x0020)£=FLASH_WRPR_WRP ((uint32_t)0xFFFFFFFF)¨=FLASH_RDP_RDP ((uint32_t)0x000000FF)©=FLASH_RDP_nRDP ((uint32_t)0x0000FF00)¬=FLASH_USER_USER ((uint32_t)0x00FF0000)=FLASH_USER_nUSER ((uint32_t)0xFF000000)°=FLASH_Data0_Data0 ((uint32_t)0x000000FF)±=FLASH_Data0_nData0 ((uint32_t)0x0000FF00)´=FLASH_Data1_Data1 ((uint32_t)0x00FF0000)µ=FLASH_Data1_nData1 ((uint32_t)0xFF000000)¸=FLASH_WRP0_WRP0 ((uint32_t)0x000000FF)¹=FLASH_WRP0_nWRP0 ((uint32_t)0x0000FF00)¼=FLASH_WRP1_WRP1 ((uint32_t)0x00FF0000)½=FLASH_WRP1_nWRP1 ((uint32_t)0xFF000000)À=FLASH_WRP2_WRP2 ((uint32_t)0x000000FF)Á=FLASH_WRP2_nWRP2 ((uint32_t)0x0000FF00)Ä=FLASH_WRP3_WRP3 ((uint32_t)0x00FF0000)Å=FLASH_WRP3_nWRP3 ((uint32_t)0xFF000000)î@õ@SET_BIT(REG,BIT) ((REG) |= (BIT))÷@CLEAR_BIT(REG,BIT) ((REG) &= ~(BIT))ù@READ_BIT(REG,BIT) ((REG) & (BIT))û@CLEAR_REG(REG) ((REG) = (0x0))ý@WRITE_REG(REG,VAL) ((REG) = (VAL))ÿ@READ_REG(REG) ((REG))AMODIFY_REG(REG,CLEARMASK,SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))%$#`
..\STM32F10x_FWLib\inc\stm32f10x_adc.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER*ÉADC_ModeU#ADC_ScanConvModeÒ#ADC_ContinuousConvModeÒ#ADC_ExternalTrigConvU#ADC_DataAlignU#ADC_NbrOfChannel6#PADC_InitTypeDef©J`V ..\STM32F10x_FWLib\inc\..\USER\stm32f10x_adc.hstm32f10x.h__STM32F10x_ADC_H  SIS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || ((PERIPH) == ADC2) || ((PERIPH) == ADC3))WIS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || ((PERIPH) == ADC3))^ADC_Mode_Independent ((uint32_t)0x00000000)_ADC_Mode_RegInjecSimult ((uint32_t)0x00010000)`ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000)aADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000)bADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000)cADC_Mode_InjecSimult ((uint32_t)0x00050000)dADC_Mode_RegSimult ((uint32_t)0x00060000)eADC_Mode_FastInterl ((uint32_t)0x00070000)fADC_Mode_SlowInterl ((uint32_t)0x00080000)gADC_Mode_AlterTrig ((uint32_t)0x00090000)iIS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || ((MODE) == ADC_Mode_RegInjecSimult) || ((MODE) == ADC_Mode_RegSimult_AlterTrig) || ((MODE) == ADC_Mode_InjecSimult_FastInterl) || ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || ((MODE) == ADC_Mode_InjecSimult) || ((MODE) == ADC_Mode_RegSimult) || ((MODE) == ADC_Mode_FastInterl) || ((MODE) == ADC_Mode_SlowInterl) || ((MODE) == ADC_Mode_AlterTrig)){ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000)|ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000)}ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000)~ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000)ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000)ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000)ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000)ADC_ExternalTrigConv_None ((uint32_t)0x000E0000)ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000000)ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x00020000)ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x00060000)ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x00080000)ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x000A0000)ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x000C0000)IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || ((REGTRIG) == ADC_ExternalTrigConv_None) || ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3))¢ADC_DataAlign_Right ((uint32_t)0x00000000)£ADC_DataAlign_Left ((uint32_t)0x00000800)¤IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || ((ALIGN) == ADC_DataAlign_Left))®ADC_Channel_0 ((uint8_t)0x00)¯ADC_Channel_1 ((uint8_t)0x01)°ADC_Channel_2 ((uint8_t)0x02)±ADC_Channel_3 ((uint8_t)0x03)²ADC_Channel_4 ((uint8_t)0x04)³ADC_Channel_5 ((uint8_t)0x05)´ADC_Channel_6 ((uint8_t)0x06)µADC_Channel_7 ((uint8_t)0x07)¶ADC_Channel_8 ((uint8_t)0x08)·ADC_Channel_9 ((uint8_t)0x09)¸ADC_Channel_10 ((uint8_t)0x0A)¹ADC_Channel_11 ((uint8_t)0x0B)ºADC_Channel_12 ((uint8_t)0x0C)»ADC_Channel_13 ((uint8_t)0x0D)¼ADC_Channel_14 ((uint8_t)0x0E)½ADC_Channel_15 ((uint8_t)0x0F)¾ADC_Channel_16 ((uint8_t)0x10)¿ADC_Channel_17 ((uint8_t)0x11)ÁADC_Channel_TempSensor ((uint8_t)ADC_Channel_16)ÂADC_Channel_Vrefint ((uint8_t)ADC_Channel_17)ÄIS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17))ÕADC_SampleTime_1Cycles5 ((uint8_t)0x00)ÖADC_SampleTime_7Cycles5 ((uint8_t)0x01)×ADC_SampleTime_13Cycles5 ((uint8_t)0x02)ØADC_SampleTime_28Cycles5 ((uint8_t)0x03)ÙADC_SampleTime_41Cycles5 ((uint8_t)0x04)ÚADC_SampleTime_55Cycles5 ((uint8_t)0x05)ÛADC_SampleTime_71Cycles5 ((uint8_t)0x06)ÜADC_SampleTime_239Cycles5 ((uint8_t)0x07)ÝIS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || ((TIME) == ADC_SampleTime_7Cycles5) || ((TIME) == ADC_SampleTime_13Cycles5) || ((TIME) == ADC_SampleTime_28Cycles5) || ((TIME) == ADC_SampleTime_41Cycles5) || ((TIME) == ADC_SampleTime_55Cycles5) || ((TIME) == ADC_SampleTime_71Cycles5) || ((TIME) == ADC_SampleTime_239Cycles5))íADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000)îADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000)ïADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000)ðADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000)ñADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000)óADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000)ôADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000)õADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000)÷ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00002000)øADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x00003000)ùADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x00004000)úADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x00005000)ûADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x00006000)ýIS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || ((INJTRIG) == ADC_ExternalTrigInjecConv_None) || ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4))ADC_InjectedChannel_1 ((uint8_t)0x14)ADC_InjectedChannel_2 ((uint8_t)0x18)ADC_InjectedChannel_3 ((uint8_t)0x1C)ADC_InjectedChannel_4 ((uint8_t)0x20)IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || ((CHANNEL) == ADC_InjectedChannel_2) || ((CHANNEL) == ADC_InjectedChannel_3) || ((CHANNEL) == ADC_InjectedChannel_4))¢ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200)£ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200)¤ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200)¥ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000)¦ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000)§ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000)¨ADC_AnalogWatchdog_None ((uint32_t)0x00000000)ªIS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || ((WATCHDOG) == ADC_AnalogWatchdog_None))¹ADC_IT_EOC ((uint16_t)0x0220)ºADC_IT_AWD ((uint16_t)0x0140)»ADC_IT_JEOC ((uint16_t)0x0480)½IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00))¿IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || ((IT) == ADC_IT_JEOC))ÉADC_FLAG_AWD ((uint8_t)0x01)ÊADC_FLAG_EOC ((uint8_t)0x02)ËADC_FLAG_JEOC ((uint8_t)0x04)ÌADC_FLAG_JSTRT ((uint8_t)0x08)ÍADC_FLAG_STRT ((uint8_t)0x10)ÎIS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00))ÏIS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || ((FLAG) == ADC_FLAG_STRT))ÚIS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)äIS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)îIS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))øIS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4))IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10))IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10))IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8)))('¨
..\STM32F10x_FWLib\inc\stm32f10x_bkp.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER`V ..\STM32F10x_FWLib\inc\..\USER\stm32f10x_bkp.hstm32f10x.h__STM32F10x_BKP_H  :BKP_TamperPinLevel_High ((uint16_t)0x0000);BKP_TamperPinLevel_Low ((uint16_t)0x0001)<IS_BKP_TAMPER_PIN_LEVEL(LEVEL) (((LEVEL) == BKP_TamperPinLevel_High) || ((LEVEL) == BKP_TamperPinLevel_Low))FBKP_RTCOutputSource_None ((uint16_t)0x0000)GBKP_RTCOutputSource_CalibClock ((uint16_t)0x0080)HBKP_RTCOutputSource_Alarm ((uint16_t)0x0100)IBKP_RTCOutputSource_Second ((uint16_t)0x0300)JIS_BKP_RTC_OUTPUT_SOURCE(SOURCE) (((SOURCE) == BKP_RTCOutputSource_None) || ((SOURCE) == BKP_RTCOutputSource_CalibClock) || ((SOURCE) == BKP_RTCOutputSource_Alarm) || ((SOURCE) == BKP_RTCOutputSource_Second))VBKP_DR1 ((uint16_t)0x0004)WBKP_DR2 ((uint16_t)0x0008)XBKP_DR3 ((uint16_t)0x000C)YBKP_DR4 ((uint16_t)0x0010)ZBKP_DR5 ((uint16_t)0x0014)[BKP_DR6 ((uint16_t)0x0018)\BKP_DR7 ((uint16_t)0x001C)]BKP_DR8 ((uint16_t)0x0020)^BKP_DR9 ((uint16_t)0x0024)_BKP_DR10 ((uint16_t)0x0028)`BKP_DR11 ((uint16_t)0x0040)aBKP_DR12 ((uint16_t)0x0044)bBKP_DR13 ((uint16_t)0x0048)cBKP_DR14 ((uint16_t)0x004C)dBKP_DR15 ((uint16_t)0x0050)eBKP_DR16 ((uint16_t)0x0054)fBKP_DR17 ((uint16_t)0x0058)gBKP_DR18 ((uint16_t)0x005C)hBKP_DR19 ((uint16_t)0x0060)iBKP_DR20 ((uint16_t)0x0064)jBKP_DR21 ((uint16_t)0x0068)kBKP_DR22 ((uint16_t)0x006C)lBKP_DR23 ((uint16_t)0x0070)mBKP_DR24 ((uint16_t)0x0074)nBKP_DR25 ((uint16_t)0x0078)oBKP_DR26 ((uint16_t)0x007C)pBKP_DR27 ((uint16_t)0x0080)qBKP_DR28 ((uint16_t)0x0084)rBKP_DR29 ((uint16_t)0x0088)sBKP_DR30 ((uint16_t)0x008C)tBKP_DR31 ((uint16_t)0x0090)uBKP_DR32 ((uint16_t)0x0094)vBKP_DR33 ((uint16_t)0x0098)wBKP_DR34 ((uint16_t)0x009C)xBKP_DR35 ((uint16_t)0x00A0)yBKP_DR36 ((uint16_t)0x00A4)zBKP_DR37 ((uint16_t)0x00A8){BKP_DR38 ((uint16_t)0x00AC)|BKP_DR39 ((uint16_t)0x00B0)}BKP_DR40 ((uint16_t)0x00B4)~BKP_DR41 ((uint16_t)0x00B8)BKP_DR42 ((uint16_t)0x00BC)IS_BKP_DR(DR) (((DR) == BKP_DR1) || ((DR) == BKP_DR2) || ((DR) == BKP_DR3) || ((DR) == BKP_DR4) || ((DR) == BKP_DR5) || ((DR) == BKP_DR6) || ((DR) == BKP_DR7) || ((DR) == BKP_DR8) || ((DR) == BKP_DR9) || ((DR) == BKP_DR10) || ((DR) == BKP_DR11) || ((DR) == BKP_DR12) || ((DR) == BKP_DR13) || ((DR) == BKP_DR14) || ((DR) == BKP_DR15) || ((DR) == BKP_DR16) || ((DR) == BKP_DR17) || ((DR) == BKP_DR18) || ((DR) == BKP_DR19) || ((DR) == BKP_DR20) || ((DR) == BKP_DR21) || ((DR) == BKP_DR22) || ((DR) == BKP_DR23) || ((DR) == BKP_DR24) || ((DR) == BKP_DR25) || ((DR) == BKP_DR26) || ((DR) == BKP_DR27) || ((DR) == BKP_DR28) || ((DR) == BKP_DR29) || ((DR) == BKP_DR30) || ((DR) == BKP_DR31) || ((DR) == BKP_DR32) || ((DR) == BKP_DR33) || ((DR) == BKP_DR34) || ((DR) == BKP_DR35) || ((DR) == BKP_DR36) || ((DR) == BKP_DR37) || ((DR) == BKP_DR38) || ((DR) == BKP_DR39) || ((DR) == BKP_DR40) || ((DR) == BKP_DR41) || ((DR) == BKP_DR42))IS_BKP_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x7F)-,+8
..\STM32F10x_FWLib\inc\stm32f10x_dac.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER*£DAC_TriggerU#DAC_WaveGenerationU#DAC_LFSRUnmask_TriangleAmplitudeU#DAC_OutputBufferU#PDAC_InitTypeDef©A`V ..\STM32F10x_FWLib\inc\..\USER\stm32f10x_dac.hstm32f10x.h__STM32F10x_DAC_H  ODAC_Trigger_None ((uint32_t)0x00000000)QDAC_Trigger_T6_TRGO ((uint32_t)0x00000004)RDAC_Trigger_T8_TRGO ((uint32_t)0x0000000C)TDAC_Trigger_T3_TRGO ((uint32_t)0x0000000C)VDAC_Trigger_T7_TRGO ((uint32_t)0x00000014)WDAC_Trigger_T5_TRGO ((uint32_t)0x0000001C)XDAC_Trigger_T15_TRGO ((uint32_t)0x0000001C)ZDAC_Trigger_T2_TRGO ((uint32_t)0x00000024)[DAC_Trigger_T4_TRGO ((uint32_t)0x0000002C)\DAC_Trigger_Ext_IT9 ((uint32_t)0x00000034)]DAC_Trigger_Software ((uint32_t)0x0000003C)_IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_Trigger_None) || ((TRIGGER) == DAC_Trigger_T6_TRGO) || ((TRIGGER) == DAC_Trigger_T8_TRGO) || ((TRIGGER) == DAC_Trigger_T7_TRGO) || ((TRIGGER) == DAC_Trigger_T5_TRGO) || ((TRIGGER) == DAC_Trigger_T2_TRGO) || ((TRIGGER) == DAC_Trigger_T4_TRGO) || ((TRIGGER) == DAC_Trigger_Ext_IT9) || ((TRIGGER) == DAC_Trigger_Software))qDAC_WaveGeneration_None ((uint32_t)0x00000000)rDAC_WaveGeneration_Noise ((uint32_t)0x00000040)sDAC_WaveGeneration_Triangle ((uint32_t)0x00000080)tIS_DAC_GENERATE_WAVE(WAVE) (((WAVE) == DAC_WaveGeneration_None) || ((WAVE) == DAC_WaveGeneration_Noise) || ((WAVE) == DAC_WaveGeneration_Triangle))DAC_LFSRUnmask_Bit0 ((uint32_t)0x00000000)DAC_LFSRUnmask_Bits1_0 ((uint32_t)0x00000100)DAC_LFSRUnmask_Bits2_0 ((uint32_t)0x00000200)DAC_LFSRUnmask_Bits3_0 ((uint32_t)0x00000300)DAC_LFSRUnmask_Bits4_0 ((uint32_t)0x00000400)DAC_LFSRUnmask_Bits5_0 ((uint32_t)0x00000500)DAC_LFSRUnmask_Bits6_0 ((uint32_t)0x00000600)DAC_LFSRUnmask_Bits7_0 ((uint32_t)0x00000700)DAC_LFSRUnmask_Bits8_0 ((uint32_t)0x00000800)DAC_LFSRUnmask_Bits9_0 ((uint32_t)0x00000900)DAC_LFSRUnmask_Bits10_0 ((uint32_t)0x00000A00)DAC_LFSRUnmask_Bits11_0 ((uint32_t)0x00000B00)DAC_TriangleAmplitude_1 ((uint32_t)0x00000000)DAC_TriangleAmplitude_3 ((uint32_t)0x00000100)DAC_TriangleAmplitude_7 ((uint32_t)0x00000200)DAC_TriangleAmplitude_15 ((uint32_t)0x00000300)DAC_TriangleAmplitude_31 ((uint32_t)0x00000400)DAC_TriangleAmplitude_63 ((uint32_t)0x00000500)DAC_TriangleAmplitude_127 ((uint32_t)0x00000600)DAC_TriangleAmplitude_255 ((uint32_t)0x00000700)DAC_TriangleAmplitude_511 ((uint32_t)0x00000800)DAC_TriangleAmplitude_1023 ((uint32_t)0x00000900)DAC_TriangleAmplitude_2047 ((uint32_t)0x00000A00)DAC_TriangleAmplitude_4095 ((uint32_t)0x00000B00)IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUnmask_Bit0) || ((VALUE) == DAC_LFSRUnmask_Bits1_0) || ((VALUE) == DAC_LFSRUnmask_Bits2_0) || ((VALUE) == DAC_LFSRUnmask_Bits3_0) || ((VALUE) == DAC_LFSRUnmask_Bits4_0) || ((VALUE) == DAC_LFSRUnmask_Bits5_0) || ((VALUE) == DAC_LFSRUnmask_Bits6_0) || ((VALUE) == DAC_LFSRUnmask_Bits7_0) || ((VALUE) == DAC_LFSRUnmask_Bits8_0) || ((VALUE) == DAC_LFSRUnmask_Bits9_0) || ((VALUE) == DAC_LFSRUnmask_Bits10_0) || ((VALUE) == DAC_LFSRUnmask_Bits11_0) || ((VALUE) == DAC_TriangleAmplitude_1) || ((VALUE) == DAC_TriangleAmplitude_3) || ((VALUE) == DAC_TriangleAmplitude_7) || ((VALUE) == DAC_TriangleAmplitude_15) || ((VALUE) == DAC_TriangleAmplitude_31) || ((VALUE) == DAC_TriangleAmplitude_63) || ((VALUE) == DAC_TriangleAmplitude_127) || ((VALUE) == DAC_TriangleAmplitude_255) || ((VALUE) == DAC_TriangleAmplitude_511) || ((VALUE) == DAC_TriangleAmplitude_1023) || ((VALUE) == DAC_TriangleAmplitude_2047) || ((VALUE) == DAC_TriangleAmplitude_4095))¸DAC_OutputBuffer_Enable ((uint32_t)0x00000000)¹DAC_OutputBuffer_Disable ((uint32_t)0x00000002)ºIS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OutputBuffer_Enable) || ((STATE) == DAC_OutputBuffer_Disable))ÄDAC_Channel_1 ((uint32_t)0x00000000)ÅDAC_Channel_2 ((uint32_t)0x00000010)ÆIS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_Channel_1) || ((CHANNEL) == DAC_Channel_2))ÐDAC_Align_12b_R ((uint32_t)0x00000000)ÑDAC_Align_12b_L ((uint32_t)0x00000004)ÒDAC_Align_8b_R ((uint32_t)0x00000008)ÓIS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_Align_12b_R) || ((ALIGN) == DAC_Align_12b_L) || ((ALIGN) == DAC_Align_8b_R))ÞDAC_Wave_Noise ((uint32_t)0x00000040)ßDAC_Wave_Triangle ((uint32_t)0x00000080)àIS_DAC_WAVE(WAVE) (((WAVE) == DAC_Wave_Noise) || ((WAVE) == DAC_Wave_Triangle))êIS_DAC_DATA(DATA) ((DATA) <= 0xFFF0)10/Ð
..\STM32F10x_FWLib\inc\stm32f10x_dma.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER*º,DMA_PeripheralBaseAddrU#DMA_MemoryBaseAddrU#DMA_DIRU#DMA_BufferSizeU#DMA_PeripheralIncU#DMA_MemoryIncU#DMA_PeripheralDataSizeU#DMA_MemoryDataSizeU#DMA_ModeU# DMA_PriorityU#$DMA_M2MU#(PDMA_InitTypeDef©U`V ..\STM32F10x_FWLib\inc\..\USER\stm32f10x_dma.hstm32f10x.h__STM32F10x_DMA_H  _IS_DMA_ALL_PERIPH(PERIPH) (((PERIPH) == DMA1_Channel1) || ((PERIPH) == DMA1_Channel2) || ((PERIPH) == DMA1_Channel3) || ((PERIPH) == DMA1_Channel4) || ((PERIPH) == DMA1_Channel5) || ((PERIPH) == DMA1_Channel6) || ((PERIPH) == DMA1_Channel7) || ((PERIPH) == DMA2_Channel1) || ((PERIPH) == DMA2_Channel2) || ((PERIPH) == DMA2_Channel3) || ((PERIPH) == DMA2_Channel4) || ((PERIPH) == DMA2_Channel5))pDMA_DIR_PeripheralDST ((uint32_t)0x00000010)qDMA_DIR_PeripheralSRC ((uint32_t)0x00000000)rIS_DMA_DIR(DIR) (((DIR) == DMA_DIR_PeripheralDST) || ((DIR) == DMA_DIR_PeripheralSRC))|DMA_PeripheralInc_Enable ((uint32_t)0x00000040)}DMA_PeripheralInc_Disable ((uint32_t)0x00000000)~IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || ((STATE) == DMA_PeripheralInc_Disable))DMA_MemoryInc_Enable ((uint32_t)0x00000080)DMA_MemoryInc_Disable ((uint32_t)0x00000000)IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || ((STATE) == DMA_MemoryInc_Disable))DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000)DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100)DMA_PeripheralDataSize_Word ((uint32_t)0x00000200)IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PeripheralDataSize_Byte) || ((SIZE) == DMA_PeripheralDataSize_HalfWord) || ((SIZE) == DMA_PeripheralDataSize_Word))¢DMA_MemoryDataSize_Byte ((uint32_t)0x00000000)£DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400)¤DMA_MemoryDataSize_Word ((uint32_t)0x00000800)¥IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MemoryDataSize_Byte) || ((SIZE) == DMA_MemoryDataSize_HalfWord) || ((SIZE) == DMA_MemoryDataSize_Word))°DMA_Mode_Circular ((uint32_t)0x00000020)±DMA_Mode_Normal ((uint32_t)0x00000000)²IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal))»DMA_Priority_VeryHigh ((uint32_t)0x00003000)¼DMA_Priority_High ((uint32_t)0x00002000)½DMA_Priority_Medium ((uint32_t)0x00001000)¾DMA_Priority_Low ((uint32_t)0x00000000)¿IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_Priority_VeryHigh) || ((PRIORITY) == DMA_Priority_High) || ((PRIORITY) == DMA_Priority_Medium) || ((PRIORITY) == DMA_Priority_Low))ËDMA_M2M_Enable ((uint32_t)0x00004000)ÌDMA_M2M_Disable ((uint32_t)0x00000000)ÍIS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable))×DMA_IT_TC ((uint32_t)0x00000002)ØDMA_IT_HT ((uint32_t)0x00000004)ÙDMA_IT_TE ((uint32_t)0x00000008)ÚIS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00))ÜDMA1_IT_GL1 ((uint32_t)0x00000001)ÝDMA1_IT_TC1 ((uint32_t)0x00000002)ÞDMA1_IT_HT1 ((uint32_t)0x00000004)ßDMA1_IT_TE1 ((uint32_t)0x00000008)àDMA1_IT_GL2 ((uint32_t)0x00000010)áDMA1_IT_TC2 ((uint32_t)0x00000020)âDMA1_IT_HT2 ((uint32_t)0x00000040)ãDMA1_IT_TE2 ((uint32_t)0x00000080)äDMA1_IT_GL3 ((uint32_t)0x00000100)åDMA1_IT_TC3 ((uint32_t)0x00000200)æDMA1_IT_HT3 ((uint32_t)0x00000400)çDMA1_IT_TE3 ((uint32_t)0x00000800)èDMA1_IT_GL4 ((uint32_t)0x00001000)éDMA1_IT_TC4 ((uint32_t)0x00002000)êDMA1_IT_HT4 ((uint32_t)0x00004000)ëDMA1_IT_TE4 ((uint32_t)0x00008000)ìDMA1_IT_GL5 ((uint32_t)0x00010000)íDMA1_IT_TC5 ((uint32_t)0x00020000)îDMA1_IT_HT5 ((uint32_t)0x00040000)ïDMA1_IT_TE5 ((uint32_t)0x00080000)ðDMA1_IT_GL6 ((uint32_t)0x00100000)ñDMA1_IT_TC6 ((uint32_t)0x00200000)òDMA1_IT_HT6 ((uint32_t)0x00400000)óDMA1_IT_TE6 ((uint32_t)0x00800000)ôDMA1_IT_GL7 ((uint32_t)0x01000000)õDMA1_IT_TC7 ((uint32_t)0x02000000)öDMA1_IT_HT7 ((uint32_t)0x04000000)÷DMA1_IT_TE7 ((uint32_t)0x08000000)ùDMA2_IT_GL1 ((uint32_t)0x10000001)úDMA2_IT_TC1 ((uint32_t)0x10000002)ûDMA2_IT_HT1 ((uint32_t)0x10000004)üDMA2_IT_TE1 ((uint32_t)0x10000008)ýDMA2_IT_GL2 ((uint32_t)0x10000010)þDMA2_IT_TC2 ((uint32_t)0x10000020)ÿDMA2_IT_HT2 ((uint32_t)0x10000040)DMA2_IT_TE2 ((uint32_t)0x10000080)DMA2_IT_GL3 ((uint32_t)0x10000100)DMA2_IT_TC3 ((uint32_t)0x10000200)DMA2_IT_HT3 ((uint32_t)0x10000400)DMA2_IT_TE3 ((uint32_t)0x10000800)DMA2_IT_GL4 ((uint32_t)0x10001000)DMA2_IT_TC4 ((uint32_t)0x10002000)DMA2_IT_HT4 ((uint32_t)0x10004000)DMA2_IT_TE4 ((uint32_t)0x10008000)DMA2_IT_GL5 ((uint32_t)0x10010000)DMA2_IT_TC5 ((uint32_t)0x10020000)DMA2_IT_HT5 ((uint32_t)0x10040000)DMA2_IT_TE5 ((uint32_t)0x10080000)IS_DMA_CLEAR_IT(IT) (((((IT) & 0xF0000000) == 0x00) || (((IT) & 0xEFF00000) == 0x00)) && ((IT) != 0x00))IS_DMA_GET_IT(IT) (((IT) == DMA1_IT_GL1) || ((IT) == DMA1_IT_TC1) || ((IT) == DMA1_IT_HT1) || ((IT) == DMA1_IT_TE1) || ((IT) == DMA1_IT_GL2) || ((IT) == DMA1_IT_TC2) || ((IT) == DMA1_IT_HT2) || ((IT) == DMA1_IT_TE2) || ((IT) == DMA1_IT_GL3) || ((IT) == DMA1_IT_TC3) || ((IT) == DMA1_IT_HT3) || ((IT) == DMA1_IT_TE3) || ((IT) == DMA1_IT_GL4) || ((IT) == DMA1_IT_TC4) || ((IT) == DMA1_IT_HT4) || ((IT) == DMA1_IT_TE4) || ((IT) == DMA1_IT_GL5) || ((IT) == DMA1_IT_TC5) || ((IT) == DMA1_IT_HT5) || ((IT) == DMA1_IT_TE5) || ((IT) == DMA1_IT_GL6) || ((IT) == DMA1_IT_TC6) || ((IT) == DMA1_IT_HT6) || ((IT) == DMA1_IT_TE6) || ((IT) == DMA1_IT_GL7) || ((IT) == DMA1_IT_TC7) || ((IT) == DMA1_IT_HT7) || ((IT) == DMA1_IT_TE7) || ((IT) == DMA2_IT_GL1) || ((IT) == DMA2_IT_TC1) || ((IT) == DMA2_IT_HT1) || ((IT) == DMA2_IT_TE1) || ((IT) == DMA2_IT_GL2) || ((IT) == DMA2_IT_TC2) || ((IT) == DMA2_IT_HT2) || ((IT) == DMA2_IT_TE2) || ((IT) == DMA2_IT_GL3) || ((IT) == DMA2_IT_TC3) || ((IT) == DMA2_IT_HT3) || ((IT) == DMA2_IT_TE3) || ((IT) == DMA2_IT_GL4) || ((IT) == DMA2_IT_TC4) || ((IT) == DMA2_IT_HT4) || ((IT) == DMA2_IT_TE4) || ((IT) == DMA2_IT_GL5) || ((IT) == DMA2_IT_TC5) || ((IT) == DMA2_IT_HT5) || ((IT) == DMA2_IT_TE5))°DMA1_FLAG_GL1 ((uint32_t)0x00000001)±DMA1_FLAG_TC1 ((uint32_t)0x00000002)²DMA1_FLAG_HT1 ((uint32_t)0x00000004)³DMA1_FLAG_TE1 ((uint32_t)0x00000008)´DMA1_FLAG_GL2 ((uint32_t)0x00000010)µDMA1_FLAG_TC2 ((uint32_t)0x00000020)¶DMA1_FLAG_HT2 ((uint32_t)0x00000040)·DMA1_FLAG_TE2 ((uint32_t)0x00000080)¸DMA1_FLAG_GL3 ((uint32_t)0x00000100)¹DMA1_FLAG_TC3 ((uint32_t)0x00000200)ºDMA1_FLAG_HT3 ((uint32_t)0x00000400)»DMA1_FLAG_TE3 ((uint32_t)0x00000800)¼DMA1_FLAG_GL4 ((uint32_t)0x00001000)½DMA1_FLAG_TC4 ((uint32_t)0x00002000)¾DMA1_FLAG_HT4 ((uint32_t)0x00004000)¿DMA1_FLAG_TE4 ((uint32_t)0x00008000)ÀDMA1_FLAG_GL5 ((uint32_t)0x00010000)ÁDMA1_FLAG_TC5 ((uint32_t)0x00020000)ÂDMA1_FLAG_HT5 ((uint32_t)0x00040000)ÃDMA1_FLAG_TE5 ((uint32_t)0x00080000)ÄDMA1_FLAG_GL6 ((uint32_t)0x00100000)ÅDMA1_FLAG_TC6 ((uint32_t)0x00200000)ÆDMA1_FLAG_HT6 ((uint32_t)0x00400000)ÇDMA1_FLAG_TE6 ((uint32_t)0x00800000)ÈDMA1_FLAG_GL7 ((uint32_t)0x01000000)ÉDMA1_FLAG_TC7 ((uint32_t)0x02000000)ÊDMA1_FLAG_HT7 ((uint32_t)0x04000000)ËDMA1_FLAG_TE7 ((uint32_t)0x08000000)ÍDMA2_FLAG_GL1 ((uint32_t)0x10000001)ÎDMA2_FLAG_TC1 ((uint32_t)0x10000002)ÏDMA2_FLAG_HT1 ((uint32_t)0x10000004)ÐDMA2_FLAG_TE1 ((uint32_t)0x10000008)ÑDMA2_FLAG_GL2 ((uint32_t)0x10000010)ÒDMA2_FLAG_TC2 ((uint32_t)0x10000020)ÓDMA2_FLAG_HT2 ((uint32_t)0x10000040)ÔDMA2_FLAG_TE2 ((uint32_t)0x10000080)ÕDMA2_FLAG_GL3 ((uint32_t)0x10000100)ÖDMA2_FLAG_TC3 ((uint32_t)0x10000200)×DMA2_FLAG_HT3 ((uint32_t)0x10000400)ØDMA2_FLAG_TE3 ((uint32_t)0x10000800)ÙDMA2_FLAG_GL4 ((uint32_t)0x10001000)ÚDMA2_FLAG_TC4 ((uint32_t)0x10002000)ÛDMA2_FLAG_HT4 ((uint32_t)0x10004000)ÜDMA2_FLAG_TE4 ((uint32_t)0x10008000)ÝDMA2_FLAG_GL5 ((uint32_t)0x10010000)ÞDMA2_FLAG_TC5 ((uint32_t)0x10020000)ßDMA2_FLAG_HT5 ((uint32_t)0x10040000)àDMA2_FLAG_TE5 ((uint32_t)0x10080000)âIS_DMA_CLEAR_FLAG(FLAG) (((((FLAG) & 0xF0000000) == 0x00) || (((FLAG) & 0xEFF00000) == 0x00)) && ((FLAG) != 0x00))äIS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA1_FLAG_GL1) || ((FLAG) == DMA1_FLAG_TC1) || ((FLAG) == DMA1_FLAG_HT1) || ((FLAG) == DMA1_FLAG_TE1) || ((FLAG) == DMA1_FLAG_GL2) || ((FLAG) == DMA1_FLAG_TC2) || ((FLAG) == DMA1_FLAG_HT2) || ((FLAG) == DMA1_FLAG_TE2) || ((FLAG) == DMA1_FLAG_GL3) || ((FLAG) == DMA1_FLAG_TC3) || ((FLAG) == DMA1_FLAG_HT3) || ((FLAG) == DMA1_FLAG_TE3) || ((FLAG) == DMA1_FLAG_GL4) || ((FLAG) == DMA1_FLAG_TC4) || ((FLAG) == DMA1_FLAG_HT4) || ((FLAG) == DMA1_FLAG_TE4) || ((FLAG) == DMA1_FLAG_GL5) || ((FLAG) == DMA1_FLAG_TC5) || ((FLAG) == DMA1_FLAG_HT5) || ((FLAG) == DMA1_FLAG_TE5) || ((FLAG) == DMA1_FLAG_GL6) || ((FLAG) == DMA1_FLAG_TC6) || ((FLAG) == DMA1_FLAG_HT6) || ((FLAG) == DMA1_FLAG_TE6) || ((FLAG) == DMA1_FLAG_GL7) || ((FLAG) == DMA1_FLAG_TC7) || ((FLAG) == DMA1_FLAG_HT7) || ((FLAG) == DMA1_FLAG_TE7) || ((FLAG) == DMA2_FLAG_GL1) || ((FLAG) == DMA2_FLAG_TC1) || ((FLAG) == DMA2_FLAG_HT1) || ((FLAG) == DMA2_FLAG_TE1) || ((FLAG) == DMA2_FLAG_GL2) || ((FLAG) == DMA2_FLAG_TC2) || ((FLAG) == DMA2_FLAG_HT2) || ((FLAG) == DMA2_FLAG_TE2) || ((FLAG) == DMA2_FLAG_GL3) || ((FLAG) == DMA2_FLAG_TC3) || ((FLAG) == DMA2_FLAG_HT3) || ((FLAG) == DMA2_FLAG_TE3) || ((FLAG) == DMA2_FLAG_GL4) || ((FLAG) == DMA2_FLAG_TC4) || ((FLAG) == DMA2_FLAG_HT4) || ((FLAG) == DMA2_FLAG_TE4) || ((FLAG) == DMA2_FLAG_GL5) || ((FLAG) == DMA2_FLAG_TC5) || ((FLAG) == DMA2_FLAG_HT5) || ((FLAG) == DMA2_FLAG_TE5))IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))543
..\STM32F10x_FWLib\inc\stm32f10x_fsmc.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER*ùFSMC_AddressSetupTimeU#FSMC_AddressHoldTimeU#FSMC_DataSetupTimeU#FSMC_BusTurnAroundDurationU#FSMC_CLKDivisionU#FSMC_DataLatencyU#FSMC_AccessModeU#PFSMC_NORSRAMTimingInitTypeDefªV*È<FSMC_BankU#FSMC_DataAddressMuxU#FSMC_MemoryTypeU#FSMC_MemoryDataWidthU#FSMC_BurstAccessModeU#FSMC_AsynchronousWaitU#FSMC_WaitSignalPolarityU#FSMC_WrapModeU#FSMC_WaitSignalActiveU# FSMC_WriteOperationU#$FSMC_WaitSignalU#(FSMC_ExtendedModeU#,FSMC_WriteBurstU#0FSMC_ReadWriteTimingStructH#4FSMC_WriteTimingStructH#8"yPFSMC_NORSRAMInitTypeDef*ÜFSMC_SetupTimeU#FSMC_WaitSetupTimeU#FSMC_HoldSetupTimeU#FSMC_HiZSetupTimeU#PFSMC_NAND_PCCARDTimingInitTypeDefl±*
$FSMC_BankU#FSMC_WaitfeatureU#FSMC_MemoryDataWidthU#FSMC_ECCU#FSMC_ECCPageSizeU#FSMC_TCLRSetupTimeU#FSMC_TARSetupTimeU#FSMC_CommonSpaceTimingStruct#FSMC_AttributeSpaceTimingStruct# "ÜPFSMC_NANDInitTypeDefÓ*æFSMC_WaitfeatureU#FSMC_TCLRSetupTimeU#FSMC_TARSetupTimeU#FSMC_CommonSpaceTimingStruct#FSMC_AttributeSpaceTimingStruct#FSMC_IOSpaceTimingStruct#PFSMC_PCCARDInitTypeDef%ì`W ..\STM32F10x_FWLib\inc\..\USER\stm32f10x_fsmc.hstm32f10x.h__STM32F10x_FSMC_H  ùFSMC_Bank1_NORSRAM1 ((uint32_t)0x00000000)úFSMC_Bank1_NORSRAM2 ((uint32_t)0x00000002)ûFSMC_Bank1_NORSRAM3 ((uint32_t)0x00000004)üFSMC_Bank1_NORSRAM4 ((uint32_t)0x00000006)FSMC_Bank2_NAND ((uint32_t)0x00000010)FSMC_Bank3_NAND ((uint32_t)0x00000100)FSMC_Bank4_PCCARD ((uint32_t)0x00001000)IS_FSMC_NORSRAM_BANK(BANK) (((BANK) == FSMC_Bank1_NORSRAM1) || ((BANK) == FSMC_Bank1_NORSRAM2) || ((BANK) == FSMC_Bank1_NORSRAM3) || ((BANK) == FSMC_Bank1_NORSRAM4))IS_FSMC_NAND_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || ((BANK) == FSMC_Bank3_NAND))IS_FSMC_GETFLAG_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || ((BANK) == FSMC_Bank3_NAND) || ((BANK) == FSMC_Bank4_PCCARD))IS_FSMC_IT_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || ((BANK) == FSMC_Bank3_NAND) || ((BANK) == FSMC_Bank4_PCCARD))ªFSMC_DataAddressMux_Disable ((uint32_t)0x00000000)«FSMC_DataAddressMux_Enable ((uint32_t)0x00000002)¬IS_FSMC_MUX(MUX) (((MUX) == FSMC_DataAddressMux_Disable) || ((MUX) == FSMC_DataAddressMux_Enable))·FSMC_MemoryType_SRAM ((uint32_t)0x00000000)¸FSMC_MemoryType_PSRAM ((uint32_t)0x00000004)¹FSMC_MemoryType_NOR ((uint32_t)0x00000008)ºIS_FSMC_MEMORY(MEMORY) (((MEMORY) == FSMC_MemoryType_SRAM) || ((MEMORY) == FSMC_MemoryType_PSRAM)|| ((MEMORY) == FSMC_MemoryType_NOR))ÆFSMC_MemoryDataWidth_8b ((uint32_t)0x00000000)ÇFSMC_MemoryDataWidth_16b ((uint32_t)0x00000010)ÈIS_FSMC_MEMORY_WIDTH(WIDTH) (((WIDTH) == FSMC_MemoryDataWidth_8b) || ((WIDTH) == FSMC_MemoryDataWidth_16b))ÓFSMC_BurstAccessMode_Disable ((uint32_t)0x00000000)ÔFSMC_BurstAccessMode_Enable ((uint32_t)0x00000100)ÕIS_FSMC_BURSTMODE(STATE) (((STATE) == FSMC_BurstAccessMode_Disable) || ((STATE) == FSMC_BurstAccessMode_Enable))ÞFSMC_AsynchronousWait_Disable ((uint32_t)0x00000000)ßFSMC_AsynchronousWait_Enable ((uint32_t)0x00008000)àIS_FSMC_ASYNWAIT(STATE) (((STATE) == FSMC_AsynchronousWait_Disable) || ((STATE) == FSMC_AsynchronousWait_Enable))ëFSMC_WaitSignalPolarity_Low ((uint32_t)0x00000000)ìFSMC_WaitSignalPolarity_High ((uint32_t)0x00000200)íIS_FSMC_WAIT_POLARITY(POLARITY) (((POLARITY) == FSMC_WaitSignalPolarity_Low) || ((POLARITY) == FSMC_WaitSignalPolarity_High))øFSMC_WrapMode_Disable ((uint32_t)0x00000000)ùFSMC_WrapMode_Enable ((uint32_t)0x00000400)úIS_FSMC_WRAP_MODE(MODE) (((MODE) == FSMC_WrapMode_Disable) || ((MODE) == FSMC_WrapMode_Enable))FSMC_WaitSignalActive_BeforeWaitState ((uint32_t)0x00000000)FSMC_WaitSignalActive_DuringWaitState ((uint32_t)0x00000800)IS_FSMC_WAIT_SIGNAL_ACTIVE(ACTIVE) (((ACTIVE) == FSMC_WaitSignalActive_BeforeWaitState) || ((ACTIVE) == FSMC_WaitSignalActive_DuringWaitState))FSMC_WriteOperation_Disable ((uint32_t)0x00000000)FSMC_WriteOperation_Enable ((uint32_t)0x00001000)IS_FSMC_WRITE_OPERATION(OPERATION) (((OPERATION) == FSMC_WriteOperation_Disable) || ((OPERATION) == FSMC_WriteOperation_Enable))FSMC_WaitSignal_Disable ((uint32_t)0x00000000) FSMC_WaitSignal_Enable ((uint32_t)0x00002000)¡IS_FSMC_WAITE_SIGNAL(SIGNAL) (((SIGNAL) == FSMC_WaitSignal_Disable) || ((SIGNAL) == FSMC_WaitSignal_Enable))«FSMC_ExtendedMode_Disable ((uint32_t)0x00000000)¬FSMC_ExtendedMode_Enable ((uint32_t)0x00004000)®IS_FSMC_EXTENDED_MODE(MODE) (((MODE) == FSMC_ExtendedMode_Disable) || ((MODE) == FSMC_ExtendedMode_Enable))¹FSMC_WriteBurst_Disable ((uint32_t)0x00000000)ºFSMC_WriteBurst_Enable ((uint32_t)0x00080000)»IS_FSMC_WRITE_BURST(BURST) (((BURST) == FSMC_WriteBurst_Disable) || ((BURST) == FSMC_WriteBurst_Enable))ÅIS_FSMC_ADDRESS_SETUP_TIME(TIME) ((TIME) <= 0xF)ÏIS_FSMC_ADDRESS_HOLD_TIME(TIME) ((TIME) <= 0xF)ÙIS_FSMC_DATASETUP_TIME(TIME) (((TIME) > 0) && ((TIME) <= 0xFF))ãIS_FSMC_TURNAROUND_TIME(TIME) ((TIME) <= 0xF)íIS_FSMC_CLK_DIV(DIV) ((DIV) <= 0xF)÷IS_FSMC_DATA_LATENCY(LATENCY) ((LATENCY) <= 0xF)FSMC_AccessMode_A ((uint32_t)0x00000000)FSMC_AccessMode_B ((uint32_t)0x10000000)FSMC_AccessMode_C ((uint32_t)0x20000000)FSMC_AccessMode_D ((uint32_t)0x30000000)IS_FSMC_ACCESS_MODE(MODE) (((MODE) == FSMC_AccessMode_A) || ((MODE) == FSMC_AccessMode_B) || ((MODE) == FSMC_AccessMode_C) || ((MODE) == FSMC_AccessMode_D))FSMC_Waitfeature_Disable ((uint32_t)0x00000000)FSMC_Waitfeature_Enable ((uint32_t)0x00000002)IS_FSMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FSMC_Waitfeature_Disable) || ((FEATURE) == FSMC_Waitfeature_Enable))¨FSMC_ECC_Disable ((uint32_t)0x00000000)©FSMC_ECC_Enable ((uint32_t)0x00000040)ªIS_FSMC_ECC_STATE(STATE) (((STATE) == FSMC_ECC_Disable) || ((STATE) == FSMC_ECC_Enable))µFSMC_ECCPageSize_256Bytes ((uint32_t)0x00000000)¶FSMC_ECCPageSize_512Bytes ((uint32_t)0x00020000)·FSMC_ECCPageSize_1024Bytes ((uint32_t)0x00040000)¸FSMC_ECCPageSize_2048Bytes ((uint32_t)0x00060000)¹FSMC_ECCPageSize_4096Bytes ((uint32_t)0x00080000)ºFSMC_ECCPageSize_8192Bytes ((uint32_t)0x000A0000)»IS_FSMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FSMC_ECCPageSize_256Bytes) || ((SIZE) == FSMC_ECCPageSize_512Bytes) || ((SIZE) == FSMC_ECCPageSize_1024Bytes) || ((SIZE) == FSMC_ECCPageSize_2048Bytes) || ((SIZE) == FSMC_ECCPageSize_4096Bytes) || ((SIZE) == FSMC_ECCPageSize_8192Bytes))ÊIS_FSMC_TCLR_TIME(TIME) ((TIME) <= 0xFF)ÔIS_FSMC_TAR_TIME(TIME) ((TIME) <= 0xFF)ÞIS_FSMC_SETUP_TIME(TIME) ((TIME) <= 0xFF)èIS_FSMC_WAIT_TIME(TIME) ((TIME) <= 0xFF)òIS_FSMC_HOLD_TIME(TIME) ((TIME) <= 0xFF)üIS_FSMC_HIZ_TIME(TIME) ((TIME) <= 0xFF)FSMC_IT_RisingEdge ((uint32_t)0x00000008)FSMC_IT_Level ((uint32_t)0x00000010)FSMC_IT_FallingEdge ((uint32_t)0x00000020)IS_FSMC_IT(IT) ((((IT) & (uint32_t)0xFFFFFFC7) == 0x00000000) && ((IT) != 0x00000000))IS_FSMC_GET_IT(IT) (((IT) == FSMC_IT_RisingEdge) || ((IT) == FSMC_IT_Level) || ((IT) == FSMC_IT_FallingEdge))FSMC_FLAG_RisingEdge ((uint32_t)0x00000001)FSMC_FLAG_Level ((uint32_t)0x00000002)FSMC_FLAG_FallingEdge ((uint32_t)0x00000004)FSMC_FLAG_FEMPT ((uint32_t)0x00000040)IS_FSMC_GET_FLAG(FLAG) (((FLAG) == FSMC_FLAG_RisingEdge) || ((FLAG) == FSMC_FLAG_Level) || ((FLAG) == FSMC_FLAG_FallingEdge) || ((FLAG) == FSMC_FLAG_FEMPT))IS_FSMC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFF8) == 0x00000000) && ((FLAG) != 0x00000000))9878
..\STM32F10x_FWLib\inc\stm32f10x_gpio.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERêGPIO_Speed_10MHzGPIO_Speed_2MHzGPIO_Speed_50MHzPGPIOSpeed_TypeDefª?¢GPIO_Mode_AINGPIO_Mode_IN_FLOATINGGPIO_Mode_IPD(GPIO_Mode_IPUHGPIO_Mode_Out_ODGPIO_Mode_Out_PPGPIO_Mode_AF_ODGPIO_Mode_AF_PPPGPIOMode_TypeDefP*ôGPIO_PinE#GPIO_Speedê#GPIO_Mode¢#PGPIO_InitTypeDefºe©Bit_RESETBit_SETPBitActiono`W ..\STM32F10x_FWLib\inc\..\USER\stm32f10x_gpio.hstm32f10x.h__STM32F10x_GPIO_H  .IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || ((PERIPH) == GPIOB) || ((PERIPH) == GPIOC) || ((PERIPH) == GPIOD) || ((PERIPH) == GPIOE) || ((PERIPH) == GPIOF) || ((PERIPH) == GPIOG))@IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || ((SPEED) == GPIO_Speed_50MHz))RIS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || ((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || ((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || ((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP))qIS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET))GPIO_Pin_0 ((uint16_t)0x0001)GPIO_Pin_1 ((uint16_t)0x0002)GPIO_Pin_2 ((uint16_t)0x0004)GPIO_Pin_3 ((uint16_t)0x0008)GPIO_Pin_4 ((uint16_t)0x0010)GPIO_Pin_5 ((uint16_t)0x0020)GPIO_Pin_6 ((uint16_t)0x0040)GPIO_Pin_7 ((uint16_t)0x0080)GPIO_Pin_8 ((uint16_t)0x0100)GPIO_Pin_9 ((uint16_t)0x0200)GPIO_Pin_10 ((uint16_t)0x0400)GPIO_Pin_11 ((uint16_t)0x0800)GPIO_Pin_12 ((uint16_t)0x1000)GPIO_Pin_13 ((uint16_t)0x2000)GPIO_Pin_14 ((uint16_t)0x4000)GPIO_Pin_15 ((uint16_t)0x8000)GPIO_Pin_All ((uint16_t)0xFFFF)IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00))IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || ((PIN) == GPIO_Pin_1) || ((PIN) == GPIO_Pin_2) || ((PIN) == GPIO_Pin_3) || ((PIN) == GPIO_Pin_4) || ((PIN) == GPIO_Pin_5) || ((PIN) == GPIO_Pin_6) || ((PIN) == GPIO_Pin_7) || ((PIN) == GPIO_Pin_8) || ((PIN) == GPIO_Pin_9) || ((PIN) == GPIO_Pin_10) || ((PIN) == GPIO_Pin_11) || ((PIN) == GPIO_Pin_12) || ((PIN) == GPIO_Pin_13) || ((PIN) == GPIO_Pin_14) || ((PIN) == GPIO_Pin_15))¬GPIO_Remap_SPI1 ((uint32_t)0x00000001)GPIO_Remap_I2C1 ((uint32_t)0x00000002)®GPIO_Remap_USART1 ((uint32_t)0x00000004)¯GPIO_Remap_USART2 ((uint32_t)0x00000008)°GPIO_PartialRemap_USART3 ((uint32_t)0x00140010)±GPIO_FullRemap_USART3 ((uint32_t)0x00140030)²GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040)³GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0)´GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100)µGPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200)¶GPIO_FullRemap_TIM2 ((uint32_t)0x00180300)·GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800)¸GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00)¹GPIO_Remap_TIM4 ((uint32_t)0x00001000)ºGPIO_Remap1_CAN1 ((uint32_t)0x001D4000)»GPIO_Remap2_CAN1 ((uint32_t)0x001D6000)¼GPIO_Remap_PD01 ((uint32_t)0x00008000)½GPIO_Remap_TIM5CH4_LSI ((uint32_t)0x00200001)¾GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002)¿GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004)ÀGPIO_Remap_ADC2_ETRGINJ ((uint32_t)0x00200008)ÁGPIO_Remap_ADC2_ETRGREG ((uint32_t)0x00200010)ÂGPIO_Remap_ETH ((uint32_t)0x00200020)ÃGPIO_Remap_CAN2 ((uint32_t)0x00200040)ÄGPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100)ÅGPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200)ÆGPIO_Remap_SWJ_Disable ((uint32_t)0x00300400)ÇGPIO_Remap_SPI3 ((uint32_t)0x00201100)ÈGPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000)ËGPIO_Remap_PTP_PPS ((uint32_t)0x00204000)ÍGPIO_Remap_TIM15 ((uint32_t)0x80000001)ÎGPIO_Remap_TIM16 ((uint32_t)0x80000002)ÏGPIO_Remap_TIM17 ((uint32_t)0x80000004)ÐGPIO_Remap_CEC ((uint32_t)0x80000008)ÑGPIO_Remap_TIM1_DMA ((uint32_t)0x80000010)ÓGPIO_Remap_TIM9 ((uint32_t)0x80000020)ÔGPIO_Remap_TIM10 ((uint32_t)0x80000040)ÕGPIO_Remap_TIM11 ((uint32_t)0x80000080)ÖGPIO_Remap_TIM13 ((uint32_t)0x80000100)×GPIO_Remap_TIM14 ((uint32_t)0x80000200)ØGPIO_Remap_FSMC_NADV ((uint32_t)0x80000400)ÚGPIO_Remap_TIM67_DAC_DMA ((uint32_t)0x80000800)ÛGPIO_Remap_TIM12 ((uint32_t)0x80001000)ÜGPIO_Remap_MISC ((uint32_t)0x80002000)ßIS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || ((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) || ((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) || ((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) || ((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) || ((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) || ((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) || ((REMAP) == GPIO_Remap1_CAN1) || ((REMAP) == GPIO_Remap2_CAN1) || ((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) || ((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || ((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) || ((REMAP) == GPIO_Remap_ETH) ||((REMAP) == GPIO_Remap_CAN2) || ((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable) || ((REMAP) == GPIO_Remap_SWJ_Disable)|| ((REMAP) == GPIO_Remap_SPI3) || ((REMAP) == GPIO_Remap_TIM2ITR1_PTP_SOF) || ((REMAP) == GPIO_Remap_PTP_PPS) || ((REMAP) == GPIO_Remap_TIM15) || ((REMAP) == GPIO_Remap_TIM16) || ((REMAP) == GPIO_Remap_TIM17) || ((REMAP) == GPIO_Remap_CEC) || ((REMAP) == GPIO_Remap_TIM1_DMA) || ((REMAP) == GPIO_Remap_TIM9) || ((REMAP) == GPIO_Remap_TIM10) || ((REMAP) == GPIO_Remap_TIM11) || ((REMAP) == GPIO_Remap_TIM13) || ((REMAP) == GPIO_Remap_TIM14) || ((REMAP) == GPIO_Remap_FSMC_NADV) || ((REMAP) == GPIO_Remap_TIM67_DAC_DMA) || ((REMAP) == GPIO_Remap_TIM12) || ((REMAP) == GPIO_Remap_MISC))þGPIO_PortSourceGPIOA ((uint8_t)0x00)ÿGPIO_PortSourceGPIOB ((uint8_t)0x01)GPIO_PortSourceGPIOC ((uint8_t)0x02)GPIO_PortSourceGPIOD ((uint8_t)0x03)GPIO_PortSourceGPIOE ((uint8_t)0x04)GPIO_PortSourceGPIOF ((uint8_t)0x05)GPIO_PortSourceGPIOG ((uint8_t)0x06)IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || ((PORTSOURCE) == GPIO_PortSourceGPIOB) || ((PORTSOURCE) == GPIO_PortSourceGPIOC) || ((PORTSOURCE) == GPIO_PortSourceGPIOD) || ((PORTSOURCE) == GPIO_PortSourceGPIOE))IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || ((PORTSOURCE) == GPIO_PortSourceGPIOB) || ((PORTSOURCE) == GPIO_PortSourceGPIOC) || ((PORTSOURCE) == GPIO_PortSourceGPIOD) || ((PORTSOURCE) == GPIO_PortSourceGPIOE) || ((PORTSOURCE) == GPIO_PortSourceGPIOF) || ((PORTSOURCE) == GPIO_PortSourceGPIOG))GPIO_PinSource0 ((uint8_t)0x00)GPIO_PinSource1 ((uint8_t)0x01)GPIO_PinSource2 ((uint8_t)0x02)GPIO_PinSource3 ((uint8_t)0x03)GPIO_PinSource4 ((uint8_t)0x04) GPIO_PinSource5 ((uint8_t)0x05)¡GPIO_PinSource6 ((uint8_t)0x06)¢GPIO_PinSource7 ((uint8_t)0x07)£GPIO_PinSource8 ((uint8_t)0x08)¤GPIO_PinSource9 ((uint8_t)0x09)¥GPIO_PinSource10 ((uint8_t)0x0A)¦GPIO_PinSource11 ((uint8_t)0x0B)§GPIO_PinSource12 ((uint8_t)0x0C)¨GPIO_PinSource13 ((uint8_t)0x0D)©GPIO_PinSource14 ((uint8_t)0x0E)ªGPIO_PinSource15 ((uint8_t)0x0F)¬IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || ((PINSOURCE) == GPIO_PinSource1) || ((PINSOURCE) == GPIO_PinSource2) || ((PINSOURCE) == GPIO_PinSource3) || ((PINSOURCE) == GPIO_PinSource4) || ((PINSOURCE) == GPIO_PinSource5) || ((PINSOURCE) == GPIO_PinSource6) || ((PINSOURCE) == GPIO_PinSource7) || ((PINSOURCE) == GPIO_PinSource8) || ((PINSOURCE) == GPIO_PinSource9) || ((PINSOURCE) == GPIO_PinSource10) || ((PINSOURCE) == GPIO_PinSource11) || ((PINSOURCE) == GPIO_PinSource12) || ((PINSOURCE) == GPIO_PinSource13) || ((PINSOURCE) == GPIO_PinSource14) || ((PINSOURCE) == GPIO_PinSource15))ÄGPIO_ETH_MediaInterface_MII ((u32)0x00000000)ÅGPIO_ETH_MediaInterface_RMII ((u32)0x00000001)ÇIS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == GPIO_ETH_MediaInterface_MII) || ((INTERFACE) == GPIO_ETH_MediaInterface_RMII))=<;¨
..\STM32F10x_FWLib\inc\stm32f10x_pwr.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER`V ..\STM32F10x_FWLib\inc\..\USER\stm32f10x_pwr.hstm32f10x.h__STM32F10x_PWR_H  :PWR_PVDLevel_2V2 ((uint32_t)0x00000000);PWR_PVDLevel_2V3 ((uint32_t)0x00000020)<PWR_PVDLevel_2V4 ((uint32_t)0x00000040)=PWR_PVDLevel_2V5 ((uint32_t)0x00000060)>PWR_PVDLevel_2V6 ((uint32_t)0x00000080)?PWR_PVDLevel_2V7 ((uint32_t)0x000000A0)@PWR_PVDLevel_2V8 ((uint32_t)0x000000C0)APWR_PVDLevel_2V9 ((uint32_t)0x000000E0)BIS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9))NPWR_Regulator_ON ((uint32_t)0x00000000)OPWR_Regulator_LowPower ((uint32_t)0x00000001)PIS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || ((REGULATOR) == PWR_Regulator_LowPower))ZPWR_STOPEntry_WFI ((uint8_t)0x01)[PWR_STOPEntry_WFE ((uint8_t)0x02)\IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))fPWR_FLAG_WU ((uint32_t)0x00000001)gPWR_FLAG_SB ((uint32_t)0x00000002)hPWR_FLAG_PVDO ((uint32_t)0x00000004)iIS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || ((FLAG) == PWR_FLAG_PVDO))lIS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))A@?D
..\STM32F10x_FWLib\inc\stm32f10x_rcc.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER*¬SYSCLK_FrequencyU#HCLK_FrequencyU#PCLK1_FrequencyU#PCLK2_FrequencyU#ADCCLK_FrequencyU#PRCC_ClocksTypeDef©5`V ..\STM32F10x_FWLib\inc\..\USER\stm32f10x_rcc.hstm32f10x.h__STM32F10x_RCC_H  CRCC_HSE_OFF ((uint32_t)0x00000000)DRCC_HSE_ON ((uint32_t)0x00010000)ERCC_HSE_Bypass ((uint32_t)0x00040000)FIS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || ((HSE) == RCC_HSE_Bypass))QRCC_PLLSource_HSI_Div2 ((uint32_t)0x00000000)TRCC_PLLSource_HSE_Div1 ((uint32_t)0x00010000)URCC_PLLSource_HSE_Div2 ((uint32_t)0x00030000)VIS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || ((SOURCE) == RCC_PLLSource_HSE_Div1) || ((SOURCE) == RCC_PLLSource_HSE_Div2))gRCC_PLLMul_2 ((uint32_t)0x00000000)hRCC_PLLMul_3 ((uint32_t)0x00040000)iRCC_PLLMul_4 ((uint32_t)0x00080000)jRCC_PLLMul_5 ((uint32_t)0x000C0000)kRCC_PLLMul_6 ((uint32_t)0x00100000)lRCC_PLLMul_7 ((uint32_t)0x00140000)mRCC_PLLMul_8 ((uint32_t)0x00180000)nRCC_PLLMul_9 ((uint32_t)0x001C0000)oRCC_PLLMul_10 ((uint32_t)0x00200000)pRCC_PLLMul_11 ((uint32_t)0x00240000)qRCC_PLLMul_12 ((uint32_t)0x00280000)rRCC_PLLMul_13 ((uint32_t)0x002C0000)sRCC_PLLMul_14 ((uint32_t)0x00300000)tRCC_PLLMul_15 ((uint32_t)0x00340000)uRCC_PLLMul_16 ((uint32_t)0x00380000)vIS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_2) || ((MUL) == RCC_PLLMul_3) || ((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || ((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || ((MUL) == RCC_PLLMul_10) || ((MUL) == RCC_PLLMul_11) || ((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_13) || ((MUL) == RCC_PLLMul_14) || ((MUL) == RCC_PLLMul_15) || ((MUL) == RCC_PLLMul_16))¡RCC_SYSCLKSource_HSI ((uint32_t)0x00000000)¢RCC_SYSCLKSource_HSE ((uint32_t)0x00000001)£RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002)¤IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || ((SOURCE) == RCC_SYSCLKSource_HSE) || ((SOURCE) == RCC_SYSCLKSource_PLLCLK))¯RCC_SYSCLK_Div1 ((uint32_t)0x00000000)°RCC_SYSCLK_Div2 ((uint32_t)0x00000080)±RCC_SYSCLK_Div4 ((uint32_t)0x00000090)²RCC_SYSCLK_Div8 ((uint32_t)0x000000A0)³RCC_SYSCLK_Div16 ((uint32_t)0x000000B0)´RCC_SYSCLK_Div64 ((uint32_t)0x000000C0)µRCC_SYSCLK_Div128 ((uint32_t)0x000000D0)¶RCC_SYSCLK_Div256 ((uint32_t)0x000000E0)·RCC_SYSCLK_Div512 ((uint32_t)0x000000F0)¸IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || ((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || ((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || ((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || ((HCLK) == RCC_SYSCLK_Div512))ÅRCC_HCLK_Div1 ((uint32_t)0x00000000)ÆRCC_HCLK_Div2 ((uint32_t)0x00000400)ÇRCC_HCLK_Div4 ((uint32_t)0x00000500)ÈRCC_HCLK_Div8 ((uint32_t)0x00000600)ÉRCC_HCLK_Div16 ((uint32_t)0x00000700)ÊIS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || ((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || ((PCLK) == RCC_HCLK_Div16))ÕRCC_IT_LSIRDY ((uint8_t)0x01)ÖRCC_IT_LSERDY ((uint8_t)0x02)×RCC_IT_HSIRDY ((uint8_t)0x04)ØRCC_IT_HSERDY ((uint8_t)0x08)ÙRCC_IT_PLLRDY ((uint8_t)0x10)ÚRCC_IT_CSS ((uint8_t)0x80)ÝIS_RCC_IT(IT) ((((IT) & (uint8_t)0xE0) == 0x00) && ((IT) != 0x00))ÞIS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS))áIS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x60) == 0x00) && ((IT) != 0x00))÷RCC_USBCLKSource_PLLCLK_1Div5 ((uint8_t)0x00)øRCC_USBCLKSource_PLLCLK_Div1 ((uint8_t)0x01)úIS_RCC_USBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSource_PLLCLK_1Div5) || ((SOURCE) == RCC_USBCLKSource_PLLCLK_Div1))RCC_PCLK2_Div2 ((uint32_t)0x00000000)®RCC_PCLK2_Div4 ((uint32_t)0x00004000)¯RCC_PCLK2_Div6 ((uint32_t)0x00008000)°RCC_PCLK2_Div8 ((uint32_t)0x0000C000)±IS_RCC_ADCCLK(ADCCLK) (((ADCCLK) == RCC_PCLK2_Div2) || ((ADCCLK) == RCC_PCLK2_Div4) || ((ADCCLK) == RCC_PCLK2_Div6) || ((ADCCLK) == RCC_PCLK2_Div8))»RCC_LSE_OFF ((uint8_t)0x00)¼RCC_LSE_ON ((uint8_t)0x01)½RCC_LSE_Bypass ((uint8_t)0x04)¾IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || ((LSE) == RCC_LSE_Bypass))ÈRCC_RTCCLKSource_LSE ((uint32_t)0x00000100)ÉRCC_RTCCLKSource_LSI ((uint32_t)0x00000200)ÊRCC_RTCCLKSource_HSE_Div128 ((uint32_t)0x00000300)ËIS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || ((SOURCE) == RCC_RTCCLKSource_LSI) || ((SOURCE) == RCC_RTCCLKSource_HSE_Div128))ÖRCC_AHBPeriph_DMA1 ((uint32_t)0x00000001)×RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002)ØRCC_AHBPeriph_SRAM ((uint32_t)0x00000004)ÙRCC_AHBPeriph_FLITF ((uint32_t)0x00000010)ÚRCC_AHBPeriph_CRC ((uint32_t)0x00000040)ÝRCC_AHBPeriph_FSMC ((uint32_t)0x00000100)ÞRCC_AHBPeriph_SDIO ((uint32_t)0x00000400)ßIS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFAA8) == 0x00) && ((PERIPH) != 0x00))ñRCC_APB2Periph_AFIO ((uint32_t)0x00000001)òRCC_APB2Periph_GPIOA ((uint32_t)0x00000004)óRCC_APB2Periph_GPIOB ((uint32_t)0x00000008)ôRCC_APB2Periph_GPIOC ((uint32_t)0x00000010)õRCC_APB2Periph_GPIOD ((uint32_t)0x00000020)öRCC_APB2Periph_GPIOE ((uint32_t)0x00000040)÷RCC_APB2Periph_GPIOF ((uint32_t)0x00000080)øRCC_APB2Periph_GPIOG ((uint32_t)0x00000100)ùRCC_APB2Periph_ADC1 ((uint32_t)0x00000200)úRCC_APB2Periph_ADC2 ((uint32_t)0x00000400)ûRCC_APB2Periph_TIM1 ((uint32_t)0x00000800)üRCC_APB2Periph_SPI1 ((uint32_t)0x00001000)ýRCC_APB2Periph_TIM8 ((uint32_t)0x00002000)þRCC_APB2Periph_USART1 ((uint32_t)0x00004000)ÿRCC_APB2Periph_ADC3 ((uint32_t)0x00008000)RCC_APB2Periph_TIM15 ((uint32_t)0x00010000)RCC_APB2Periph_TIM16 ((uint32_t)0x00020000)RCC_APB2Periph_TIM17 ((uint32_t)0x00040000)RCC_APB2Periph_TIM9 ((uint32_t)0x00080000)RCC_APB2Periph_TIM10 ((uint32_t)0x00100000)RCC_APB2Periph_TIM11 ((uint32_t)0x00200000)IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFC00002) == 0x00) && ((PERIPH) != 0x00))RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)RCC_APB1Periph_TIM12 ((uint32_t)0x00000040)RCC_APB1Periph_TIM13 ((uint32_t)0x00000080)RCC_APB1Periph_TIM14 ((uint32_t)0x00000100)RCC_APB1Periph_WWDG ((uint32_t)0x00000800)RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)RCC_APB1Periph_USART2 ((uint32_t)0x00020000)RCC_APB1Periph_USART3 ((uint32_t)0x00040000)RCC_APB1Periph_UART4 ((uint32_t)0x00080000)RCC_APB1Periph_UART5 ((uint32_t)0x00100000) RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)¡RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)¢RCC_APB1Periph_USB ((uint32_t)0x00800000)£RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)¤RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)¥RCC_APB1Periph_BKP ((uint32_t)0x08000000)¦RCC_APB1Periph_PWR ((uint32_t)0x10000000)§RCC_APB1Periph_DAC ((uint32_t)0x20000000)¨RCC_APB1Periph_CEC ((uint32_t)0x40000000)ªIS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0x81013600) == 0x00) && ((PERIPH) != 0x00))´RCC_MCO_NoClock ((uint8_t)0x00)µRCC_MCO_SYSCLK ((uint8_t)0x04)¶RCC_MCO_HSI ((uint8_t)0x05)·RCC_MCO_HSE ((uint8_t)0x06)¸RCC_MCO_PLLCLK_Div2 ((uint8_t)0x07)»IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || ((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || ((MCO) == RCC_MCO_PLLCLK_Div2))ÓRCC_FLAG_HSIRDY ((uint8_t)0x21)ÔRCC_FLAG_HSERDY ((uint8_t)0x31)ÕRCC_FLAG_PLLRDY ((uint8_t)0x39)ÖRCC_FLAG_LSERDY ((uint8_t)0x41)×RCC_FLAG_LSIRDY ((uint8_t)0x61)ØRCC_FLAG_PINRST ((uint8_t)0x7A)ÙRCC_FLAG_PORRST ((uint8_t)0x7B)ÚRCC_FLAG_SFTRST ((uint8_t)0x7C)ÛRCC_FLAG_IWDGRST ((uint8_t)0x7D)ÜRCC_FLAG_WWDGRST ((uint8_t)0x7E)ÝRCC_FLAG_LPWRRST ((uint8_t)0x7F)àIS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || ((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || ((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || ((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| ((FLAG) == RCC_FLAG_LPWRRST))òIS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F)EDC¨
..\STM32F10x_FWLib\inc\stm32f10x_rtc.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER`V ..\STM32F10x_FWLib\inc\..\USER\stm32f10x_rtc.hstm32f10x.h__STM32F10x_RTC_H  :RTC_IT_OW ((uint16_t)0x0004);RTC_IT_ALR ((uint16_t)0x0002)<RTC_IT_SEC ((uint16_t)0x0001)=IS_RTC_IT(IT) ((((IT) & (uint16_t)0xFFF8) == 0x00) && ((IT) != 0x00))>IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || ((IT) == RTC_IT_SEC))HRTC_FLAG_RTOFF ((uint16_t)0x0020)IRTC_FLAG_RSF ((uint16_t)0x0008)JRTC_FLAG_OW ((uint16_t)0x0004)KRTC_FLAG_ALR ((uint16_t)0x0002)LRTC_FLAG_SEC ((uint16_t)0x0001)MIS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFF0) == 0x00) && ((FLAG) != 0x00))NIS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || ((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || ((FLAG) == RTC_FLAG_SEC))QIS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF)IHG$
..\STM32F10x_FWLib\inc\stm32f10x_spi.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER*òSPI_DirectionE#SPI_ModeE#SPI_DataSizeE#SPI_CPOLE#SPI_CPHAE#SPI_NSSE#
SPI_BaudRatePrescalerE#SPI_FirstBitE#SPI_CRCPolynomialE#PSPI_InitTypeDef©Q*I2S_ModeE#I2S_StandardE#I2S_DataFormatE#I2S_MCLKOutputE#I2S_AudioFreqU#I2S_CPOLE#PI2S_InitTypeDefk`V ..\STM32F10x_FWLib\inc\..\USER\stm32f10x_spi.hstm32f10x.h__STM32F10x_SPI_H  uIS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || ((PERIPH) == SPI2) || ((PERIPH) == SPI3))yIS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || ((PERIPH) == SPI3))SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)SPI_Direction_1Line_Rx ((uint16_t)0x8000)SPI_Direction_1Line_Tx ((uint16_t)0xC000)IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || ((MODE) == SPI_Direction_2Lines_RxOnly) || ((MODE) == SPI_Direction_1Line_Rx) || ((MODE) == SPI_Direction_1Line_Tx))SPI_Mode_Master ((uint16_t)0x0104)SPI_Mode_Slave ((uint16_t)0x0000)IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || ((MODE) == SPI_Mode_Slave))SPI_DataSize_16b ((uint16_t)0x0800)SPI_DataSize_8b ((uint16_t)0x0000)IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || ((DATASIZE) == SPI_DataSize_8b))¨SPI_CPOL_Low ((uint16_t)0x0000)©SPI_CPOL_High ((uint16_t)0x0002)ªIS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || ((CPOL) == SPI_CPOL_High))´SPI_CPHA_1Edge ((uint16_t)0x0000)µSPI_CPHA_2Edge ((uint16_t)0x0001)¶IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || ((CPHA) == SPI_CPHA_2Edge))ÀSPI_NSS_Soft ((uint16_t)0x0200)ÁSPI_NSS_Hard ((uint16_t)0x0000)ÂIS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || ((NSS) == SPI_NSS_Hard))ÌSPI_BaudRatePrescaler_2 ((uint16_t)0x0000)ÍSPI_BaudRatePrescaler_4 ((uint16_t)0x0008)ÎSPI_BaudRatePrescaler_8 ((uint16_t)0x0010)ÏSPI_BaudRatePrescaler_16 ((uint16_t)0x0018)ÐSPI_BaudRatePrescaler_32 ((uint16_t)0x0020)ÑSPI_BaudRatePrescaler_64 ((uint16_t)0x0028)ÒSPI_BaudRatePrescaler_128 ((uint16_t)0x0030)ÓSPI_BaudRatePrescaler_256 ((uint16_t)0x0038)ÔIS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || ((PRESCALER) == SPI_BaudRatePrescaler_4) || ((PRESCALER) == SPI_BaudRatePrescaler_8) || ((PRESCALER) == SPI_BaudRatePrescaler_16) || ((PRESCALER) == SPI_BaudRatePrescaler_32) || ((PRESCALER) == SPI_BaudRatePrescaler_64) || ((PRESCALER) == SPI_BaudRatePrescaler_128) || ((PRESCALER) == SPI_BaudRatePrescaler_256))äSPI_FirstBit_MSB ((uint16_t)0x0000)åSPI_FirstBit_LSB ((uint16_t)0x0080)æIS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || ((BIT) == SPI_FirstBit_LSB))ðI2S_Mode_SlaveTx ((uint16_t)0x0000)ñI2S_Mode_SlaveRx ((uint16_t)0x0100)òI2S_Mode_MasterTx ((uint16_t)0x0200)óI2S_Mode_MasterRx ((uint16_t)0x0300)ôIS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || ((MODE) == I2S_Mode_SlaveRx) || ((MODE) == I2S_Mode_MasterTx) || ((MODE) == I2S_Mode_MasterRx) )I2S_Standard_Phillips ((uint16_t)0x0000)I2S_Standard_MSB ((uint16_t)0x0010)I2S_Standard_LSB ((uint16_t)0x0020)I2S_Standard_PCMShort ((uint16_t)0x0030)I2S_Standard_PCMLong ((uint16_t)0x00B0)IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || ((STANDARD) == I2S_Standard_MSB) || ((STANDARD) == I2S_Standard_LSB) || ((STANDARD) == I2S_Standard_PCMShort) || ((STANDARD) == I2S_Standard_PCMLong))I2S_DataFormat_16b ((uint16_t)0x0000)I2S_DataFormat_16bextended ((uint16_t)0x0001)I2S_DataFormat_24b ((uint16_t)0x0003)I2S_DataFormat_32b ((uint16_t)0x0005)IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || ((FORMAT) == I2S_DataFormat_16bextended) || ((FORMAT) == I2S_DataFormat_24b) || ((FORMAT) == I2S_DataFormat_32b))¢I2S_MCLKOutput_Enable ((uint16_t)0x0200)£I2S_MCLKOutput_Disable ((uint16_t)0x0000)¤IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || ((OUTPUT) == I2S_MCLKOutput_Disable))®I2S_AudioFreq_192k ((uint32_t)192000)¯I2S_AudioFreq_96k ((uint32_t)96000)°I2S_AudioFreq_48k ((uint32_t)48000)±I2S_AudioFreq_44k ((uint32_t)44100)²I2S_AudioFreq_32k ((uint32_t)32000)³I2S_AudioFreq_22k ((uint32_t)22050)´I2S_AudioFreq_16k ((uint32_t)16000)µI2S_AudioFreq_11k ((uint32_t)11025)¶I2S_AudioFreq_8k ((uint32_t)8000)·I2S_AudioFreq_Default ((uint32_t)2)¹IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && ((FREQ) <= I2S_AudioFreq_192k)) || ((FREQ) == I2S_AudioFreq_Default))ÄI2S_CPOL_Low ((uint16_t)0x0000)ÅI2S_CPOL_High ((uint16_t)0x0008)ÆIS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || ((CPOL) == I2S_CPOL_High))ÐSPI_I2S_DMAReq_Tx ((uint16_t)0x0002)ÑSPI_I2S_DMAReq_Rx ((uint16_t)0x0001)ÒIS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))ÛSPI_NSSInternalSoft_Set ((uint16_t)0x0100)ÜSPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)ÝIS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || ((INTERNAL) == SPI_NSSInternalSoft_Reset))çSPI_CRC_Tx ((uint8_t)0x00)èSPI_CRC_Rx ((uint8_t)0x01)éIS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))òSPI_Direction_Rx ((uint16_t)0xBFFF)óSPI_Direction_Tx ((uint16_t)0x4000)ôIS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || ((DIRECTION) == SPI_Direction_Tx))þSPI_I2S_IT_TXE ((uint8_t)0x71)ÿSPI_I2S_IT_RXNE ((uint8_t)0x60)SPI_I2S_IT_ERR ((uint8_t)0x50)IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || ((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_ERR))SPI_I2S_IT_OVR ((uint8_t)0x56)SPI_IT_MODF ((uint8_t)0x55)SPI_IT_CRCERR ((uint8_t)0x54)I2S_IT_UDR ((uint8_t)0x53)IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)SPI_I2S_FLAG_TXE ((uint16_t)0x0002)I2S_FLAG_CHSIDE ((uint16_t)0x0004)I2S_FLAG_UDR ((uint16_t)0x0008)SPI_FLAG_CRCERR ((uint16_t)0x0010)SPI_FLAG_MODF ((uint16_t)0x0020)SPI_I2S_FLAG_OVR ((uint16_t)0x0040)SPI_I2S_FLAG_BSY ((uint16_t)0x0080)IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))©IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)MLK
..\STM32F10x_FWLib\inc\stm32f10x_tim.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER*¬
TIM_PrescalerE#TIM_CounterModeE#TIM_PeriodE#TIM_ClockDivisionE#TIM_RepetitionCounter6#PTIM_TimeBaseInitTypeDef©J*TIM_OCModeE#TIM_OutputStateE#TIM_OutputNStateE#TIM_PulseE#TIM_OCPolarityE#TIM_OCNPolarityE#
TIM_OCIdleStateE#TIM_OCNIdleStateE#PTIM_OCInitTypeDefKm*¡
TIM_ChannelE#TIM_ICPolarityE#TIM_ICSelectionE#TIM_ICPrescalerE#TIM_ICFilterE#PTIM_ICInitTypeDef'*æTIM_OSSRStateE#TIM_OSSIStateE#TIM_LOCKLevelE#TIM_DeadTimeE#TIM_BreakE#TIM_BreakPolarityE#
TIM_AutomaticOutputE#PTIM_BDTRInitTypeDef»£`V ..\STM32F10x_FWLib\inc\..\USER\stm32f10x_tim.hstm32f10x.h__STM32F10x_TIM_H  ©IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || ((PERIPH) == TIM2) || ((PERIPH) == TIM3) || ((PERIPH) == TIM4) || ((PERIPH) == TIM5) || ((PERIPH) == TIM6) || ((PERIPH) == TIM7) || ((PERIPH) == TIM8) || ((PERIPH) == TIM9) || ((PERIPH) == TIM10)|| ((PERIPH) == TIM11)|| ((PERIPH) == TIM12)|| ((PERIPH) == TIM13)|| ((PERIPH) == TIM14)|| ((PERIPH) == TIM15)|| ((PERIPH) == TIM16)|| ((PERIPH) == TIM17))¼IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || ((PERIPH) == TIM8))ÀIS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || ((PERIPH) == TIM8) || ((PERIPH) == TIM15)|| ((PERIPH) == TIM16)|| ((PERIPH) == TIM17))ÇIS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || ((PERIPH) == TIM2) || ((PERIPH) == TIM3) || ((PERIPH) == TIM4) || ((PERIPH) == TIM5) || ((PERIPH) == TIM8))ÏIS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) || ((PERIPH) == TIM2) || ((PERIPH) == TIM3) || ((PERIPH) == TIM4) || ((PERIPH) == TIM5) || ((PERIPH) == TIM8) || ((PERIPH) == TIM15)|| ((PERIPH) == TIM16)|| ((PERIPH) == TIM17))ÚIS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || ((PERIPH) == TIM2) || ((PERIPH) == TIM3) || ((PERIPH) == TIM4) || ((PERIPH) == TIM5) || ((PERIPH) == TIM8) || ((PERIPH) == TIM15))ãIS_TIM_LIST6_PERIPH(PERIPH) (((PERIPH) == TIM1) || ((PERIPH) == TIM2) || ((PERIPH) == TIM3) || ((PERIPH) == TIM4) || ((PERIPH) == TIM5) || ((PERIPH) == TIM8) || ((PERIPH) == TIM9) || ((PERIPH) == TIM12)|| ((PERIPH) == TIM15))îIS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM1) || ((PERIPH) == TIM2) || ((PERIPH) == TIM3) || ((PERIPH) == TIM4) || ((PERIPH) == TIM5) || ((PERIPH) == TIM6) || ((PERIPH) == TIM7) || ((PERIPH) == TIM8) || ((PERIPH) == TIM9) || ((PERIPH) == TIM12)|| ((PERIPH) == TIM15))ûIS_TIM_LIST8_PERIPH(PERIPH) (((PERIPH) == TIM1) || ((PERIPH) == TIM2) || ((PERIPH) == TIM3) || ((PERIPH) == TIM4) || ((PERIPH) == TIM5) || ((PERIPH) == TIM8) || ((PERIPH) == TIM9) || ((PERIPH) == TIM10)|| ((PERIPH) == TIM11)|| ((PERIPH) == TIM12)|| ((PERIPH) == TIM13)|| ((PERIPH) == TIM14)|| ((PERIPH) == TIM15)|| ((PERIPH) == TIM16)|| ((PERIPH) == TIM17))IS_TIM_LIST9_PERIPH(PERIPH) (((PERIPH) == TIM1) || ((PERIPH) == TIM2) || ((PERIPH) == TIM3) || ((PERIPH) == TIM4) || ((PERIPH) == TIM5) || ((PERIPH) == TIM6) || ((PERIPH) == TIM7) || ((PERIPH) == TIM8) || ((PERIPH) == TIM15)|| ((PERIPH) == TIM16)|| ((PERIPH) == TIM17)) TIM_OCMode_Timing ((uint16_t)0x0000)¡TIM_OCMode_Active ((uint16_t)0x0010)¢TIM_OCMode_Inactive ((uint16_t)0x0020)£TIM_OCMode_Toggle ((uint16_t)0x0030)¤TIM_OCMode_PWM1 ((uint16_t)0x0060)¥TIM_OCMode_PWM2 ((uint16_t)0x0070)¦IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || ((MODE) == TIM_OCMode_Active) || ((MODE) == TIM_OCMode_Inactive) || ((MODE) == TIM_OCMode_Toggle)|| ((MODE) == TIM_OCMode_PWM1) || ((MODE) == TIM_OCMode_PWM2))¬IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || ((MODE) == TIM_OCMode_Active) || ((MODE) == TIM_OCMode_Inactive) || ((MODE) == TIM_OCMode_Toggle)|| ((MODE) == TIM_OCMode_PWM1) || ((MODE) == TIM_OCMode_PWM2) || ((MODE) == TIM_ForcedAction_Active) || ((MODE) == TIM_ForcedAction_InActive))¼TIM_OPMode_Single ((uint16_t)0x0008)½TIM_OPMode_Repetitive ((uint16_t)0x0000)¾IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || ((MODE) == TIM_OPMode_Repetitive))ÈTIM_Channel_1 ((uint16_t)0x0000)ÉTIM_Channel_2 ((uint16_t)0x0004)ÊTIM_Channel_3 ((uint16_t)0x0008)ËTIM_Channel_4 ((uint16_t)0x000C)ÌIS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || ((CHANNEL) == TIM_Channel_2) || ((CHANNEL) == TIM_Channel_3) || ((CHANNEL) == TIM_Channel_4))ÐIS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || ((CHANNEL) == TIM_Channel_2))ÒIS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || ((CHANNEL) == TIM_Channel_2) || ((CHANNEL) == TIM_Channel_3))ÝTIM_CKD_DIV1 ((uint16_t)0x0000)ÞTIM_CKD_DIV2 ((uint16_t)0x0100)ßTIM_CKD_DIV4 ((uint16_t)0x0200)àIS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || ((DIV) == TIM_CKD_DIV2) || ((DIV) == TIM_CKD_DIV4))ëTIM_CounterMode_Up ((uint16_t)0x0000)ìTIM_CounterMode_Down ((uint16_t)0x0010)íTIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)îTIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)ïTIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)ðIS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || ((MODE) == TIM_CounterMode_Down) || ((MODE) == TIM_CounterMode_CenterAligned1) || ((MODE) == TIM_CounterMode_CenterAligned2) || ((MODE) == TIM_CounterMode_CenterAligned3))ýTIM_OCPolarity_High ((uint16_t)0x0000)þTIM_OCPolarity_Low ((uint16_t)0x0002)ÿIS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || ((POLARITY) == TIM_OCPolarity_Low))TIM_OCNPolarity_High ((uint16_t)0x0000)TIM_OCNPolarity_Low ((uint16_t)0x0008)IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || ((POLARITY) == TIM_OCNPolarity_Low))TIM_OutputState_Disable ((uint16_t)0x0000)TIM_OutputState_Enable ((uint16_t)0x0001)IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || ((STATE) == TIM_OutputState_Enable))¡TIM_OutputNState_Disable ((uint16_t)0x0000)¢TIM_OutputNState_Enable ((uint16_t)0x0004)£IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || ((STATE) == TIM_OutputNState_Enable))TIM_CCx_Enable ((uint16_t)0x0001)®TIM_CCx_Disable ((uint16_t)0x0000)¯IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || ((CCX) == TIM_CCx_Disable))¹TIM_CCxN_Enable ((uint16_t)0x0004)ºTIM_CCxN_Disable ((uint16_t)0x0000)»IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || ((CCXN) == TIM_CCxN_Disable))ÅTIM_Break_Enable ((uint16_t)0x1000)ÆTIM_Break_Disable ((uint16_t)0x0000)ÇIS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || ((STATE) == TIM_Break_Disable))ÑTIM_BreakPolarity_Low ((uint16_t)0x0000)ÒTIM_BreakPolarity_High ((uint16_t)0x2000)ÓIS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || ((POLARITY) == TIM_BreakPolarity_High))ÝTIM_AutomaticOutput_Enable ((uint16_t)0x4000)ÞTIM_AutomaticOutput_Disable ((uint16_t)0x0000)ßIS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || ((STATE) == TIM_AutomaticOutput_Disable))éTIM_LOCKLevel_OFF ((uint16_t)0x0000)êTIM_LOCKLevel_1 ((uint16_t)0x0100)ëTIM_LOCKLevel_2 ((uint16_t)0x0200)ìTIM_LOCKLevel_3 ((uint16_t)0x0300)íIS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || ((LEVEL) == TIM_LOCKLevel_1) || ((LEVEL) == TIM_LOCKLevel_2) || ((LEVEL) == TIM_LOCKLevel_3))ùTIM_OSSIState_Enable ((uint16_t)0x0400)úTIM_OSSIState_Disable ((uint16_t)0x0000)ûIS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || ((STATE) == TIM_OSSIState_Disable))TIM_OSSRState_Enable ((uint16_t)0x0800)TIM_OSSRState_Disable ((uint16_t)0x0000)IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || ((STATE) == TIM_OSSRState_Disable))TIM_OCIdleState_Set ((uint16_t)0x0100)TIM_OCIdleState_Reset ((uint16_t)0x0000)IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || ((STATE) == TIM_OCIdleState_Reset))TIM_OCNIdleState_Set ((uint16_t)0x0200)TIM_OCNIdleState_Reset ((uint16_t)0x0000)IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || ((STATE) == TIM_OCNIdleState_Reset))©TIM_ICPolarity_Rising ((uint16_t)0x0000)ªTIM_ICPolarity_Falling ((uint16_t)0x0002)«TIM_ICPolarity_BothEdge ((uint16_t)0x000A)¬IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || ((POLARITY) == TIM_ICPolarity_Falling))®IS_TIM_IC_POLARITY_LITE(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || ((POLARITY) == TIM_ICPolarity_Falling)|| ((POLARITY) == TIM_ICPolarity_BothEdge))¹TIM_ICSelection_DirectTI ((uint16_t)0x0001)»TIM_ICSelection_IndirectTI ((uint16_t)0x0002)½TIM_ICSelection_TRC ((uint16_t)0x0003)¾IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || ((SELECTION) == TIM_ICSelection_IndirectTI) || ((SELECTION) == TIM_ICSelection_TRC))ÉTIM_ICPSC_DIV1 ((uint16_t)0x0000)ÊTIM_ICPSC_DIV2 ((uint16_t)0x0004)ËTIM_ICPSC_DIV4 ((uint16_t)0x0008)ÌTIM_ICPSC_DIV8 ((uint16_t)0x000C)ÍIS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || ((PRESCALER) == TIM_ICPSC_DIV2) || ((PRESCALER) == TIM_ICPSC_DIV4) || ((PRESCALER) == TIM_ICPSC_DIV8))ÙTIM_IT_Update ((uint16_t)0x0001)ÚTIM_IT_CC1 ((uint16_t)0x0002)ÛTIM_IT_CC2 ((uint16_t)0x0004)ÜTIM_IT_CC3 ((uint16_t)0x0008)ÝTIM_IT_CC4 ((uint16_t)0x0010)ÞTIM_IT_COM ((uint16_t)0x0020)ßTIM_IT_Trigger ((uint16_t)0x0040)àTIM_IT_Break ((uint16_t)0x0080)áIS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000))ãIS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || ((IT) == TIM_IT_CC1) || ((IT) == TIM_IT_CC2) || ((IT) == TIM_IT_CC3) || ((IT) == TIM_IT_CC4) || ((IT) == TIM_IT_COM) || ((IT) == TIM_IT_Trigger) || ((IT) == TIM_IT_Break))óTIM_DMABase_CR1 ((uint16_t)0x0000)ôTIM_DMABase_CR2 ((uint16_t)0x0001)õTIM_DMABase_SMCR ((uint16_t)0x0002)öTIM_DMABase_DIER ((uint16_t)0x0003)÷TIM_DMABase_SR ((uint16_t)0x0004)øTIM_DMABase_EGR ((uint16_t)0x0005)ùTIM_DMABase_CCMR1 ((uint16_t)0x0006)úTIM_DMABase_CCMR2 ((uint16_t)0x0007)ûTIM_DMABase_CCER ((uint16_t)0x0008)üTIM_DMABase_CNT ((uint16_t)0x0009)ýTIM_DMABase_PSC ((uint16_t)0x000A)þTIM_DMABase_ARR ((uint16_t)0x000B)ÿTIM_DMABase_RCR ((uint16_t)0x000C)TIM_DMABase_CCR1 ((uint16_t)0x000D)TIM_DMABase_CCR2 ((uint16_t)0x000E)TIM_DMABase_CCR3 ((uint16_t)0x000F)TIM_DMABase_CCR4 ((uint16_t)0x0010)TIM_DMABase_BDTR ((uint16_t)0x0011)TIM_DMABase_DCR ((uint16_t)0x0012)IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || ((BASE) == TIM_DMABase_CR2) || ((BASE) == TIM_DMABase_SMCR) || ((BASE) == TIM_DMABase_DIER) || ((BASE) == TIM_DMABase_SR) || ((BASE) == TIM_DMABase_EGR) || ((BASE) == TIM_DMABase_CCMR1) || ((BASE) == TIM_DMABase_CCMR2) || ((BASE) == TIM_DMABase_CCER) || ((BASE) == TIM_DMABase_CNT) || ((BASE) == TIM_DMABase_PSC) || ((BASE) == TIM_DMABase_ARR) || ((BASE) == TIM_DMABase_RCR) || ((BASE) == TIM_DMABase_CCR1) || ((BASE) == TIM_DMABase_CCR2) || ((BASE) == TIM_DMABase_CCR3) || ((BASE) == TIM_DMABase_CCR4) || ((BASE) == TIM_DMABase_BDTR) || ((BASE) == TIM_DMABase_DCR))¡TIM_DMABurstLength_1Transfer ((uint16_t)0x0000)¢TIM_DMABurstLength_2Transfers ((uint16_t)0x0100)£TIM_DMABurstLength_3Transfers ((uint16_t)0x0200)¤TIM_DMABurstLength_4Transfers ((uint16_t)0x0300)¥TIM_DMABurstLength_5Transfers ((uint16_t)0x0400)¦TIM_DMABurstLength_6Transfers ((uint16_t)0x0500)§TIM_DMABurstLength_7Transfers ((uint16_t)0x0600)¨TIM_DMABurstLength_8Transfers ((uint16_t)0x0700)©TIM_DMABurstLength_9Transfers ((uint16_t)0x0800)ªTIM_DMABurstLength_10Transfers ((uint16_t)0x0900)«TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00)¬TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00)TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00)®TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00)¯TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00)°TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00)±TIM_DMABurstLength_17Transfers ((uint16_t)0x1000)²TIM_DMABurstLength_18Transfers ((uint16_t)0x1100)³IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || ((LENGTH) == TIM_DMABurstLength_2Transfers) || ((LENGTH) == TIM_DMABurstLength_3Transfers) || ((LENGTH) == TIM_DMABurstLength_4Transfers) || ((LENGTH) == TIM_DMABurstLength_5Transfers) || ((LENGTH) == TIM_DMABurstLength_6Transfers) || ((LENGTH) == TIM_DMABurstLength_7Transfers) || ((LENGTH) == TIM_DMABurstLength_8Transfers) || ((LENGTH) == TIM_DMABurstLength_9Transfers) || ((LENGTH) == TIM_DMABurstLength_10Transfers) || ((LENGTH) == TIM_DMABurstLength_11Transfers) || ((LENGTH) == TIM_DMABurstLength_12Transfers) || ((LENGTH) == TIM_DMABurstLength_13Transfers) || ((LENGTH) == TIM_DMABurstLength_14Transfers) || ((LENGTH) == TIM_DMABurstLength_15Transfers) || ((LENGTH) == TIM_DMABurstLength_16Transfers) || ((LENGTH) == TIM_DMABurstLength_17Transfers) || ((LENGTH) == TIM_DMABurstLength_18Transfers))ÍTIM_DMA_Update ((uint16_t)0x0100)ÎTIM_DMA_CC1 ((uint16_t)0x0200)ÏTIM_DMA_CC2 ((uint16_t)0x0400)ÐTIM_DMA_CC3 ((uint16_t)0x0800)ÑTIM_DMA_CC4 ((uint16_t)0x1000)ÒTIM_DMA_COM ((uint16_t)0x2000)ÓTIM_DMA_Trigger ((uint16_t)0x4000)ÔIS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))ÞTIM_ExtTRGPSC_OFF ((uint16_t)0x0000)ßTIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)àTIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)áTIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)âIS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || ((PRESCALER) == TIM_ExtTRGPSC_DIV8))îTIM_TS_ITR0 ((uint16_t)0x0000)ïTIM_TS_ITR1 ((uint16_t)0x0010)ðTIM_TS_ITR2 ((uint16_t)0x0020)ñTIM_TS_ITR3 ((uint16_t)0x0030)òTIM_TS_TI1F_ED ((uint16_t)0x0040)óTIM_TS_TI1FP1 ((uint16_t)0x0050)ôTIM_TS_TI2FP2 ((uint16_t)0x0060)õTIM_TS_ETRF ((uint16_t)0x0070)öIS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || ((SELECTION) == TIM_TS_ITR1) || ((SELECTION) == TIM_TS_ITR2) || ((SELECTION) == TIM_TS_ITR3) || ((SELECTION) == TIM_TS_TI1F_ED) || ((SELECTION) == TIM_TS_TI1FP1) || ((SELECTION) == TIM_TS_TI2FP2) || ((SELECTION) == TIM_TS_ETRF))þIS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || ((SELECTION) == TIM_TS_ITR1) || ((SELECTION) == TIM_TS_ITR2) || ((SELECTION) == TIM_TS_ITR3))TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)IS_TIM_TIXCLK_SOURCE(SOURCE) (((SOURCE) == TIM_TIxExternalCLK1Source_TI1) || ((SOURCE) == TIM_TIxExternalCLK1Source_TI2) || ((SOURCE) == TIM_TIxExternalCLK1Source_TI1ED))TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || ((POLARITY) == TIM_ExtTRGPolarity_NonInverted))£TIM_PSCReloadMode_Update ((uint16_t)0x0000)¤TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)¥IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || ((RELOAD) == TIM_PSCReloadMode_Immediate))¯TIM_ForcedAction_Active ((uint16_t)0x0050)°TIM_ForcedAction_InActive ((uint16_t)0x0040)±IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || ((ACTION) == TIM_ForcedAction_InActive))»TIM_EncoderMode_TI1 ((uint16_t)0x0001)¼TIM_EncoderMode_TI2 ((uint16_t)0x0002)½TIM_EncoderMode_TI12 ((uint16_t)0x0003)¾IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || ((MODE) == TIM_EncoderMode_TI2) || ((MODE) == TIM_EncoderMode_TI12))ÊTIM_EventSource_Update ((uint16_t)0x0001)ËTIM_EventSource_CC1 ((uint16_t)0x0002)ÌTIM_EventSource_CC2 ((uint16_t)0x0004)ÍTIM_EventSource_CC3 ((uint16_t)0x0008)ÎTIM_EventSource_CC4 ((uint16_t)0x0010)ÏTIM_EventSource_COM ((uint16_t)0x0020)ÐTIM_EventSource_Trigger ((uint16_t)0x0040)ÑTIM_EventSource_Break ((uint16_t)0x0080)ÒIS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000))ÜTIM_UpdateSource_Global ((uint16_t)0x0000)ßTIM_UpdateSource_Regular ((uint16_t)0x0001)àIS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || ((SOURCE) == TIM_UpdateSource_Regular))êTIM_OCPreload_Enable ((uint16_t)0x0008)ëTIM_OCPreload_Disable ((uint16_t)0x0000)ìIS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || ((STATE) == TIM_OCPreload_Disable))öTIM_OCFast_Enable ((uint16_t)0x0004)÷TIM_OCFast_Disable ((uint16_t)0x0000)øIS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || ((STATE) == TIM_OCFast_Disable))TIM_OCClear_Enable ((uint16_t)0x0080)TIM_OCClear_Disable ((uint16_t)0x0000)IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || ((STATE) == TIM_OCClear_Disable))TIM_TRGOSource_Reset ((uint16_t)0x0000)TIM_TRGOSource_Enable ((uint16_t)0x0010)TIM_TRGOSource_Update ((uint16_t)0x0020)TIM_TRGOSource_OC1 ((uint16_t)0x0030)TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || ((SOURCE) == TIM_TRGOSource_Enable) || ((SOURCE) == TIM_TRGOSource_Update) || ((SOURCE) == TIM_TRGOSource_OC1) || ((SOURCE) == TIM_TRGOSource_OC1Ref) || ((SOURCE) == TIM_TRGOSource_OC2Ref) || ((SOURCE) == TIM_TRGOSource_OC3Ref) || ((SOURCE) == TIM_TRGOSource_OC4Ref))§TIM_SlaveMode_Reset ((uint16_t)0x0004)¨TIM_SlaveMode_Gated ((uint16_t)0x0005)©TIM_SlaveMode_Trigger ((uint16_t)0x0006)ªTIM_SlaveMode_External1 ((uint16_t)0x0007)«IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || ((MODE) == TIM_SlaveMode_Gated) || ((MODE) == TIM_SlaveMode_Trigger) || ((MODE) == TIM_SlaveMode_External1))·TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)¸TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)¹IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || ((STATE) == TIM_MasterSlaveMode_Disable))ÃTIM_FLAG_Update ((uint16_t)0x0001)ÄTIM_FLAG_CC1 ((uint16_t)0x0002)ÅTIM_FLAG_CC2 ((uint16_t)0x0004)ÆTIM_FLAG_CC3 ((uint16_t)0x0008)ÇTIM_FLAG_CC4 ((uint16_t)0x0010)ÈTIM_FLAG_COM ((uint16_t)0x0020)ÉTIM_FLAG_Trigger ((uint16_t)0x0040)ÊTIM_FLAG_Break ((uint16_t)0x0080)ËTIM_FLAG_CC1OF ((uint16_t)0x0200)ÌTIM_FLAG_CC2OF ((uint16_t)0x0400)ÍTIM_FLAG_CC3OF ((uint16_t)0x0800)ÎTIM_FLAG_CC4OF ((uint16_t)0x1000)ÏIS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || ((FLAG) == TIM_FLAG_CC1) || ((FLAG) == TIM_FLAG_CC2) || ((FLAG) == TIM_FLAG_CC3) || ((FLAG) == TIM_FLAG_CC4) || ((FLAG) == TIM_FLAG_COM) || ((FLAG) == TIM_FLAG_Trigger) || ((FLAG) == TIM_FLAG_Break) || ((FLAG) == TIM_FLAG_CC1OF) || ((FLAG) == TIM_FLAG_CC2OF) || ((FLAG) == TIM_FLAG_CC3OF) || ((FLAG) == TIM_FLAG_CC4OF))ÝIS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000))æIS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)ïIS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF)øTIM_DMABurstLength_1Byte TIM_DMABurstLength_1TransferùTIM_DMABurstLength_2Bytes TIM_DMABurstLength_2TransfersúTIM_DMABurstLength_3Bytes TIM_DMABurstLength_3TransfersûTIM_DMABurstLength_4Bytes TIM_DMABurstLength_4TransfersüTIM_DMABurstLength_5Bytes TIM_DMABurstLength_5TransfersýTIM_DMABurstLength_6Bytes TIM_DMABurstLength_6TransfersþTIM_DMABurstLength_7Bytes TIM_DMABurstLength_7TransfersÿTIM_DMABurstLength_8Bytes TIM_DMABurstLength_8TransfersTIM_DMABurstLength_9Bytes TIM_DMABurstLength_9TransfersTIM_DMABurstLength_10Bytes TIM_DMABurstLength_10TransfersTIM_DMABurstLength_11Bytes TIM_DMABurstLength_11TransfersTIM_DMABurstLength_12Bytes TIM_DMABurstLength_12TransfersTIM_DMABurstLength_13Bytes TIM_DMABurstLength_13TransfersTIM_DMABurstLength_14Bytes TIM_DMABurstLength_14TransfersTIM_DMABurstLength_15Bytes TIM_DMABurstLength_15TransfersTIM_DMABurstLength_16Bytes TIM_DMABurstLength_16TransfersTIM_DMABurstLength_17Bytes TIM_DMABurstLength_17TransfersTIM_DMABurstLength_18Bytes TIM_DMABurstLength_18TransfersQPOØ
..\STM32F10x_FWLib\inc\stm32f10x_usart.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER*ÇUSART_BaudRateU#USART_WordLengthE#USART_StopBitsE#USART_ParityE#USART_ModeE#
USART_HardwareFlowControlE#PUSART_InitTypeDef«L*¹USART_ClockE#USART_CPOLE#USART_CPHAE#USART_LastBitE#PUSART_ClockInitTypeDef`adX ..\STM32F10x_FWLib\inc\..\USER\stm32f10x_usart.hstm32f10x.h__STM32F10x_USART_H  kIS_USART_ALL_PERIPH(PERIPH) (((PERIPH) == USART1) || ((PERIPH) == USART2) || ((PERIPH) == USART3) || ((PERIPH) == UART4) || ((PERIPH) == UART5))qIS_USART_123_PERIPH(PERIPH) (((PERIPH) == USART1) || ((PERIPH) == USART2) || ((PERIPH) == USART3))uIS_USART_1234_PERIPH(PERIPH) (((PERIPH) == USART1) || ((PERIPH) == USART2) || ((PERIPH) == USART3) || ((PERIPH) == UART4))}USART_WordLength_8b ((uint16_t)0x0000)~USART_WordLength_9b ((uint16_t)0x1000)IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || ((LENGTH) == USART_WordLength_9b))USART_StopBits_1 ((uint16_t)0x0000)USART_StopBits_0_5 ((uint16_t)0x1000)USART_StopBits_2 ((uint16_t)0x2000)USART_StopBits_1_5 ((uint16_t)0x3000)IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || ((STOPBITS) == USART_StopBits_0_5) || ((STOPBITS) == USART_StopBits_2) || ((STOPBITS) == USART_StopBits_1_5))USART_Parity_No ((uint16_t)0x0000)USART_Parity_Even ((uint16_t)0x0400)USART_Parity_Odd ((uint16_t)0x0600)IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || ((PARITY) == USART_Parity_Even) || ((PARITY) == USART_Parity_Odd))¨USART_Mode_Rx ((uint16_t)0x0004)©USART_Mode_Tx ((uint16_t)0x0008)ªIS_USART_MODE(MODE) ((((MODE) & (uint16_t)0xFFF3) == 0x00) && ((MODE) != (uint16_t)0x00))²USART_HardwareFlowControl_None ((uint16_t)0x0000)³USART_HardwareFlowControl_RTS ((uint16_t)0x0100)´USART_HardwareFlowControl_CTS ((uint16_t)0x0200)µUSART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300)¶IS_USART_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == USART_HardwareFlowControl_None) || ((CONTROL) == USART_HardwareFlowControl_RTS) || ((CONTROL) == USART_HardwareFlowControl_CTS) || ((CONTROL) == USART_HardwareFlowControl_RTS_CTS))ÂUSART_Clock_Disable ((uint16_t)0x0000)ÃUSART_Clock_Enable ((uint16_t)0x0800)ÄIS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || ((CLOCK) == USART_Clock_Enable))ÎUSART_CPOL_Low ((uint16_t)0x0000)ÏUSART_CPOL_High ((uint16_t)0x0400)ÐIS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High))ÚUSART_CPHA_1Edge ((uint16_t)0x0000)ÛUSART_CPHA_2Edge ((uint16_t)0x0200)ÜIS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge))æUSART_LastBit_Disable ((uint16_t)0x0000)çUSART_LastBit_Enable ((uint16_t)0x0100)èIS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || ((LASTBIT) == USART_LastBit_Enable))òUSART_IT_PE ((uint16_t)0x0028)óUSART_IT_TXE ((uint16_t)0x0727)ôUSART_IT_TC ((uint16_t)0x0626)õUSART_IT_RXNE ((uint16_t)0x0525)öUSART_IT_IDLE ((uint16_t)0x0424)÷USART_IT_LBD ((uint16_t)0x0846)øUSART_IT_CTS ((uint16_t)0x096A)ùUSART_IT_ERR ((uint16_t)0x0060)úUSART_IT_ORE ((uint16_t)0x0360)ûUSART_IT_NE ((uint16_t)0x0260)üUSART_IT_FE ((uint16_t)0x0160)ýIS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR))IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || ((IT) == USART_IT_NE) || ((IT) == USART_IT_FE))IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || ((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS))USART_DMAReq_Tx ((uint16_t)0x0080)USART_DMAReq_Rx ((uint16_t)0x0040)IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFF3F) == 0x00) && ((DMAREQ) != (uint16_t)0x00))USART_WakeUp_IdleLine ((uint16_t)0x0000)USART_WakeUp_AddressMark ((uint16_t)0x0800)IS_USART_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || ((WAKEUP) == USART_WakeUp_AddressMark))¨USART_LINBreakDetectLength_10b ((uint16_t)0x0000)©USART_LINBreakDetectLength_11b ((uint16_t)0x0020)ªIS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == USART_LINBreakDetectLength_10b) || ((LENGTH) == USART_LINBreakDetectLength_11b))µUSART_IrDAMode_LowPower ((uint16_t)0x0004)¶USART_IrDAMode_Normal ((uint16_t)0x0000)·IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || ((MODE) == USART_IrDAMode_Normal))ÁUSART_FLAG_CTS ((uint16_t)0x0200)ÂUSART_FLAG_LBD ((uint16_t)0x0100)ÃUSART_FLAG_TXE ((uint16_t)0x0080)ÄUSART_FLAG_TC ((uint16_t)0x0040)ÅUSART_FLAG_RXNE ((uint16_t)0x0020)ÆUSART_FLAG_IDLE ((uint16_t)0x0010)ÇUSART_FLAG_ORE ((uint16_t)0x0008)ÈUSART_FLAG_NE ((uint16_t)0x0004)ÉUSART_FLAG_FE ((uint16_t)0x0002)ÊUSART_FLAG_PE ((uint16_t)0x0001)ËIS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || ((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || ((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || ((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || ((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE))ÑIS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFC9F) == 0x00) && ((FLAG) != (uint16_t)0x00))ÒIS_USART_PERIPH_FLAG(PERIPH,USART_FLAG) ((((*(uint32_t*)&(PERIPH)) != UART4_BASE) && ((*(uint32_t*)&(PERIPH)) != UART5_BASE)) || ((USART_FLAG) != USART_FLAG_CTS))ÕIS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21))ÖIS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)×IS_USART_DATA(DATA) ((DATA) <= 0x1FF)UTS@
..\STM32F10x_FWLib\inc\misc.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER*©NVIC_IRQChannel6#NVIC_IRQChannelPreemptionPriority6#NVIC_IRQChannelSubPriority6#NVIC_IRQChannelCmdÒ#PNVIC_InitTypeDef DXM ..\STM32F10x_FWLib\inc\..\USER\misc.hstm32f10x.h__MISC_H  sNVIC_VectTab_RAM ((uint32_t)0x20000000)tNVIC_VectTab_FLASH ((uint32_t)0x08000000)uIS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || ((VECTTAB) == NVIC_VectTab_FLASH))NVIC_LP_SEVONPEND ((uint8_t)0x10)NVIC_LP_SLEEPDEEP ((uint8_t)0x04)NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || ((LP) == NVIC_LP_SLEEPDEEP) || ((LP) == NVIC_LP_SLEEPONEXIT))NVIC_PriorityGroup_0 ((uint32_t)0x700)NVIC_PriorityGroup_1 ((uint32_t)0x600)NVIC_PriorityGroup_2 ((uint32_t)0x500)NVIC_PriorityGroup_3 ((uint32_t)0x400)NVIC_PriorityGroup_4 ((uint32_t)0x300)IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || ((GROUP) == NVIC_PriorityGroup_1) || ((GROUP) == NVIC_PriorityGroup_2) || ((GROUP) == NVIC_PriorityGroup_3) || ((GROUP) == NVIC_PriorityGroup_4))IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)¢IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF)¬SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)SysTick_CLKSource_HCLK ((uint32_t)0x00000004)®IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || ((SOURCE) == SysTick_CLKSource_HCLK_Div8))YXW
..\USER\stm32f10x_conf.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERD: ..\USER\..\STM32F10x_FWLib\inc\stm32f10x_conf.hstm32f10x_adc.hstm32f10x_bkp.hstm32f10x_dac.hstm32f10x_dma.hstm32f10x_fsmc.hstm32f10x_gpio.hstm32f10x_pwr.hstm32f10x_rcc.hstm32f10x_rtc.hstm32f10x_spi.hstm32f10x_tim.hstm32f10x_usart.hmisc.h__STM32F10x_CONF_H !#&'*+    ,
./0 2Hassert_param(expr) ((void)0)]\[¤
..\USER\datatype.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERunsigned charunsigned shortunsigned intsigned charshortintPuint8 Puint16¦ Puint32¸ Pint8È     Pint16×
 Pint32à tPvuint86 )t¦Pvuint16H)t¸Pvuint32[)tÈPvint8n)t×Pvint16)tàPvint32)LB ..\USER\..\SYSTEM\sys\datatype.hSYS.h__DATATYPE_H a`_
..\SYSTEM\sys\SYS.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER\Q ..\SYSTEM\sys\..\USER\SYS.hstm32f10x.hdatatype.h__SYS_H     BITBAND(addr,bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2))
MEM_ADDR(addr) *((volatile unsigned long *)(addr))BIT_ADDR(addr,bitnum) MEM_ADDR(BITBAND(addr, bitnum)) GPIOA_ODR_Addr (GPIOA_BASE+12)GPIOB_ODR_Addr (GPIOB_BASE+12)GPIOC_ODR_Addr (GPIOC_BASE+12)GPIOD_ODR_Addr (GPIOD_BASE+12)GPIOE_ODR_Addr (GPIOE_BASE+12)GPIOF_ODR_Addr (GPIOF_BASE+12)GPIOG_ODR_Addr (GPIOG_BASE+12)GPIOA_IDR_Addr (GPIOA_BASE+8)GPIOB_IDR_Addr (GPIOB_BASE+8)GPIOC_IDR_Addr (GPIOC_BASE+8)GPIOD_IDR_Addr (GPIOD_BASE+8)GPIOE_IDR_Addr (GPIOE_BASE+8)GPIOF_IDR_Addr (GPIOF_BASE+8)GPIOG_IDR_Addr (GPIOG_BASE+8)PAout(n) BIT_ADDR(GPIOA_ODR_Addr,n) PAin(n) BIT_ADDR(GPIOA_IDR_Addr,n)"PBout(n) BIT_ADDR(GPIOB_ODR_Addr,n)#PBin(n) BIT_ADDR(GPIOB_IDR_Addr,n)%PCout(n) BIT_ADDR(GPIOC_ODR_Addr,n)&PCin(n) BIT_ADDR(GPIOC_IDR_Addr,n)(PDout(n) BIT_ADDR(GPIOD_ODR_Addr,n))PDin(n) BIT_ADDR(GPIOD_IDR_Addr,n)+PEout(n) BIT_ADDR(GPIOE_ODR_Addr,n),PEin(n) BIT_ADDR(GPIOE_IDR_Addr,n).PFout(n) BIT_ADDR(GPIOF_ODR_Addr,n)/PFin(n) BIT_ADDR(GPIOF_IDR_Addr,n)1PGout(n) BIT_ADDR(GPIOG_ODR_Addr,n)2PGin(n) BIT_ADDR(GPIOG_IDR_Addr,n)edc¸
..\v20\core\typedefdata.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERPu32UüPu16EýTI ..\v20\core\..\USER\typedefdata.hstm32f10x.hTYPEDEFDATA_H_ TRUE 1 FALSE 0ihg
..\HARDWARE\DELAY\delay.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERTI ..\HARDWARE\DELAY\..\SYSTEM\sys\delay.hsys.h__DELAY_H mlk 
..\v20\core\devicegpioinit.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERlc ..\v20\core\..\USER\..\SYSTEM\sys\devicegpioinit.hdatatype.hsys.h__DEVICEGPIOINIT_H 
AD421_DATA_PIN_NUM GPIO_Pin_10AD421_DATA_PIN_GROUP GPIOD AD421_CLK_PIN_NUM GPIO_Pin_11AD421_CLK_PIN_GROUP GPIODAD421_LATCH_PIN_NUM GPIO_Pin_12AD421_LATCH_PIN_GROUP GPIODERROR1_PIN_NUM GPIO_Pin_15ERROR1_PIN_GROUP GPIODFram_Flash_SPI_PIN_NUM GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5Fram_Flash_SPI_PIN_GROUP GPIOBFRAM_CS_NUM GPIO_Pin_7FRAM_CS_GROUP GPIOD!FRAM_CS_2_NUM GPIO_Pin_7"FRAM_CS_2_GROUP GPIOB$FRAM_PROTECT_NUM GPIO_Pin_6%FRAM_PROTECT_GROUP GPIOB)LCD_DATA_PIN_NUM GPIO_Pin_8*LCD_DATA_PIN_GROUP GPIOB,LCD_WR_CLK_PIN_NUM GPIO_Pin_9-LCD_WR_CLK_PIN_GROUP GPIOB/LCD_RD_CLK_PIN_NUM GPIO_Pin_00LCD_RD_CLK_PIN_GROUP GPIOE2LCD_CS_PIN_NUM GPIO_Pin_13LCD_CS_PIN_GROUP GPIOE6LCD_POWER_CON_NUM GPIO_Pin_37LCD_POWER_CON_GROUP GPIOEAKEY1_PIN_NUM GPIO_Pin_7BKEY1_PIN_GROUP GPIOCDKEY2_PIN_NUM GPIO_Pin_8EKEY2_PIN_GROUP GPIOCGKEY3_PIN_NUM GPIO_Pin_9HKEY3_PIN_GROUP GPIOCJKEY4_PIN_NUM GPIO_Pin_0KKEY4_PIN_GROUP GPIOBSGPRSRS232_TXD_EN_PIN_NUM GPIO_Pin_9TGPRSRS232_TXD_EN_PIN_GROUP GPIOAUGPRSRS232_RXD_EN_PIN_NUM GPIO_Pin_10VGPRSRS232_RXD_EN_PIN_GROUP GPIOAYDS1339_SDA_PIN_NUM GPIO_Pin_14ZDS1339_SDA_PIN_GROUP GPIOE[DS1339_CLK_PIN_NUM GPIO_Pin_13\DS1339_CLK_PIN_GROUP GPIOE^DS1339_INT_PIN_NUM GPIO_Pin_11_DS1339_INT_PIN_GROUP GPIOEbPWM1_PIN_NUM GPIO_Pin_13cPWM1_PIN_GROUP GPIODeLOWPLUSE_PIN_NUM GPIO_Pin_15fLOWPLUSE_PIN_GROUP GPIODoGPIO_GPRS_POWER_PIN_NUM GPIO_Pin_12pGPIO_GPRS_POWER_PIN_GROUP GPIOAuGPRS_POWER_ON PAout(12) = 1;vGPRS_POWER_OFF PAout(12) = 0;~FPGA_POWER_EN_PIN_NUM GPIO_Pin_15FPGA_POWER_EN_PIN_GROUP GPIOAFPGA_POWER_ON PAout(15) = 1;FPGA_POWER_OFF PAout(15) = 0;FPGA_1V8_POWER_EN_PIN_NUM GPIO_Pin_11FPGA_1V8_POWER_EN_PIN_GROUP GPIOEFPGA_1V8_POWER_ON PEout(11) = 1;FPGA_1V8_POWER_OFF PEout(11) = 0;FPGA_3V3_TEST_ON PDout(8) = 1;FPGA_3V3_TEST_OFF PDout(8) = 0;BT_POWER_EN_PIN_NUM GPIO_Pin_7BT_POWER_EN_PIN_GROUP GPIOEBT_TX_PIN_NUM GPIO_Pin_10BT_TX_PIN_GROUP GPIOBBT_RX_PIN_NUM GPIO_Pin_11BT_RX_PIN_GROUP GPIOBBT_RESET_PIN_NUM GPIO_Pin_8BT_RESET_PIN_GROUP GPIOEANALOG_PIN_NUM GPIO_Pin_0ANALOG_PIN_GROUP GPIOBTEM_PRE_POWER_PIN_NUM GPIO_Pin_5 TEM_PRE_POWER_PIN_GROUP GPIOC¢PRE_POWER_PIN_NUM GPIO_Pin_1£PRE_POWER_PIN_GROUP GPIOC¥TEM_POWER_PIN_NUM GPIO_Pin_5¦TEM_POWER_PIN_GROUP GPIOC¨TEST_GPIO_NUM GPIO_Pin_11©TEST_GPIO_GROUP GPIOE¬MAINBOARD_REMOVAL_GPIO_NUM GPIO_Pin_5MAINBOARD_REMOVAL_GPIO_GROUP GPIOE¯READ_MAINBOARD_REMOVAL_GPIO PEin(5)±COVER_OPEN_GPIO_NUM GPIO_Pin_12²COVER_OPEN_GPIO_GROUP GPIOE´READ_COVER_OPEN_GPIO PEin(12)¸VALVE_GPIO_NUM GPIO_Pin_8¹VALVE_GPIO_GROUP GPIOA½WD_GPIO_NUM GPIO_Pin_11¾WD_GPIO_GROUP GPIOAÈProbe_Drive_Power_ON PDout(9) = 1;ÉProbe_Drive_Power_OFF PDout(9) = 0;ÊLCD_Power_ON PEout(3) = 1;ËLCD_Power_OFF PEout(3) = 0;ÌBT_Power_ON PEout(7) = 1;ÍBT_Power_OFF PEout(7) = 0;ÎBT_Reset_ON PEout(8) = 1;ÏBT_Reset_OFF PEout(8) = 0;ÐADALOG_Power_ON PBout(0) = 1;ÑADALOG_Power_OFF PBout(0) = 0;ÒTEM_PRE_POWER_Power_ON PCout(5) = 1;ÓTEM_PRE_POWER_Power_OFF PCout(5) = 0;ÕPRE_POWER_Power_ON PCout(1) = 1;ÖPRE_POWER_Power_OFF PCout(1) = 0;×TEM_POWER_Power_ON PCout(5) = 1;ØTEM_POWER_Power_OFF PCout(5) = 0;ÚTest_GPIO_High PEout(11) = 1;ÛTest_GPIO_Low PEout(11) = 0;ÝWD_GPIO_High PAout(11) = 1;ÞWD_GPIO_Low PAout(11) = 0;àWD_USE 1äWD_GPIO_diff { GPIO_WriteBit(GPIOA, GPIO_Pin_11, (BitAction) !GPIO_ReadOutputDataBit(GPIOA, GPIO_Pin_11));}ìBAT_IN PCin(6)îVALVE_POWER_IN PAin(8)ðSKC_O PEout(6)ñWOUT1 PBout(14)òROUT2 PBout(15)óDOUT1 PAout(0)ôDOUT2 PAout(1)õDOUT3 PAout(2)öDOUT4 PAout(3)÷DOUT5 PAout(4)øDOUT6 PAout(5)ùDOUT7 PAout(6)úDOUT8 PAout(7)ÿDINF2 PBin(13)DINF1 PBin(12)DIN1 PAin(0)DIN2 PAin(1)DIN3 PAin(2)DIN4 PAin(3)DIN5 PAin(4)DIN6 PAin(5)DIN7 PAin(6)DIN8 PAin(7)qpo¤D:\keil\ARM\ARMCC\Bin\..\include\string.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]unsigned intPsize_t,LA D:\keil\ARM\ARMCC\Bin\..\include\string.h__string_h __ARMCLIB_VERSION 5060002_ARMABI __declspec(__nothrow)__STRING_DECLS __CLIBNS$__CLIBNS 7NULL8NULL 0uts
..\v20\core\mem_config.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERTH ..\v20\core\..\USER\mem_config.hstm32f10x.h_MEM_CONFIG_H  XINAO_LOG_EN 0BEIRAN_LOG_EN 0BATTERY_COLLECT_CYCLE 86400EQUIPMENT_START_ADDR 0EQUIPMENT_START_LENGTH 200 BASIC_INFORMATION_OF_EQUIPMENT_ADDR EQUIPMENT_START_ADDR + EQUIPMENT_START_LENGTH!BASIC_INFORMATION_OF_EQUIPMENT_LENGTH (u32)400#MAIN_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_ADDR BASIC_INFORMATION_OF_EQUIPMENT_ADDR + BASIC_INFORMATION_OF_EQUIPMENT_LENGTH$MAIN_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_LENGTH 40&LCD_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_ADDR MAIN_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_ADDR + MAIN_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_LENGTH'LCD_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_LENGTH 40)WIRELESS_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_ADDR LCD_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_ADDR + LCD_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_LENGTH*WIRELESS_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_LENGTH 40,PRE_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_ADDR WIRELESS_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_ADDR + WIRELESS_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_LENGTH-PRE_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_LENGTH 50/TEM_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_ADDR PRE_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_ADDR + PRE_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_LENGTH0TEM_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_LENGTH 502SONIC_SENSOR_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_ADDR TEM_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_ADDR + TEM_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_LENGTH3SONIC_SENSOR_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_LENGTH 2005REAL_TIME_DATA_ADDR SONIC_SENSOR_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_ADDR + SONIC_SENSOR_EQUIPM_HARDWARE_SOFTWARE_INFO_PARAM_LENGTH6REAL_TIME_DATA_LENGTH 25008STATISTICAL_DATA_ADDR REAL_TIME_DATA_ADDR + REAL_TIME_DATA_LENGTH9STATISTICAL_DATA_LENGTH 1300;SONIC_SENSOR_CALIBRATION_PARAM_ADDR STATISTICAL_DATA_ADDR + STATISTICAL_DATA_LENGTH<SONIC_SENSOR_CALIBRATION_PARAM_LENGTH 250>FLOW_CORRECTION_PARAM_ADDR SONIC_SENSOR_CALIBRATION_PARAM_ADDR + SONIC_SENSOR_CALIBRATION_PARAM_LENGTH?FLOW_CORRECTION_PARAM_LENGTH 2500AFLOW_CONFIG_PARAM_ADDR FLOW_CORRECTION_PARAM_ADDR + FLOW_CORRECTION_PARAM_LENGTHBFLOW_CONFIG_PARAM_LENGTH 200DPRE_CONFIG_PARAM_ADDR FLOW_CONFIG_PARAM_ADDR + FLOW_CONFIG_PARAM_LENGTHEPRE_CONFIG_PARAM_LENGTH 160GTEM_CONFIG_PARAM_ADDR PRE_CONFIG_PARAM_ADDR + PRE_CONFIG_PARAM_LENGTHHTEM_CONFIG_PARAM_LENGTH 200JLOW_PULSE_CONFIG_PARAM_ADDR TEM_CONFIG_PARAM_ADDR + TEM_CONFIG_PARAM_LENGTHKLOW_PULSE_CONFIG_PARAM_LENGTH 30MCURRENT_LOOP_CONFIG_PARAM_ADDR LOW_PULSE_CONFIG_PARAM_ADDR + LOW_PULSE_CONFIG_PARAM_LENGTHNCURRENT_LOOP_CONFIG_PARAM_LENGTH 50PRS485_CONFIG_PARAM_ADDR CURRENT_LOOP_CONFIG_PARAM_ADDR + CURRENT_LOOP_CONFIG_PARAM_LENGTHQRS485_CONFIG_PARAM_LENGTH 30SAPP_PC_PASSWORD_ADDR RS485_CONFIG_PARAM_ADDR + RS485_CONFIG_PARAM_LENGTHTAPP_PC_PASSWORD_LENGTH 30VMEASURE_FREEZ_PARAM_ADDR APP_PC_PASSWORD_ADDR + APP_PC_PASSWORD_LENGTHWMEASURE_FREEZ_PARAM_LENGTH 10YWIRELESS_COM_PARAM_ADDR MEASURE_FREEZ_PARAM_ADDR + MEASURE_FREEZ_PARAM_LENGTHZWIRELESS_COM_PARAM_LENGTH 1000\BILLING_VALVE_PARAM_ADDR WIRELESS_COM_PARAM_ADDR + WIRELESS_COM_PARAM_LENGTH]BILLING_VALVE_PARAM_LENGTH 1000_BATTERY_PARAM_ADDR BILLING_VALVE_PARAM_ADDR + BILLING_VALVE_PARAM_LENGTH`BATTERY_PARAM_LENGTH 10bSONIC_SENSOR_ABNORMAL_PARAM_ADDR BATTERY_PARAM_ADDR + BATTERY_PARAM_LENGTHcSONIC_SENSOR_ABNORMAL_PARAM_LENGTH 20eHIGH_PULSR_CONFIG_PARAM_ADDR SONIC_SENSOR_ABNORMAL_PARAM_ADDR + SONIC_SENSOR_ABNORMAL_PARAM_LENGTHfHIGH_PULSR_CONFIG_PARAM_LENGTH 20hRESERVE_CONFIG_PARAM_ADDR HIGH_PULSR_CONFIG_PARAM_ADDR + HIGH_PULSR_CONFIG_PARAM_LENGTHiRESERVE_CONFIG_PARAM_LENGTH 2000kSYSTEM_STATUS_WORD_ADDR RESERVE_CONFIG_PARAM_ADDR + RESERVE_CONFIG_PARAM_LENGTHlSYSTEM_STATUS_WORD_LENGTH 12nSYSTEM_FUNCTION_CONTROL_WORD_ADDR SYSTEM_STATUS_WORD_ADDR + SYSTEM_STATUS_WORD_LENGTHoSYSTEM_FUNCTION_CONTROL_WORD_LENGTH 10qSYSTEM_ALARM_WORD_ADDR SYSTEM_FUNCTION_CONTROL_WORD_ADDR + SYSTEM_FUNCTION_CONTROL_WORD_LENGTHrSYSTEM_ALARM_WORD_LENGTH 14tSYSTEM_ALARM_CONTROL_WORD_ADDR SYSTEM_ALARM_WORD_ADDR + SYSTEM_ALARM_WORD_LENGTHuSYSTEM_ALARM_CONTROL_WORD_LENGTH 14wSYSTEM_SEND_UP_WORD_ADDR SYSTEM_ALARM_CONTROL_WORD_ADDR + SYSTEM_ALARM_CONTROL_WORD_LENGTHxSYSTEM_SEND_UP_WORD_LENGTH 14zSYSTEM_SEND_UP_CONTROL_WORD_ADDR SYSTEM_SEND_UP_WORD_ADDR + SYSTEM_SEND_UP_WORD_LENGTH{SYSTEM_SEND_UP_CONTROL_WORD_LENGTH 14INTERVAL_FREEZ_ADDR SYSTEM_SEND_UP_CONTROL_WORD_ADDR + SYSTEM_SEND_UP_CONTROL_WORD_LENGTHINTERVAL_FREEZ_LENGTH (u32)39000HOURLY_FREEZ_ADDR INTERVAL_FREEZ_ADDR + INTERVAL_FREEZ_LENGTHHOURLY_FREEZ_LENGTH (u32)38800DAYLY_FREEZ_ADDR HOURLY_FREEZ_ADDR + HOURLY_FREEZ_LENGTHDAYLY_FREEZ_LENGTH (u32)19100MONTHLY_FREEZ_ADDR DAYLY_FREEZ_ADDR + DAYLY_FREEZ_LENGTHMONTHLY_FREEZ_LENGTH (u32)3300SEND_UP_FREEZ_ADDR MONTHLY_FREEZ_ADDR + MONTHLY_FREEZ_LENGTHSEND_UP_FREEZ_LENGTH (u32)14700SYSTEM_ALARM_LOG_ADDR SEND_UP_FREEZ_ADDR + SEND_UP_FREEZ_LENGTHSYSTEM_ALARM_LOG_LENGTH (u32)46000FLOW_MEASURE_ALARM_LOG_ADDR SYSTEM_ALARM_LOG_ADDR + SYSTEM_ALARM_LOG_LENGTHFLOW_MEASURE_ALARM_LOG_LENGTH (u32)32000CUMULAT_MODIFY_RECORD_ADDR FLOW_MEASURE_ALARM_LOG_ADDR + FLOW_MEASURE_ALARM_LOG_LENGTHCUMULAT_MODIFY_RECORD_LENGTH 1500FLOW_CORRECT_PARAM_MODIFY_RECORD_ADDR CUMULAT_MODIFY_RECORD_ADDR + CUMULAT_MODIFY_RECORD_LENGTHFLOW_CORRECT_PARAM_MODIFY_RECORD_LENGTH 7220PRE_CONFIG_PARAM_MODIFY_RECORD_ADDR FLOW_CORRECT_PARAM_MODIFY_RECORD_ADDR + FLOW_CORRECT_PARAM_MODIFY_RECORD_LENGTHPRE_CONFIG_PARAM_MODIFY_RECORD_LENGTH 1640TEM_CONFIG_PARAM_MODIFY_RECORD_ADDR PRE_CONFIG_PARAM_MODIFY_RECORD_ADDR + PRE_CONFIG_PARAM_MODIFY_RECORD_LENGTHTEM_CONFIG_PARAM_MODIFY_RECORD_LENGTH 1400 FLOW_CONFIG_PARAM_MODIFY_RECORD_ADDR TEM_CONFIG_PARAM_MODIFY_RECORD_ADDR + TEM_CONFIG_PARAM_MODIFY_RECORD_LENGTH¡FLOW_CONFIG_PARAM_MODIFY_RECORD_LENGTH 1000£LOW_PULSE_CONFIG_PARAM_MODIFY_RECORD_ADDR FLOW_CONFIG_PARAM_MODIFY_RECORD_ADDR + FLOW_CONFIG_PARAM_MODIFY_RECORD_LENGTH¤LOW_PULSE_CONFIG_PARAM_MODIFY_RECORD_LENGTH 480¦CURRENT_LOOP_CONFIG_PARAM_MODIFY_RECORD_ADDR LOW_PULSE_CONFIG_PARAM_MODIFY_RECORD_ADDR + LOW_PULSE_CONFIG_PARAM_MODIFY_RECORD_LENGTH§CURRENT_LOOP_CONFIG_PARAM_MODIFY_RECORD_LENGTH 560©SONIC_SENSOR_CALIBRATION_PARAM_MODIFY_RECORD_ADDR CURRENT_LOOP_CONFIG_PARAM_MODIFY_RECORD_ADDR + CURRENT_LOOP_CONFIG_PARAM_MODIFY_RECORD_LENGTHªSONIC_SENSOR_CALIBRATION_PARAM_MODIFY_RECORD_LENGTH 2400¬SONIC_SENSOR_ABNORMAL_PARAM_MODIFY_RECORD_ADDR SONIC_SENSOR_CALIBRATION_PARAM_MODIFY_RECORD_ADDR + SONIC_SENSOR_CALIBRATION_PARAM_MODIFY_RECORD_LENGTHSONIC_SENSOR_ABNORMAL_PARAM_MODIFY_RECORD_LENGTH 660¯SYSTEM_FUNCTION_CONTROL_WORD_MODIFY_RECORD_ADDR SONIC_SENSOR_ABNORMAL_PARAM_MODIFY_RECORD_ADDR + SONIC_SENSOR_ABNORMAL_PARAM_MODIFY_RECORD_LENGTH°SYSTEM_FUNCTION_CONTROL_WORD_MODIFY_RECORD_LENGTH 2920²VALVE_ACTION_RECORD_ADDR SYSTEM_FUNCTION_CONTROL_WORD_MODIFY_RECORD_ADDR + SYSTEM_FUNCTION_CONTROL_WORD_MODIFY_RECORD_LENGTH³VALVE_ACTION_RECORD_LENGTH 1500ÀBASIC_INFORMATION_OF_EQUIPMENT_A_ADDR BASIC_INFORMATION_OF_EQUIPMENT_ADDRÁBASIC_INFORMATION_OF_EQUIPMENT_B_ADDR BASIC_INFORMATION_OF_EQUIPMENT_A_ADDR + 130ÂBASIC_INFORMATION_OF_EQUIPMENT_C_ADDR BASIC_INFORMATION_OF_EQUIPMENT_B_ADDR + 130ÇREAL_TIME_DATA_ONE_AREA_ALL_LENGTH 474ÈREAL_TIME_DATA_ONE_AREA_DATA_LENGTH 450ÊREAL_TIME_DATA_1_AREA_ADDR REAL_TIME_DATA_ADDRËREAL_TIME_DATA_2_AREA_ADDR REAL_TIME_DATA_1_AREA_ADDR + REAL_TIME_DATA_ONE_AREA_ALL_LENGTHÌREAL_TIME_DATA_3_AREA_ADDR REAL_TIME_DATA_2_AREA_ADDR + REAL_TIME_DATA_ONE_AREA_ALL_LENGTHÍREAL_TIME_DATA_4_AREA_ADDR REAL_TIME_DATA_3_AREA_ADDR + REAL_TIME_DATA_ONE_AREA_ALL_LENGTHÎREAL_TIME_DATA_5_AREA_ADDR REAL_TIME_DATA_4_AREA_ADDR + REAL_TIME_DATA_ONE_AREA_ALL_LENGTHÏREAL_TIME_DATA_OTHER_AREA_ADDR REAL_TIME_DATA_5_AREA_ADDR + REAL_TIME_DATA_ONE_AREA_ALL_LENGTHÑREAL_TIME_DATA_1_AREA_A_ADDR REAL_TIME_DATA_1_AREA_ADDRÒREAL_TIME_DATA_1_AREA_B_ADDR REAL_TIME_DATA_1_AREA_ADDR + 150ÓREAL_TIME_DATA_1_AREA_C_ADDR REAL_TIME_DATA_1_AREA_ADDR + 300ÔREAL_TIME_DATA_1_AREA_TIMES_ADDR REAL_TIME_DATA_1_AREA_ADDR + REAL_TIME_DATA_ONE_AREA_DATA_LENGTHÖREAL_TIME_DATA_2_AREA_A_ADDR REAL_TIME_DATA_2_AREA_ADDR×REAL_TIME_DATA_2_AREA_B_ADDR REAL_TIME_DATA_2_AREA_ADDR + 150ØREAL_TIME_DATA_2_AREA_C_ADDR REAL_TIME_DATA_2_AREA_ADDR + 300ÙREAL_TIME_DATA_2_AREA_TIMES_ADDR REAL_TIME_DATA_2_AREA_ADDR + REAL_TIME_DATA_ONE_AREA_DATA_LENGTHÛREAL_TIME_DATA_3_AREA_A_ADDR REAL_TIME_DATA_3_AREA_ADDRÜREAL_TIME_DATA_3_AREA_B_ADDR REAL_TIME_DATA_3_AREA_ADDR + 150ÝREAL_TIME_DATA_3_AREA_C_ADDR REAL_TIME_DATA_3_AREA_ADDR + 300ÞREAL_TIME_DATA_3_AREA_TIMES_ADDR REAL_TIME_DATA_3_AREA_ADDR + REAL_TIME_DATA_ONE_AREA_DATA_LENGTHàREAL_TIME_DATA_4_AREA_A_ADDR REAL_TIME_DATA_4_AREA_ADDRáREAL_TIME_DATA_4_AREA_B_ADDR REAL_TIME_DATA_4_AREA_ADDR + 150âREAL_TIME_DATA_4_AREA_C_ADDR REAL_TIME_DATA_4_AREA_ADDR + 300ãREAL_TIME_DATA_4_AREA_TIMES_ADDR REAL_TIME_DATA_4_AREA_ADDR + REAL_TIME_DATA_ONE_AREA_DATA_LENGTHåREAL_TIME_DATA_5_AREA_A_ADDR REAL_TIME_DATA_5_AREA_ADDRæREAL_TIME_DATA_5_AREA_B_ADDR REAL_TIME_DATA_5_AREA_ADDR + 150çREAL_TIME_DATA_5_AREA_C_ADDR REAL_TIME_DATA_5_AREA_ADDR + 300èREAL_TIME_DATA_5_AREA_TIMES_ADDR REAL_TIME_DATA_5_AREA_ADDR + REAL_TIME_DATA_ONE_AREA_DATA_LENGTHëREAL_TIME_DATA_A_ADDR REAL_TIME_DATA_1_AREA_ADDRìREAL_TIME_DATA_B_ADDR REAL_TIME_DATA_1_AREA_ADDR + 150íREAL_TIME_DATA_C_ADDR REAL_TIME_DATA_1_AREA_ADDR + 300ïSTANDARD_ACCUMULAT_A_ADDR REAL_TIME_DATA_A_ADDRðWORK_ACCUMULAT_A_ADDR STANDARD_ACCUMULAT_A_ADDR + 8ñSTANDARD_REVERSE_ACCUMULAT_A_ADDR WORK_ACCUMULAT_A_ADDR + 8òWORK_REVERSE_ACCUMULAT_A_ADDR STANDARD_REVERSE_ACCUMULAT_A_ADDR + 8óSTANDARD_CALIBRATION_ACCUMULAT_A_ADDR WORK_REVERSE_ACCUMULAT_A_ADDR + 8ôWORK_CALIBRATION_ACCUMULAT_A_ADDR STANDARD_CALIBRATION_ACCUMULAT_A_ADDR + 8õSTANDARD_ERR_ACCUMULAT_A_ADDR WORK_CALIBRATION_ACCUMULAT_A_ADDR + 8öWORK_ERR_ACCUMULAT_A_ADDR STANDARD_ERR_ACCUMULAT_A_ADDR + 8÷STANDARD_REVERSE_ERR_ACCUMULAT_A_ADDR WORK_ERR_ACCUMULAT_A_ADDR + 8øWORK_REVERSE_ERR_ACCUMULAT_A_ADDR STANDARD_REVERSE_ERR_ACCUMULAT_A_ADDR + 8ùRESIDUAL_AMOUNT_A_ADDR WORK_REVERSE_ERR_ACCUMULAT_A_ADDR + 8úUNIT_PRICE_A_ADDR RESIDUAL_AMOUNT_A_ADDR + 8ûWORK_AVERAGE_FLOW_A_ADDR UNIT_PRICE_A_ADDR + 4üAVERAGE_MEDIUM_TEM_A_ADDR WORK_AVERAGE_FLOW_A_ADDR + 4ýAVERAGE_MEDIUM_PRE_A_ADDR AVERAGE_MEDIUM_TEM_A_ADDR + 4ÿSTANDARD_ACCUMULAT_B_ADDR REAL_TIME_DATA_B_ADDRWORK_ACCUMULAT_B_ADDR STANDARD_ACCUMULAT_B_ADDR + 8STANDARD_REVERSE_ACCUMULAT_B_ADDR WORK_ACCUMULAT_B_ADDR + 8WORK_REVERSE_ACCUMULAT_B_ADDR STANDARD_REVERSE_ACCUMULAT_B_ADDR + 8STANDARD_CALIBRATION_ACCUMULAT_B_ADDR WORK_REVERSE_ACCUMULAT_B_ADDR + 8WORK_CALIBRATION_ACCUMULAT_B_ADDR STANDARD_CALIBRATION_ACCUMULAT_B_ADDR + 8STANDARD_ERR_ACCUMULAT_B_ADDR WORK_CALIBRATION_ACCUMULAT_B_ADDR + 8WORK_ERR_ACCUMULAT_B_ADDR STANDARD_ERR_ACCUMULAT_B_ADDR + 8STANDARD_REVERSE_ERR_ACCUMULAT_B_ADDR WORK_ERR_ACCUMULAT_B_ADDR + 8WORK_REVERSE_ERR_ACCUMULAT_B_ADDR STANDARD_REVERSE_ERR_ACCUMULAT_B_ADDR + 8RESIDUAL_AMOUNT_B_ADDR WORK_REVERSE_ERR_ACCUMULAT_B_ADDR + 8UNIT_PRICE_B_ADDR RESIDUAL_AMOUNT_B_ADDR + 8WORK_AVERAGE_FLOW_B_ADDR UNIT_PRICE_B_ADDR + 4AVERAGE_MEDIUM_TEM_B_ADDR WORK_AVERAGE_FLOW_B_ADDR + 4AVERAGE_MEDIUM_PRE_B_ADDR AVERAGE_MEDIUM_TEM_B_ADDR + 4STANDARD_ACCUMULAT_C_ADDR REAL_TIME_DATA_C_ADDRWORK_ACCUMULAT_C_ADDR STANDARD_ACCUMULAT_C_ADDR + 8STANDARD_REVERSE_ACCUMULAT_C_ADDR WORK_ACCUMULAT_C_ADDR + 8WORK_REVERSE_ACCUMULAT_C_ADDR STANDARD_REVERSE_ACCUMULAT_C_ADDR + 8STANDARD_CALIBRATION_ACCUMULAT_C_ADDR WORK_REVERSE_ACCUMULAT_C_ADDR + 8WORK_CALIBRATION_ACCUMULAT_C_ADDR STANDARD_CALIBRATION_ACCUMULAT_C_ADDR + 8STANDARD_ERR_ACCUMULAT_C_ADDR WORK_CALIBRATION_ACCUMULAT_C_ADDR + 8WORK_ERR_ACCUMULAT_C_ADDR STANDARD_ERR_ACCUMULAT_C_ADDR + 8STANDARD_REVERSE_ERR_ACCUMULAT_C_ADDR WORK_ERR_ACCUMULAT_C_ADDR + 8WORK_REVERSE_ERR_ACCUMULAT_C_ADDR STANDARD_REVERSE_ERR_ACCUMULAT_C_ADDR + 8RESIDUAL_AMOUNT_C_ADDR WORK_REVERSE_ERR_ACCUMULAT_C_ADDR + 8UNIT_PRICE_C_ADDR RESIDUAL_AMOUNT_C_ADDR + 8WORK_AVERAGE_FLOW_C_ADDR UNIT_PRICE_C_ADDR + 4AVERAGE_MEDIUM_TEM_C_ADDR WORK_AVERAGE_FLOW_C_ADDR + 4AVERAGE_MEDIUM_PRE_C_ADDR AVERAGE_MEDIUM_TEM_C_ADDR + 4 REAL_TIME_DATA_AREA_NUMBER_A_ADDR REAL_TIME_DATA_OTHER_AREA_ADDR¡REAL_TIME_DATA_AREA_NUMBER_B_ADDR REAL_TIME_DATA_AREA_NUMBER_A_ADDR + 1¢REAL_TIME_DATA_AREA_NUMBER_C_ADDR REAL_TIME_DATA_AREA_NUMBER_B_ADDR + 1§STATISTICAL_DATA_A_ADDR STATISTICAL_DATA_ADDRSONIC_CALIBRATION_PARAM_A_ADDR SONIC_SENSOR_CALIBRATION_PARAM_ADDR®THRESHOLD_SET_PARAM_A_ADDR SONIC_CALIBRATION_PARAM_A_ADDR + 44¯SONIC_CALIBRATION_PARAM_B_ADDR SONIC_CALIBRATION_PARAM_A_ADDR + 70°THRESHOLD_SET_PARAM_B_ADDR SONIC_CALIBRATION_PARAM_B_ADDR + 44±SONIC_CALIBRATION_PARAM_C_ADDR SONIC_CALIBRATION_PARAM_B_ADDR + 70²THRESHOLD_SET_PARAM_C_ADDR SONIC_CALIBRATION_PARAM_C_ADDR + 44·FLOW_CORRECTION_PARAM_A_ADDR FLOW_CORRECTION_PARAM_ADDR¸FLOW_CORRECTION_PARAM_B_ADDR FLOW_CORRECTION_PARAM_A_ADDR + 800¹FLOW_CORRECTION_PARAM_C_ADDR FLOW_CORRECTION_PARAM_B_ADDR + 800»POSITIVE_FLOW_POINT_CORRECT_A_ADDR FLOW_CORRECTION_PARAM_A_ADDR¼POSITIVE_REAL_FLOW_POINT_CORRECT_A_ADDR POSITIVE_FLOW_POINT_CORRECT_A_ADDR + 120½POSITIVE_FLOW_POINT_SECOND_A_ADDR POSITIVE_REAL_FLOW_POINT_CORRECT_A_ADDR + 120¾POSITIVE_REAL_FLOW_POINT_SECOND_A_ADDR POSITIVE_FLOW_POINT_SECOND_A_ADDR + 40¿POSITIVE_FLOW_POINT_OTHER_A_ADDR POSITIVE_REAL_FLOW_POINT_SECOND_A_ADDR + 40ÀREVERSE_FLOW_POINT_CORRECT_A_ADDR POSITIVE_FLOW_POINT_OTHER_A_ADDR + 16ÁREVERSE_REAL_FLOW_POINT_CORRECT_A_ADDR REVERSE_FLOW_POINT_CORRECT_A_ADDR + 120ÂREVERSE_FLOW_POINT_SECOND_A_ADDR REVERSE_REAL_FLOW_POINT_CORRECT_A_ADDR + 120ÃREVERSE_REAL_FLOW_POINT_SECOND_A_ADDR REVERSE_FLOW_POINT_SECOND_A_ADDR + 40ÄREVERSE_FLOW_POINT_OTHER_A_ADDR REVERSE_REAL_FLOW_POINT_SECOND_A_ADDR + 40ÆPOSITIVE_FLOW_POINT_CORRECT_B_ADDR FLOW_CORRECTION_PARAM_B_ADDRÇPOSITIVE_REAL_FLOW_POINT_CORRECT_B_ADDR POSITIVE_FLOW_POINT_CORRECT_B_ADDR + 120ÈPOSITIVE_FLOW_POINT_SECOND_B_ADDR POSITIVE_REAL_FLOW_POINT_CORRECT_B_ADDR + 120ÉPOSITIVE_REAL_FLOW_POINT_SECOND_B_ADDR POSITIVE_FLOW_POINT_SECOND_B_ADDR + 40ÊPOSITIVE_FLOW_POINT_OTHER_B_ADDR POSITIVE_REAL_FLOW_POINT_SECOND_B_ADDR + 40ËREVERSE_FLOW_POINT_CORRECT_B_ADDR POSITIVE_FLOW_POINT_OTHER_B_ADDR + 16ÌREVERSE_REAL_FLOW_POINT_CORRECT_B_ADDR REVERSE_FLOW_POINT_CORRECT_B_ADDR + 120ÍREVERSE_FLOW_POINT_SECOND_B_ADDR REVERSE_REAL_FLOW_POINT_CORRECT_B_ADDR + 120ÎREVERSE_REAL_FLOW_POINT_SECOND_B_ADDR REVERSE_FLOW_POINT_SECOND_B_ADDR + 40ÏREVERSE_FLOW_POINT_OTHER_B_ADDR REVERSE_REAL_FLOW_POINT_SECOND_B_ADDR + 40ÑPOSITIVE_FLOW_POINT_CORRECT_C_ADDR FLOW_CORRECTION_PARAM_C_ADDRÒPOSITIVE_REAL_FLOW_POINT_CORRECT_C_ADDR POSITIVE_FLOW_POINT_CORRECT_C_ADDR + 120ÓPOSITIVE_FLOW_POINT_SECOND_C_ADDR POSITIVE_REAL_FLOW_POINT_CORRECT_C_ADDR + 120ÔPOSITIVE_REAL_FLOW_POINT_SECOND_C_ADDR POSITIVE_FLOW_POINT_SECOND_C_ADDR + 40ÕPOSITIVE_FLOW_POINT_OTHER_C_ADDR POSITIVE_REAL_FLOW_POINT_SECOND_C_ADDR + 40ÖREVERSE_FLOW_POINT_CORRECT_C_ADDR POSITIVE_FLOW_POINT_OTHER_C_ADDR + 16×REVERSE_REAL_FLOW_POINT_CORRECT_C_ADDR REVERSE_FLOW_POINT_CORRECT_C_ADDR + 120ØREVERSE_FLOW_POINT_SECOND_C_ADDR REVERSE_REAL_FLOW_POINT_CORRECT_C_ADDR + 120ÙREVERSE_REAL_FLOW_POINT_SECOND_C_ADDR REVERSE_FLOW_POINT_SECOND_C_ADDR + 40ÚREVERSE_FLOW_POINT_OTHER_C_ADDR REVERSE_REAL_FLOW_POINT_SECOND_C_ADDR + 40ÞAPP_GENERAL_USER_PASSWORD_ADDR APP_PC_PASSWORD_ADDRßAPP_ADVANCED_USER_PASSWORD_ADDR APP_PC_PASSWORD_ADDR +2àAPP_MANAGE_USER_PASSWORD_ADDR APP_PC_PASSWORD_ADDR + 4áPC_GENERAL_USER_PASSWORD_ADDR APP_PC_PASSWORD_ADDR + 6âPC_ADVANCED_USER_PASSWORD_ADDR APP_PC_PASSWORD_ADDR + 8ãPC_MANAGE_USER_PASSWORD_ADDR APP_PC_PASSWORD_ADDR + 10çWIRELESS_COM_BISIC_PARAM_ADDR WIRELESS_COM_PARAM_ADDRèWIRELESS_COM_APN_ADDR WIRELESS_COM_BISIC_PARAM_ADDR + 300íVALVE_PARA_START_ADDR BILLING_VALVE_PARAM_ADDRîVALVE_TYPE_ADDR VALVE_PARA_START_ADDR + 20ïVALVE_STATE_ADDR VALVE_TYPE_ADDR + 30ðOPEN_VALVE_AUTHORIZE_FLAG_ADDR VALVE_STATE_ADDR + 10ñOPEN_VALVE_AUTHORIZE_TIME_CNT_ADDRA OPEN_VALVE_AUTHORIZE_FLAG_ADDR +1òVALVE_OPEN_TIMES_ADDR OPEN_VALVE_AUTHORIZE_TIME_CNT_ADDRA + 4óVALVE_CLOSE_TIMES_ADDR VALVE_OPEN_TIMES_ADDR + 2ôVALVE_CLOSEID_ADDR VALVE_CLOSE_TIMES_ADDR + 2õVALVE_CLOSE_FORCE_FLAG_ADDR VALVE_CLOSEID_ADDR +2öVALVE_CLOSE_TYPE_ADDR VALVE_CLOSE_FORCE_FLAG_ADDR +1÷VALVE_ACTION_CLASS_ADDR VALVE_CLOSE_TYPE_ADDR + 1ùBALANCE_INSUF_ALARM1_ADDR VALVE_ACTION_CLASS_ADDR +2úBALANCE_INSUF_VALVE_FLAG1_ADDR BALANCE_INSUF_ALARM1_ADDR + 4ûBALANCE_INSUF_ALARM2_ADDR BALANCE_INSUF_VALVE_FLAG1_ADDR + 1üBALANCE_INSUF_VALVE_FLAG2_ADDR BALANCE_INSUF_ALARM2_ADDR + 4ýBALANCE_INSUF_ALARM3_ADDR BALANCE_INSUF_VALVE_FLAG2_ADDR + 1þBALANCE_INSUF_VALVE_FLAG3_ADDR BALANCE_INSUF_ALARM3_ADDR + 4ÿBALANCE_INSUF_ALARM4_ADDR BALANCE_INSUF_VALVE_FLAG3_ADDR + 1BALANCE_INSUF_VALVE_FLAG4_ADDR BALANCE_INSUF_ALARM4_ADDR + 4BALANCE_INSUF_ALARM5_ADDR BALANCE_INSUF_VALVE_FLAG4_ADDR + 1BALANCE_INSUF_VALVE_FLAG5_ADDR BALANCE_INSUF_ALARM5_ADDR + 4BALANCE_INSUF_SET_FLAG BALANCE_INSUF_VALVE_FLAG5_ADDR +1NO_UP_CLOSE_DAY_ADDR BALANCE_INSUF_SET_FLAG +1NO_UP_CLOSE_DAY_COUNT_ADDR NO_UP_CLOSE_DAY_ADDR +1NO_UP_CLOSE_VALVE_TYPE_ADDR NO_UP_CLOSE_DAY_COUNT_ADDR + 1NO_GAS_CLOSE_DAY_ADDR NO_UP_CLOSE_VALVE_TYPE_ADDR + 1NO_GAS_CLOSE_DAY_COUNT_ADDR NO_GAS_CLOSE_DAY_ADDR + 1NO_GAS_CLOSE_VALVE_TYPE_ADDR NO_GAS_CLOSE_DAY_COUNT_ADDR + 1CUMULANT_CLOSE_TYPE_ADDR NO_GAS_CLOSE_VALVE_TYPE_ADDR + 1CUMULANT_CLOSE_ADDR CUMULANT_CLOSE_TYPE_ADDR + 1VALVE_CTRL_WORDS_ADDR CUMULANT_CLOSE_ADDR + 4BAT1_TIME_SAVE_ADDR RESERVE_CONFIG_PARAM_ADDR + 10BAT2_TIME_SAVE_ADDR BAT1_TIME_SAVE_ADDR +4SYSTEM_CMD_MAN_SET_FLOW_POINT_1 BAT2_TIME_SAVE_ADDR + 4SYSTEM_CMD_MAN_SET_FLOW_POINT_2 SYSTEM_CMD_MAN_SET_FLOW_POINT_1 + 4SYSTEM_CMD_MAN_SET_FLOW_POINT_3 SYSTEM_CMD_MAN_SET_FLOW_POINT_2 + 4SYSTEM_CMD_MAN_SET_FLOW_PARA_1 SYSTEM_CMD_MAN_SET_FLOW_POINT_3 + 4SYSTEM_CMD_MAN_SET_FLOW_PARA_2 SYSTEM_CMD_MAN_SET_FLOW_PARA_1 + 4SYSTEM_CMD_MAN_SET_FLOW_PARA_3 SYSTEM_CMD_MAN_SET_FLOW_PARA_2 + 4yxwzÀC
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´)#statistical_data_t current_hour_work_cumulative_flow #current_hour_standard_cumulative_flow #last_hour_work_cumulative_flow #last_hour_standard_cumulative_flow #current_day_work_cumulative_flow # current_day_standard_cumulative_flow #(last_day_work_cumulative_flow #0last_day_standard_cumulative_flow #8current_month_work_cumulative_flow #@current_month_standard_cumulative_flow #Hlast_month_work_cumulative_flow #Plast_month_standard_cumulative_flow #Xcurrent_hour_reverse_work_cumulative_flow #`current_hour_reverse_standard_cumulative_flow #hlast_hour_reverse_work_cumulative_flow #plast_hour_reverse_standard_cumulative_flow #xcurrent_day_reverse_work_cumulative_flow #current_day_reverse_standard_cumulative_flow #last_day_reverse_work_cumulative_flow #last_day_reverse_standard_cumulative_flow #current_month_reverse_work_cumulative_flow # current_month_reverse_standard_cumulative_flow #¨last_month_reverse_work_cumulative_flow #°last_month_reverse_standard_cumulative_flow #¸current_hour_work_cumulative_flow_Base #Àcurrent_hour_standard_cumulative_flow_Base #Ècurrent_day_work_cumulative_flow_Base #Ðcurrent_day_standard_cumulative_flow_Base #Øcurrent_month_work_cumulative_flow_Base #àcurrent_month_standard_cumulative_flow_Base #ècurrent_hour_reverse_work_cumulative_flow_Base #ðcurrent_hour_reverse_standard_cumulative_flow_Base #øcurrent_day_reverse_work_cumulative_flow_Base #current_day_reverse_standard_cumulative_flow_Base #current_month_reverse_work_cumulative_flow_Base #current_month_reverse_standard_cumulative_flow_Base #PSTATISTICAL_DATA_T 
)ª&device_size_inf)device_size_mid_distanceª#device_size_up_distanceª#device_size_down_distanceª#device_size_mid_reimbursed_timeaª#device_size_mid_reimbursed_timebª#device_size_up_reimbursed_timeaª#device_size_up_reimbursed_timebª#device_size_down_reimbursed_timeaª#device_size_down_reimbursed_timebª# set_sound_valueª#$set_modeÍ#(PDEVICE_SIZE_INF_T)(ultrasonic_sensor_trige_level_infmid_sound_levela1¿#mid_sound_levelb1¿#up_sound_levela1¿#up_sound_levelb1¿#down_sound_levela1¿#down_sound_levelb1¿#
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t¼qthree_groups_data_read_flag_g=qdevice_real_time_set_g99qequipment_basic_inf_gâqmain_equipment_hardware_software_inf_gøqlcd_equipment_hardware_software_inf_gqwireless_equipment_hardware_software_inf_gBqpre_equipment_hardware_software_inf_gmqtem_equipment_hardware_software_inf_gqsonic_sensor_equipment_hardware_software_inf_gåqstatistical_data_gqdevice_size_inf_g*qultrasonic_sensor_trige_level_g qflow_correct_set_g¸qflow_limit_gqflow_device_modbus_gqdevice_password_gJqmeasure_freez_para_gÒqnetwork_com_para_g!qnetwork_com_apn_g0"qbattery_para_gÚ"qultrasonic_sensor_abnormal_g$qhigh_pluse_para_out_g$qsystem_status_word_gµ+qsystem_function_ctrl_word_g/qsystem_alarm_word_g°7qsystem_alarm_ctrl_word_g8qsystem_alarm_report_ctrl_word_gj8qelectric_current_loop_gqpressure_para_set_gºqtemperature_para_set_gqlow_pluse_para_out_gqflow_device_detection_gË<qinitnal_data_g=qflowmeter_select_gb=)three_groups_data_result_infequipment_basic_result_flagÍ#device_size_inf_result_flagÍ#ultrasonic_sensor_trige_level_result_flagÍ#flow_correct_result_flagÍ#statistical_data_result_flagÍ#)¿equipment_basic_infgequipment_typeÍ#product_typeÍ#Í'manufactuer_nameôB#¤Ímanufactuer_codeC#*Æspecification_model<C#,caliber_modelÍ#@Í    serial_numberxC#A£xinao_serial_numberC#K`U ..\v20\core\..\USER\mem_pro.hstm32f10x.hmem_config.h__MEM_PRO_H  NORMAL_PRESSURE_MODE 1FIXED_PRESSURE_MODE 2FIXED_UP_PRESSURE_MODE 3PRESSURE_CHANGE_FUN 1SOFT_SERIAL_NUMBER1 0x05SOFT_SERIAL_NUMBER2 0x00SOFT_SERIAL_NUMBER3 0x05SOFT_SERIAL_NUMBER4 0x07UFG_TYPR_620 2UFG_TYPR_630 8UFG_TYPR_621 0x11UFG_TYPR_631 0x12AEQUIPMENT_BASIC_INF_LENGTH sizeof(EQUIPMENT_BASIC_INF_T)OMAIN_EQUIPM_HARDWARE_SOFTWARE_INF_LENGTH sizeof(MAIN_EQUIPM_HARDWARE_SOFTWARE_INF_T)[LCD_EQUIPM_HARDWARE_SOFTWARE_INF_LENGTH sizeof(LCD_EQUIPM_HARDWARE_SOFTWARE_INF_T)gWIRELESS_EQUIPM_HARDWARE_SOFTWARE_INF_LENGTH sizeof(WIRELESS_EQUIPM_HARDWARE_SOFTWARE_INF_T)sPRE_EQUIPM_HARDWARE_SOFTWARE_INF_LENGTH sizeof(PRE_EQUIPM_HARDWARE_SOFTWARE_INF_T)TEM_EQUIPM_HARDWARE_SOFTWARE_INF_LENGTH sizeof(TEM_EQUIPM_HARDWARE_SOFTWARE_INF_T)SONIC_SENSOR_EQUIPM_HARDWARE_SOFTWARE_INF_LENGTH sizeof(SONIC_SENSOR_EQUIPM_HARDWARE_SOFTWARE_INF_T)¬REALTIME_DATA_LENGTH sizeof(REALTIME_DATA_T)STATISTICAL_DATA_T_LENGTH sizeof(STATISTICAL_DATA_T)DEVICE_SIZE_INF_LENGTH sizeof(DEVICE_SIZE_INF_T)¥ULTRASONIC_SENSOR_TRIGE_LEVEL_LENGTH sizeof(ULTRASONIC_SENSOR_TRIGE_LEVEL_T)ÐFLOW_CORRECT_SET_LENGTH sizeof(FLOW_CORRECT_SET_T)ÛFLOW_LIMIT_LENGTH sizeof(FLOW_LIMIT_T)íPRESSURE_PARA_SET_LENGTH sizeof(PRESSURE_PARA_SET_T)ÿTEMPERATURE_PARA_SET_LENGTH sizeof(TEMPERATURE_PARA_SET_T)LOW_PULSE_PARA_OUT_LENGTH sizeof(LOW_PULSE_PARA_OUT_T)ELECTRIC_CURRENT_LOOP_LENGTH sizeof(ELECTRIC_CURRENT_LOOP_T)DEVICE_MODBUS_BTL_SET_LENGTH sizeof(DEVICE_MODBUS_BTL_SET_T)¦DEVICE_PASSWORD_LENGTH sizeof(DEVICE_PASSWORD_T)°MEASURE_FREEZ_PARA_LENGTH sizeof(MEASURE_FREEZ_PARA_T)ÍNETWORK_COM_PARA_LENGTH sizeof(NETWORK_COM_PARA_T)ÝNETWORK_COM_APN_LENGTH sizeof(NETWORK_COM_APN_T)èBATTERY_PARA_LENGTH sizeof(BATTERY_PARA_T)õULTRASONIC_SENSOR_ABNORMAL_LENGTH sizeof(ULTRASONIC_SENSOR_ABNORMAL_T)ýHIGH_PLUSE_PARA_LENGTH sizeof(HIGH_PLUSE_PARA_OUT_T)ÒSYSTEM_STATUS_WORD_INF_LENGTH sizeof(SYSTEM_STA_WORD_T)SYSTEM_FUNCTION_CTRL_WORD_INF_LENGTH sizeof(SYSTEM_FUN_CTRL_WORD_T)éSYSTEM_ALARM_WORD_INF_LENGTH sizeof(SYS_ALARM_T)DEVICE_REAL_TIME_SET_LENGTH sizeof(DEVICE_REAL_TIME_SET_T)ÈROW_DATA_INF_LENGTH sizeof(ROW_DATA_INF)
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..\HARDWARE\RTC\RTC.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER*þhourÍ#minÍ#secÍ#monthÍ#dateÍ#weekÍ#year¿#Pcalendar_obj>*éyear6#month6#day6#hour6#min6#sec6#PsClockBCDKÍqI2C_RECV_DATAzqcalendarþqTime_BCD_giPE ..\HARDWARE\RTC\..\USER\RTC.hstm32f10x.h__RTC_H RX8025_ADDR_READ 0x65 RX8025_ADDR_WRITE 0x64RX8025_WRITE_MODE 0xF0RX8025_READ_MODE 0xF0RX8025_ADDR_CONTROL1 0xE0RX8025_ADDR_CONTROL2 0xF0DS1339_Write_Add RX8025_ADDR_WRITEDS1339_Read_Add RX8025_ADDR_READDS1339_Status_Reg 0x0FRX8025_ADDR_READ 0x65RX8025_ADDR_WRITE 0x64RX8025_WRITE_MODE 0xF0RX8025_READ_MODE 0xF0!DS1339_SDA_PIN_NUM GPIO_Pin_14"DS1339_SDA_PIN_GROUP GPIOE#DS1339_CLK_PIN_NUM GPIO_Pin_13$DS1339_CLK_PIN_GROUP GPIOE&DS1339_INT_PIN_NUM GPIO_Pin_11'DS1339_INT_PIN_GROUP GPIOE,SDA_IN() {GPIOE->CRH&=0XF0FFFFFF;GPIOE->CRH|=8<<24;}-SDA_OUT() {GPIOE->CRH&=0XF0FFFFFF;GPIOE->CRH|=3<<24;}0IIC_SCL PEout(13)1IIC_SDA PEout(14)2READ_SDA PEin(14)<¼I2C_RECV_DATAcalendar¨Time_BCD_g
..\v20\core\modbus.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERPD ..\v20\core\..\SYSTEM\sys\modbus.hsys.h__MODBUS_H 
..\HARDWARE\ADC\adc.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER)çad_data_getad_get_address_pç#ad_buffer_cnt±#ad_chÍ#"¿Pad_data_st¿þçqad_dataPE ..\HARDWARE\ADC\..\SYSTEM\sys\adc.hsys.h__ADC_H AD_LENGTH 500ADC_dianchi_PIN_NUM GPIO_Pin_3ADC_dianchi_PIN_GROUP GPIOC ad_data
..\v20\core\boot.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER4* ..\v20\core\boot.h__BOOT_H 
..\v20\core\mem_warning_sizhu_log.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERdoublefloatPSYS_ALARM_VALVE_Tô°PLOG_SIZHU_SYS_ALARM_SAVE_T»ã)¹ log_sizhu_measure_alarm_save_tserial_numberÍ#Sample_year6#Sample_month6#Sample_day6#Sample_hour6#Sample_min6#Sample_sec6#alarm_idE#StandardGasUsageTotal¦#    WorkingGasUsageTotal¦#ReverseStandardGasUsageTotal¦#ReverseWorkingGasUsageTotal¦#!Standardvec°#)Workingvec°#-Temperature°#1Pressure°#5ambient_tem°#9lith_bat_vÍ#=alka_bat_vÍ#>status_wordµ+#?channel_time_up_a°#Kchannel_time_up_b°#Ochannel_time_down_a°#Schannel_time_down_b°#Wchannel_time_mid_a°#[channel_time_mid_b°#_channel_time_up_difference°#cchannel_time_down_difference°#gchannel_time_mid_difference°#ksignal_intensity_up_aÍ#osignal_intensity_up_bÍ#psignal_intensity_down_aÍ#qsignal_intensity_down_bÍ#rsignal_intensity_mid_aÍ#ssignal_intensity_mid_bÍ#tchannel_gain_up_aÍ#uchannel_gain_up_bÍ#vchannel_gain_down_aÍ#wchannel_gain_down_bÍ#xchannel_gain_mid_aÍ#ychannel_gain_mid_bÍ#zchannel_SNR_up_a¿#{channel_SNR_up_b¿#}channel_SNR_down_a¿#channel_SNR_down_b¿#channel_SNR_mid_a¿#channel_SNR_mid_b¿#channel_sound_velocity_up°#channel_sound_velocity_down°#channel_sound_velocity_mid°#channel_flow_velocity_up°#channel_flow_velocity_down°#channel_flow_velocity_mid°#PLOG_SIZHU_MEASURE_ALARM_SAVE_Tö«*áserial_numberÍ#Sample_year6#Sample_month6#Sample_day6#Sample_hour6#Sample_min6#Sample_sec6#valve_action_typeÍ#valve_action_id¿#open_valve_times¿#
close_valve_times¿#PLOG_SIZHU_VALVE_ACTION_RECORD_SAVE_TàÁ)Ílog_alarm_run_tlog_countE#log_addr_saveU#PLOG_ALARM_RUN_TË)Älog_alarm_para_tsystem_alarm_logM#class_measure_abnM#valve_action_logM#PLOG_ALARM_PARA_TeÕqlog_alarm_para_gÄ»#ALARM_ID_NORMALALARM_ID_SYSTEM_STARTALARM_ID_EX_POWER_STATUS_CHANGEALARM_ID_COVER_OPENALARM_ID_MAINBOARD_REMOVALALARM_ID_GPRS_FAILEDALARM_ID_LCD_NUMBER_OVERRUNALARM_ID_LITH_BAT_LOWALARM_ID_LITH_BAT_DOWNALARM_ID_LITH_BAT_REMOVALALARM_ID_ALKA_BAT_LOWALARM_ID_ALKA_BAT_DOWNALARM_ID_ALKA_BAT_REMOVALALARM_ID_VALVE_BAT_LOWALARM_ID_VALVE_BAT_DOWNALARM_ID_RTC_BAT_LOWALARM_ID_TEM_TRANSMITTER_FAILURE ALARM_ID_TEM_EXCEED_UP_LIMIT!ALARM_ID_TEM_EXCEED_UP_UP_LIMIT"ALARM_ID_TEM_EXCEED_LOW_LIMIT#ALARM_ID_TEM_EXCEED_LOW_LOW_LIMIT$ALARM_ID_PRE_TRANSMITTER_FAILURE%ALARM_ID_PRE_EXCEED_UP_LIMIT&ALARM_ID_PRE_EXCEED_UP_UP_LIMIT'ALARM_ID_PRE_EXCEED_LOW_LIMIT(ALARM_ID_PRE_EXCEED_LOW_LOW_LIMIT)ALARM_ID_AMBIENT_TEM_EXCEED_UP_LIMIT0ALARM_ID_AMBIENT_TEM_EXCEED_LOW_LIMIT1ALARM_ID_AMBIENT_TEM_SUDDEN_CHANGE2ALARM_ID_LCD_AMBIENT_TEM_EXCEED_LOW_LIMIT3ALARM_ID_MEASURE_SONIC_SENSOR_LOSS@ALARM_ID_MEASURE_FLOW_VELOCITY_ABNORMALAALARM_ID_MEASURE_TIME_DIFF_ABNORMALBALARM_ID_MEASURE_SOUND_VELOCITY_ABNORMALCALARM_ID_MEASURE_SNR_ABNORMALDALARM_ID_MEASURE_SIHNAL_OVERFLOW_ABNORMALEALARM_ID_MEASURE_THRESHOLD_ABNORMALFALARM_ID_MEASURE_GAIN_ABNORMALGALARM_ID_MEDIUM_WATERHALARM_ID_MEDIUM_ABNORMALIALARM_ID_DISMANTLE_METER_ABNORMALPALARM_ID_METERING_UNIT_ABNORMALQALARM_ID_MEASURE_CHANNEL_REMOVALRALARM_ID_FLOW_EXCEED_UP_LIMIT`ALARM_ID_FLOW_EXCEED_UP_UP_LIMITaALARM_ID_FLOW_EXCEED_UP_UP_LIMIT2bALARM_ID_FLOW_BIDIRECTIONALcALARM_ID_FLOW_CONSTANTdALARM_ID_FLOW_SMALLeALARM_ID_GAS_LEAKfALARM_ID_VALVE_ABNORMALpALARM_ID_VALVE_CLOSE_GAS_RUNNING_ABNORMALqALARM_ID_FLOW_BAT_LOWALARM_ID_FLOW_BAT_DOWNALARM_ID_PULSE_BROKENALARM_ID_E2P_W_ABNORMALALARM_ID_E2P_R_ABNORMALALARM_ID_READ_485_ABNORMALALARM_ID_485_READING_SMALLER_ABNORMALALARM_ID_BALANCE_SMALLER1ALARM_ID_BALANCE_SMALLER2ALARM_ID_BALANCE_SMALLER3ALARM_ID_BALANCE_SMALLER4ALARM_ID_BALANCE_SMALLER5ALARM_ID_CUMULATIVE_GAS_ARRIVEALARM_ID_N_DAYS_NO_GAS_ARRIVEALARM_ID_N_DAYS_NO_REPORT_ARRIVEALARM_ID_OP_VALVE_KEY    ALARM_ID_CL_VALVE_KEY    ALARM_ID_OP_VALVE_CMD    ALARM_ID_CL_VALVE_CMD    )'log_sizhu_sys_alarm_save_tLserial_number¿#Sample_year6#Sample_month6#Sample_day6#Sample_hour6#Sample_min6#Sample_sec6#alarm_idE#StandardGasUsageTotal¦#
WorkingGasUsageTotal¦#ReverseStandardGasUsageTotal¦#ReverseWorkingGasUsageTotal¦#"Standardvec°#*Workingvec°#.Temperature°#2Pressure°#6ambient_tem°#:lith_bat_vÍ#>alka_bat_vÍ#?status_wordµ+#@|p ..\v20\core\..\USER\mem_warning_sizhu_log.hstm32f10x.hmem_config.hmem_pro.h__MEM_WARNING_SIZHU_LOG_H     SYSTEM_ALARM_LOG_FIRST_INIT_ADDR SYSTEM_ALARM_LOG_ADDRSYSTEM_ALARM_LOG_STORAGE_LENGTH sizeof(LOG_SIZHU_SYS_ALARM_SAVE_T)SYSTEM_ALARM_LOG_NUM 400SYSTEM_ALARM_LOG_START_ADDR SYSTEM_ALARM_LOG_ADDR + 10SYSTEM_ALARM_LOG_COUNT_ADDR SYSTEM_ALARM_LOG_START_ADDRSYSTEM_ALARM_LOG_SAVE_ADDR SYSTEM_ALARM_LOG_COUNT_ADDR + 2SYSTEM_ALARM_LOG_STORAGE_START_ADDR SYSTEM_ALARM_LOG_START_ADDR + 100SYSTEM_ALARM_LOG_STORAGE_END_ADDR SYSTEM_ALARM_LOG_STORAGE_START_ADDR + (SYSTEM_ALARM_LOG_NUM -1) * SYSTEM_ALARM_LOG_STORAGE_LENGTHMEASURE_ALARM_LOG_STORAGE_LENGTH sizeof(LOG_SIZHU_MEASURE_ALARM_SAVE_T)MEASURE_ALARM_LOG_STORAGE_NUM 200MEASURE_ALARM_START_ADDR FLOW_MEASURE_ALARM_LOG_ADDRMEASURE_ALARM_LOG_COUNT_ADDR MEASURE_ALARM_START_ADDRMEASURE_ALARM_LOG_SAVE_ADDR MEASURE_ALARM_START_ADDR + 2!MEASURE_ALARM_LOG_STORAGE_START_ADDR MEASURE_ALARM_START_ADDR + 150"MEASURE_ALARM_LOG_STORAGE_END_ADDR MEASURE_ALARM_LOG_STORAGE_START_ADDR + (MEASURE_ALARM_LOG_STORAGE_NUM-1) * MEASURE_ALARM_LOG_STORAGE_LENGTH'VALVE_ACTION_LOG_STORAGE_LENGTH sizeof(LOG_SIZHU_VALVE_ACTION_RECORD_SAVE_T)(VALVE_ACTION_LOG_STORAGE_NUM 100*VALVE_ACTION_LOG_START_ADDR VALVE_ACTION_RECORD_ADDR+VALVE_ACTION_LOG_COUNT_ADDR VALVE_ACTION_LOG_START_ADDR,VALVE_ACTION_LOG_SAVE_ADDR VALVE_ACTION_LOG_COUNT_ADDR + 2.VALVE_ACTION_LOG_STORAGE_START_ADDR VALVE_ACTION_LOG_START_ADDR + 100/VALVE_ACTION_LOG_STORAGE_END_ADDR VALVE_ACTION_LOG_STORAGE_START_ADDR + (VALVE_ACTION_LOG_STORAGE_NUM-1) * VALVE_ACTION_LOG_STORAGE_LENGTH5ALARM_HAPPEN 0x00006ALARM_END 0x1000QALARM_CLASS_SYSTEM_START 0x01RALARM_CLASS_BAT_POWER 0x02SALARM_CLASS_PRE 0x03TALARM_CLASS_TEM 0x04UALARM_CLASS_FLOW 0x05VALARM_CLASS_EX_POWER 0x06WALARM_CLASS_COVER_OPEN 0x07XALARM_CLASS_FLOW_START_STOP 0x08YALARM_CLASS_AMBIENT_TEM 0x09ZALARM_CLASS_LCD 0x0A#Ýlog_alarm_para_gÈA
..\v20\core\para.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERfloatdoublePSYSTEM_CONST_PARA_Ta4gPSYSTEM_PARA_TË4úPSYSTEM_CNT_Tµ>PSYSTEM_GPRS_ADDR_PARA_T
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system_power_connectÍ#system_key4_downÍ#system_key4_authorize_cnt¿# system_set_authorize_flagÍ#system_extern_power_connect_flagÍ#system_measure_timesÍ#system_measure_times_setÍ#system_begin_get_data_cntÍ#system_userÍ#¹nÍsystem_bat_state.7#system_bat_power¿#system_bat_power_percentÍ#system_mid_probe_flagÍ#system_probe_period¿#system_bat_get_period¿#system_period¿#system_flow_data_para_period¿#!system_tem_period¿##system_presure_period¿#%system_presure_power_flagÍ#'system_temp_power_flagÍ#(system_tem_get_control_periodÍ#)system_pressure_get_control_periodÍ#*system_measure_timeÍ#+flow_level1_up_flagÍ#,flow_level2_up_flagÍ#-gain_errorÍ#.snr_errorÍ#/system_bat_work_period1¿#0system_bat_work_period2¿#2system_close_valve_alarm_timeÍ#4system_lowvoltage_timeÍ#5system_backward_flow_flagÍ#6system_tem_alarm_cntÍ#7system_pre_alarm_cntÍ#8system_tem_alarm_fault_flagÍ#9system_tem_alarm_up_flagÍ#:system_tem_alarm_up_up_flagÍ#;system_tem_alarm_low_flagÍ#<system_tem_alarm_low_low_flagÍ#=system_pre_alarm_fault_flagÍ#>system_pre_alarm_up_flagÍ#?system_pre_alarm_up_up_flagÍ#@system_pre_alarm_low_flagÍ#Asystem_pre_alarm_low_low_flagÍ#Bambient_tem_alarm_up_flagÍ#Cambient_tem_alarm_low_flagÍ#DData_Send_failed_timeÍ#E¸xÍ    system_error-<#Fsystem_read_errorÍ#Psystem_write_errorÍ#Qsystem_fan_write_errorÍ#Rsystem_fan_read_errorÍ#Sflow_up_max_alarmÍ#Trestart_alarmÍ#Uapp_ble_para_alarmÍ#Vsig_up_level_alarmÍ#Wsig_down_level_alarmÍ#Xbalance_small_1_StatusÍ#Ybalance_small_2_StatusÍ#Zbalance_small_3_StatusÍ#[balance_small_4_StatusÍ#\valve_close_but_flow_StatusÍ#]many_days_no_gas_StatusÍ#^many_days_no_report_StatusÍ#_cumulant_reaches_set_value_StatusÍ#`system_workstatus¿#amedium_statusÍ#ctemp_sudden_change_statusÍ#d)~system_cnt_tsystem_temperature_period¿#system_pressure_period¿#)ÿsystem_gprs_addr_para_t²~Ígprs_set'?#Í~Ígprs_repair_setB?#gprs_repair_para_set¿#gprs_repair_Q_1¿#gprs_repair_P_1¿#gprs_repair_Q_2¿#
gprs_repair_P_2¿#gprs_repair_Q_3¿#gprs_repair_P_3¿#gprs_led¿#address1¿#address_value1¿#address2¿#address_value2¿#)£system_gprs_set_log_para_t,gprs_set_new_data_flagÍ#addr_set_numÍ#áÍ gprs_set_addrÕ@#Íö@ gprs_set_valueA#)Çpressure_sensor_t6pressure#Ô    pressure_kJA#pressure_indexÍ#,cnt_measureÍ#-pressure_average#.pressure_correction#2Ä» ..\v20\core\..\USER\..\HARDWARE\ADC\para.htypedefdata.hstm32f10x.hmodbus.hadc.hboot.hmem_config.hmem_pro.hmem_warning_sizhu_log.h    __PARA_H 
     DATA_LITTLE_END 0DATA_BIG_END 1ACTIVE 1 NOACTIVE 0#MonthData 2$DayData 31%PeriodData 1300(SYSTEM_ONLY_WORK_MODE 1)SYSTEM_LOWPOWER_WORK_MODE 2*SYSTEM_DEBUG_MODE 3+SYSTEM_UPDATA_MODE 4/MODEBUS_STM32_MASTER_FUN_WRITE 0X010MODEBUS_STM32_MASTER_FUN_READ 0X022MODEBUS_PC_MASTER_FUN_WRITE 0X103MODEBUS_PC_MASTER_FUN_READ 0X035MODBUS_ADDR 0x017MODBUS_PC_ADDR 0X03;DEBUG_MODE_OPEN 1<DEBUG_MODE_CLOSED 2=DEBUG_SEND_H 3>DEBUG_SEND_D 4?DEBUG_SEND_M 5ATEST_LOG_NUM 10CDATA_REC_OK 1DDATA_REC_TOO_MUCH_ERROR 2GNOUSER 1HBTROOTUSER 2IGPRSUSER 3JPCUSER 4MBUFFER_LENGTH_NUM 0NBUFFER_ADDR_NUM 1OBUFFER_OLD_NUM 1PBUFFER_NEW_NUM 101TPULESE_WORKING_FLOW_MODE 0UPULESE_STANDARD_FLOW_MODE 1YPASSWORD_NORMAL_USER_TYPE 0ZPASSWORD_ROOT_USER_TYPE 1\FLOW_UP_CNT 43200_BAT_NOWORK_LEVEL 510`BAT_LOW_LEVEL 560lERROR_LCD_NUM 10¤PROBE_NUM 3¨PRESSURE_QUEUE_NUM 10¶TEMPERATURE_1MIN_NUM 6·TEMPERATURE_QUEUE_NUM 10FRAME_MAX_INDEX 3FRAME_LENGTH sizeof(GPRS_NEW_SEND_DATA)SAVE_EEPROM_LENGTH sizeof(EEPROM_SAVE_DATA_T)ÕFLOW_UP_MAX_DATA_LENGTH 20ÖFLOW_UP_MAX_POINT_NUM 3×FLOW_UP_LEVEL_RATE 1.05ØFLOW_UP_REAL_LEVEL_RATE 0.00033333úALARM_EVERYDAY_TIMES 2ûALARM_CONTINUE_TIMES 4üALARM_END_CONTINUE_TIMES 4àREAD_LOG_TEST åSEND_NUM_MAX 24çSYSTEM_DEBUG_AD_COLLECT 1èSYSTEM_DEBUG_FLOW 2éSYSTEM_DEBUG_PARA_SET 3êSYSTEM_IDLE 4ëSYSTEM_RETURN_MEASURING 10îSYSTEM_CMD_NOMAL 0ïSYSTEM_CMD_MAN_SET 1ðSYSTEM_CMD_AUTO_SET 2óSYSTEM_CMD_ONE_CH 1ôSYSTEM_CMD_TWO_CH 2õSYSTEM_CMD_UP_PARA_CH 3ùPRESSURE_ERROR 0X01úTEMPERATURE_ERROR 0X02ûBATLOWPOWER_ERROR 0X04üBATNOWORK_ERROR 0X08þFLOW_UP_MAX_ERROR 0X10ÿSIG_UP_MAX_ERROR 0X20CH1_NOSIN_ERROR 0X00CH2_NOSIN_ERROR 0X00CH3_NOSIN_ERROR 0X00SIG_CH1_A_MAX_ERROR 0X01SIG_CH1_B_MAX_ERROR 0X02SIG_CH2_A_MAX_ERROR 0X04SIG_CH2_B_MAX_ERROR 0X08SIG_CH3_A_MAX_ERROR 0X10SIG_CH3_B_MAX_ERROR 0X20SIG_CH1_A_LEVEL_ERROR 0X01SIG_CH1_B_LEVEL_ERROR 0X02SIG_CH2_A_LEVEL_ERROR 0X04SIG_CH2_B_LEVEL_ERROR 0X08SIG_CH3_A_LEVEL_ERROR 0X10SIG_CH3_B_LEVEL_ERROR 0X20DN25_TYPE 6DN32_TYPE 7DN40_TYPE 8DN50_TYPE 1DN80_TYPE 2DN100_TYPE 3DN150_TYPE 4DN200_TYPE 5¡DN25_MIN_FLOW 0.5¢DN32_MIN_FLOW 0.5£DN40_MIN_FLOW 1.0¤DN50_MIN_FLOW 1.0¥DN80_MIN_FLOW 2.5¦DN100_MIN_FLOW 4.0§DN150_MIN_FLOW 16¨DN200_MIN_FLOW 25©DN50_UFG630_MIN_FLOW 1ªDN80_UFG630_MIN_FLOW 1.6«DN100_UFG630_MIN_FLOW 2.5DN25_MAX_FLOW 40®DN32_MAX_FLOW 65¯DN40_MAX_FLOW 100°DN50_MAX_FLOW 160±DN80_MAX_FLOW 400²DN100_MAX_FLOW 650³DN150_MAX_FLOW 1600´DN200_MAX_FLOW 2500µDN50_UFG630_MAX_FLOW 160¶DN80_UFG630_MAX_FLOW 250·DN100_UFG630_MAX_FLOW 400ºDN25_FLOW_CUT_OFF 0.1»DN32_FLOW_CUT_OFF 0.2¼DN40_FLOW_CUT_OFF 0.2½DN50_FLOW_CUT_OFF 0.3¾DN80_FLOW_CUT_OFF 0.8¿DN100_FLOW_CUT_OFF 1.2ÀDN150_FLOW_CUT_OFF 3.2ÁDN200_FLOW_CUT_OFF 5.0ÂDN50_UFG630_FLOW_CUT_OFF 0.3ÃDN80_UFG630_FLOW_CUT_OFF 0.5ÄDN100_UFG630_FLOW_CUT_OFF 0.8iÌAh1read_data_buf_A_l1read_data_buf_B_l°1read_data_buf_C_lÈ1system_gprs_data_addr_gæ1flowfixcountû1flowfixcount_user2RS485_status*2BT_status@2pwm_para_gU2sensor_gj2ad_data_g~2backup_para_g2flowdebug_para_g±2v20_system_para_gÍ2v20_system_cnt_gè2buffer_ins_gÿ2back_data_user_g3sys_gprs_set_user_g83system_event_flag_gV3log_buffer_gm3system_state_g3system_para_control_run_gª3system_log_state_gÇ3system_flow_max_gã3system_flow_backward_g4prevent_dismantle_para_g4alarm_report_para_g94ultrasonic_sensor_abnormal_flag_gh
..\v20\core\ValveControl.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERunsigned charqOpenValveFLAGqValve_control_parm=qValve_Force_Open_Flag¿qvalve_ctl_bytes_g3ÚVALVE_CLOSE_CLASS_SYSTEM_SATE_CHANGEVALVE_CLOSE_CLASS_SYSTEM_BATVALVE_CLOSE_CLASS_SYSTEM_TEM_PREVALVE_CLOSE_CLASS_SYSTEM_METERINGVALVE_CLOSE_CLASS_SYSTEM_FLOWVALVE_CLOSE_CLASS_SYSTEM_VALVEVALVE_CLOSE_CLASS_SYSTEM_EX_TERMINALVALVE_CLOSE_CLASS_SYSTEM_BILLINGVALVE_CLOSE_CLASS_SYSTEM_KEY_CMD    PVALVE_CLOSE_CLASS>¨SZV101_VALVESZV102_VALVESZV103_VALVEPVALVE_TYPE_TsO©VALVE_NONEVALVE_OPVALVE_CLVALVE_OPENINGVALVE_CLOSINGVALVE_ERRORVALVE_MISSINGcPVALVE_STATE_T¼ZÑVALVE_ACTION_NONEVALVE_ACTION_CLOSE_UNLOCKVALVE_ACTION_LOCKVALVE_ACTION_OPENVALVE_ACTION_CLOSE_LOCKVALVE_ACTION_UNLOCKPVALVE_ACTION_TYPE>d*·+Valve_Type¨#Valve_Status)#OpenValveAuthorizeFLAGÍ#OpenValveAuthorizeTimeCnt±#ValveOpenTimes¿#ValveCloseTimes¿#    ValveCloseClass¿#ValveCloseID¿# ValveCloseTypeÍ#ValveCloseForceFLAGÍ#Trigger_check_valve_status_flagÍ#Valve_Bat_down_IRQ_flag7#Valve_Bat_down_check_stepÍ#Valve_Bat_statusÍ#Force_Open_statusÍ#Force_Open_FlagÍ#Force_Open_for_check_FlagÍ#OpenValveTime¿#CloseValveTime¿#CurrentStateÍ#CurrentState0TimeÍ#ValveHaveClosedTime±#PowerLowContinueTimesÍ#"PowerHighContinueTimesÍ##ForceOpenLowContinueTimes¿#$ForceOpenHighContinueTimes¿#&Emergency_close_valve_flagÍ#(valve_close_but_flow_cntÍ#)valve_close_but_flow_statusÍ#*tÍPVALVE_CONTROL_PARMê*²!gprs_cmd_need_close_valve_flagE#!gprs_cmd_close_valve_typeE#!flow_direction_need_close_valve_flagE#!flow_direction_close_valve_typeE#!power_sta_need_close_valve_flagE#!power_sta_close_valve_typeE#!E#!cover_open_need_close_valve_flagE#!cover_open_close_valve_typeE#!main_board_removal_need_close_valve_flagE#!main_board_removal_close_valve_typeE#!E#PVALVE_STATUS_CHANGE_TX²*Ø!valve_error_need_close_valve_flagE#!valve_error_close_valve_typeE#!balance_1_need_close_valve_flagE#!balance_1_close_valve_typeE#!balance_2_need_close_valve_flagE#!balance_2_close_valve_typeE#!balance_3_need_close_valve_flagE#!balance_3_close_valve_typeE#!balance_4_need_close_valve_flagE#!balance_4_close_valve_typeE#!balance_5_need_close_valve_flagE#!balance_5_close_valve_typeE#!E#PVALVE_BILLING_CHANGE_1_TP    È*!set_cumulate_need_close_valve_flagE#!set_cumulate_close_valve_typeE#!no_use_gas_need_close_valve_flagE#!no_use_gas_close_valve_typeE#!no_gprs_need_close_valve_flagE#!no_gprs_close_valve_typeE#!E#
PVALVE_BILLING_CHANGE_2_TyÕ*!lith_low_need_close_valve_flagE#!lith_low_close_valve_typeE#!lith_down_need_close_valve_flagE#!lith_down_close_valve_typeE#!lith_remove_need_close_valve_flagE#!lith_remove_close_valve_typeE#!alka_low_need_close_valve_flagE#!alka_low_close_valve_typeE#!alka_down_need_close_valve_flagE#!alka_down_close_valve_typeE#!alka_remove_need_close_valve_flagE#!alka_remove_close_valve_typeE#!gprs_fail_need_close_valve_flagE#!gprs_fail_close_valve_typeE#!E#PVALVE_VOLTAGE_CHANGE_1_T©î* !reserveE#
!valve_bat_low_need_close_valve_flagE#!valve_bat_low_need_close_valve_typeE#!valve_bat_down_need_close_valve_flagE#!valve_bat_down_need_close_valve_typeE#!E#PVALVE_VOLTAGE_CHANGE_2_T%*ã%!temp_up_need_close_valve_flagE#!temp_up_close_valve_typeE#!temp_up_up_need_close_valve_flagE#!temp_up_up_close_valve_typeE#!temp_down_need_close_valve_flagE#!temp_down_close_valve_typeE#!temp_down_down_need_close_valve_flagE#!temp_down_down_close_valve_typeE#!press_up_need_close_valve_flagE#!press_up_close_valve_typeE#!press_up_up_need_close_valve_flagE#!press_up_up_close_valve_typeE#!press_down_need_close_valve_flagE#!press_down_close_valve_typeE#!press_down_down_need_close_valve_flagE#!press_down_down_close_valve_typeE#PVALVE_TP_ERR_1_T.¥*é)!temp_err_need_close_valve_flagE#!temp_err_close_valve_typeE#!press_err_need_close_valve_flagE#!press_err_close_valve_typeE#!ambient_temp_up_need_close_valve_flagE#!ambient_temp_up_close_valve_typeE#!ambient_temp_down_need_close_valve_flagE#!ambient_temp_down_close_valve_typeE#!ambient_temp_sudden_change_need_close_valve_flagE#!ambient_temp_sudden_change_close_valve_typeE#!E#PVALVE_TP_ERR_2_Tü¸*¥/!flow_vel_err_need_close_valve_flagE#!flow_vel_err_close_valve_typeE#!tof_diff_err_need_close_valve_flagE#!tof_diff_err_close_valve_typeE#!sound_vel_err_need_close_valve_flagE#!sound_vel_err_close_valve_typeE#!snr_err_need_close_valve_flagE#!snr_err_close_valve_typeE#!sig_up_need_close_valve_flagE#!sig_up_close_valve_typeE#!sig_th_err_need_close_valve_flagE#!sig_th_err_close_valve_typeE#!gain_err_need_close_valve_flagE#!gain_err_close_valve_typeE#!ut_lose_need_close_valve_flagE#!ut_lose_close_valve_typeE#PVALVE_MEASURE_ERR_1_TÓ*Ê2!flooding_water_need_close_valve_flagE#!flooding_water_close_valve_typeE#!media_err_need_close_valve_flagE#!media_err_close_valve_typeE#!dismantle_need_close_valve_flagE#!dismantle_close_valve_typeE#!metering_unit_abnormal_need_close_valve_flagE#!metering_unit_abnormal_need_close_valve_typeE#!E#PVALVE_MEASURE_ERR_2_TÃä*8!leakage_need_close_valve_flagE#!leakage_close_valve_typeE#!lcd_up_need_close_valve_flagE#!lcd_up_close_valve_typeE#!lcd_temp_low_need_close_valve_flagE#!lcd_temp_low_close_valve_typeE#!flow_up_1_need_close_valve_flagE#!flow_up_1_close_valve_typeE#!flow_up_2_need_close_valve_flagE#!flow_up_2_close_valve_typeE#!flow_up_3_need_close_valve_flagE#!flow_up_3_close_valve_typeE#!cl_constant_flow_need_close_valve_flagE#!cl_constant_flow_valve_typeE#!op_constant_flow_close_valve_flagE#!op_constant_flow_valve_typeE#PVALVE_OTHER_ERR_1_Thÿ*¿:!cl_have_flow_need_close_valve_flagE#!cl_have_flow_valve_typeE#!e2p_write_err_need_close_valve_flagE#!e2p_write_err_flow_valve_typeE#!e2p_read_err_need_close_valve_flagE#!e2p_read_err_flow_valve_typeE#!E#
PVALVE_OTHER_ERR_2_T(*³<valve_ctr_12    #valve_ctr_2X#valve_ctr_3#valve_ctr_4#valve_ctr_5 #valve_ctr_6ã#
valve_ctr_7é#valve_ctr_8¥#valve_ctr_9J#valve_ctr_10#valve_ctr_11?#PVALVE_CTL_BYTES_T[qTime_For_valve_runEla ..\v20\core\..\USER\..\SYSTEM\sys\ValveControl.hdatatype.hsys.h__VALVECONTROL_H  VALVE_OPEN_TIME_LIMIT 350Motor_A_PIN_NUM GPIO_Pin_10Motor_A_PIN_GROUP GPIOEMotor_A_EN PEout(10)Motor_B_PIN_NUM GPIO_Pin_15Motor_B_PIN_GROUP GPIODMotor_B_EN PDout(15) Motor_OP_PIN_NUM GPIO_Pin_9!Motor_OP_PIN_GROUP GPIOE"Motor_OP_PIN_READ PEin(9)$Motor_CL_PIN_NUM GPIO_Pin_4%Motor_CL_PIN_GROUP GPIOD&Motor_CL_PIN_READ PDin(4))FORCE_OPEN_INT_PIN_NUM GPIO_Pin_10*FORCE_OPEN_INT_PIN_GROUP GPIOC,FORCE_OPEN_INT_READ PCin(10).VALVE_ALKA_LOW_A_PIN_NUM GPIO_Pin_11/VALVE_ALKA_LOW_A_PIN_GROUP GPIOC1VALVE_ALKA_LOW_A_PIN_READ PCin(11)¡VALVE_CTL_LENGTH (sizeof(VALVE_STATUS_CHANGE_T) + sizeof(VALVE_BILLING_CHANGE_1_T) + sizeof(VALVE_BILLING_CHANGE_2_T) + sizeof(VALVE_VOLTAGE_CHANGE_1_T) + sizeof(VALVE_VOLTAGE_CHANGE_2_T) + sizeof(VALVE_TP_ERR_1_T) + sizeof(VALVE_TP_ERR_2_T) + sizeof(VALVE_MEASURE_ERR_1_T) + sizeof(VALVE_MEASURE_ERR_2_T) + sizeof(VALVE_OTHER_ERR_1_T) + sizeof(VALVE_OTHER_ERR_2_T))¥VALVE_CTL_LEN sizeof(VALVE_CTL_BYTES_T)~l®OpenValveFLAGÂValve_control_parmÛValve_Force_Open_Flagùvalve_ctl_bytes_gMTime_For_valve_run L
..\v20\core\gprs.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERfloatcharunsigned charunsigned shortintlong longPGPRS_SEND_DATA²´PGPRS_PARA_SET_Tîâ)·gprs_data_processgprs_typeÍ#gprs_send_timeÍ#gprs_save_timeÍ#gprs_save_run_process_times¿#gprs_working_stateÍ#gprs_send_time_out_timeÍ#new_data_flagÍ#new_data_heartbeat_flagÍ#gprs_send_wait_timesÍ#    gprs_off_wait_times¿#
delay_times¿#ReportingTypeÍ#Key_send_data_handle_flagÍ#gprs_send_data_handle_flagÍ#gprs_send_alarm_handle_flagÍ#gprs_send_alarm_handle_first_flagÍ#gprs_data_store_flagÍ#RetransmissionIntervalCount±#RetransmissionNumberCountÍ#ReprotingResultÍ#RetransmissionFlagÍ#data_send_in_one_minÍ#PGPRS_DATA_C_T)ôgprs_data_infgprs_stateÍ#PGPRS_DATA_INF_TÍ*ß UFramestart_symbol#´6DeviceAddress)#Datastart_symbol#    Systemclock_year6#
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per_log_read_addr_beignU#per_log_read_addr_endU#)Ë6gprs_para_set_t)system_flow_mode_changeÍ#system_para_set#trigle_level_changeÍ#trigle_levelÍ#flow_get_period_changeÍ#flow_get_periodÍ#flow_fix_changeÍ#    flow_fix_dataÍ#
led_show_changeÍ#led_showÍ#save_data_changeÍ# save_data_typeÍ#save_data_periodÍ#up_data_changeÍ#up_data_typeÍ#up_data_tpÍ#up_data_time1_changeÍ#up_data_time1¿#up_data_time2_changeÍ#up_data_time2¿#gprs_rv_time_changeÍ#gprs_rv_timeÍ#time1_flag6#sendTiming_hour6#sendTiming_min6#time2_flag6#sendTiming_hour26#sendTiming_min26# save_data_num_sizhu¿#!up_data_num_sizhu¿##up_data_left_num_sizhu¿#%alarm_send_one_flagÍ#'alarm_send_time_cntÍ#( ..\v20\core\..\USER\..\HARDWARE\RTC\gprs.hdatatype.htypedefdata.hrtc.hpara.hValveControl.h__GPRS_H UFG6X0_VALVE_HAVE_BILLING_CENTER 0X82SIZHU_PROTOCOL_VERSION 0x40GPRS_POWER_OFF_TIME 4GPRS_OFF_TIME (GPRS_POWER_OFF_TIME + 5)WC_TIME_OUT 120PORT_POWER GPIODPORT_OPEN GPIOAPORT_RST GPIOALOG_RAM_BUFFER 1 LOG_EEPROM_BUFFER 0#GPRSOFF 0$ONPOWERGPRSSEND 1%BATOWERGPRSSEND 2*GPRS_POWER_ON_S 0+GPRS_CONNECTION_S 1,GPRS_SEND_DATA_S 2-GPRS_WAIT_OK_S 3.GPRS_TIME_OUT_S 4/GPRS_POWER_OFF_S 59NOMARL_DATA_GPRS 0X01:NOMARL_HEART_BEAT 0X02;DEVICE_WARNING 0X03DSIZHU_FRAME_HEAD 0x68ESIZHU_DATA_HEAD 0x55ISIZHU_CONTROL_CODE_DATAUP 0x0101JSIZHU_CONTROL_CODE_END 0x0102KSIZHU_CONTROL_CODE_MODIFY_KEY 0x0103LSIZHU_CONTROL_CODE_PUSH_TERMINAL_INFO 0x0104OSIZHU_CONTROL_CODE_ACCOUNT_STATUS 0x0201PSIZHU_CONTROL_CODE_SET_PARA_DEV 0x0202QSIZHU_CONTROL_CODE_READ_PARA_DEV 0x0203RSIZHU_CONTROL_CODE_SET_ALARM_CTRL_WORD 0x0204SSIZHU_CONTROL_CODE_READ_ALARM_CTRL_WORD 0x0205TSIZHU_CONTROL_CODE_SET_REPORT_PERIOD 0x0206USIZHU_CONTROL_CODE_READ_REPORT_PERIOD 0x0207VSIZHU_CONTROL_CODE_SET_485_PARA 0x0208WSIZHU_CONTROL_CODE_READ_485_PARA 0x0209XSIZHU_CONTROL_CODE_READ_EQUIPMENT_INFO 0x0220YSIZHU_CONTROL_CODE_SET_TIME 0x0221ZSIZHU_CONTROL_CODE_SET_IP_PORT 0x0222[SIZHU_CONTROL_CODE_READ_IP_PORT 0x0223\SIZHU_CONTROL_CODE_CLEAR_ABNORMAL 0x0224]SIZHU_CONTROL_CODE_SET_CUMULANT_0 0x0225^SIZHU_CONTROL_CODE_SET_DAY_MONTH_RECORD_STORAGE_TIME 0x0230_SIZHU_CONTROL_CODE_READ_DAY_MONTH_RECORD_STORAGE_TIME 0x0231`SIZHU_CONTROL_CODE_READ_HISTORY_RECORD 0x0232aSIZHU_CONTROL_CODE_READ_VALVE_RECORD 0x0233bSIZHU_CONTROL_CODE_READ_CUMULANT_MODIFY_RECORD 0x0234eSIZHU_CONTROL_CODE_VALVE_CONTROL 0x0301fSIZHU_CONTROL_CODE_SET_BALANCE_INSUF_CLOSE_VALVE 0x0302gSIZHU_CONTROL_CODE_READ_BALANCE_INSUF_CLOSE_VALVE 0x0303hSIZHU_CONTROL_CODE_SET_VALVE_CLOSE_CTRL_WORD 0x0304iSIZHU_CONTROL_CODE_READ_VALVE_CLOSE_CTRL_WORD 0x0305jSIZHU_CONTROL_CODE_SET_NO_UP_CLOSE_DAY 0x0306kSIZHU_CONTROL_CODE_READ_NO_UP_CLOSE_DAY 0x0307lSIZHU_CONTROL_CODE_SET_NO_GAS_CLOSE_DAY 0x0308mSIZHU_CONTROL_CODE_READ_NO_GAS_CLOSE_DAY 0x0309nSIZHU_CONTROL_CODE_SET_CUMULANT_CLOSE 0x0310oSIZHU_CONTROL_CODE_READ_CUMULANT_CLOSE 0x0311rSIZHU_CONTROL_CODE_RECHARGE 0x0401sSIZHU_CONTROL_CODE_SET_PRICE 0x0402tSIZHU_CONTROL_CODE_READ_PRICE 0x0403vFRAME_DATA_MAX 3xFIRST_DATA_SHIFT_SIZHU 26zDATA_PACKET_HEADEA_LENGTH_SIZHU 57{DATA_PACKET_DATA_LENGTH_SIZHU sizeof(GPRS_DATA_NEW_PACKAGE_620)REPORTING_TYPE_TIMING 0x01REPORTING_TYPE_TRIGGER 0x02REPORTING_TYPE_ABNORMAL 0x03REPORTING_TYPE_POWER_ON 0x04REPORTING_TYPE_INTERVAL 0x05REPORTING_TYPE_AGAIN 0x06PëKVer_AES_128_SIZHUgprs_send_inf_gPara_Gprs_set6gprs_control_g_sizhuQVariaDlg`gprs_protocol_header_sizhunet_now_timedata_ufg620_save_galarm_data_save_gÅCS_addráGPRS_SEND_BUFFúgprs_send_set_gyushu¤£¢¥,
..\HARDWARE\RS232\rs232.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER)rx_rs232t·ÍÇRS232_RX_TEMP_BUF«#ÜÍÇrx_data_bufÐ#Èrec_buffer_cnt¿#PRX_RS232_T/qrx_data_s_g
t ..\HARDWARE\RS232\..\SYSTEM\sys\..\STM32F10x_FWLib\inc\rs232.hsys.hstm32f10x_dma.h__RS232_H GPRSRS232_TXD_EN_PIN_NUM GPIO_Pin_9GPRSRS232_TXD_EN_PIN_GROUP GPIOAGPRSRS232_RXD_EN_PIN_NUM GPIO_Pin_10GPRSRS232_RXD_EN_PIN_GROUP GPIOAUARTRS232NUM USART1UARTRS232IRQ USART1_IRQnDMA_RS232_TX_Channel DMA1_Channel4DMA_RS232_TC DMA1_FLAG_TC4DMA_RS232_RX_Channel DMA1_Channel5 DMA_RS232_RC DMA1_FLAG_TC5"GPRS_DATA_REC_OK 1#GPRS_DATA_REC_TOO_MUCH_ERROR 2%APB232_GPIO_GROUP RCC_APB2Periph_GPIOA(RX232_LENGTH 2000rx_data_s_g©¨§
..\v20\core\module_config.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER<3 ..\v20\core\module_config.h__MODULE_CONFIG_H ¬«®8
 
..\v20\core\calculate.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERdoublefloatPPRE_TEM_SAMPLE_STEP_T|fPCALCULATE_GAS_V_TÔÕ)Êwork_flow_average_t]¤work_flow_data_buffü#work_flow_data_addr¿#Pwork_flow_data_cnt¿#Rflow_reverseÍ#Tflow_0_flagÍ#Uflow_0_cnt¿#Vflow_start_flagÍ#XFPGA_work_test±#YPWORK_FLOW_AVERAGE_Täæ)ðdata_filter¤flow_near÷#¤temp_near#´¤pre_near+#Í¤dataD#$dataindex±#@datagetindex±#Dflowget_index±#Htemget_index±#Lpreget_index±#Pmeasure_time±#Ttem_measure_period±#Xpre_measure_period±#\pre_measure_flag±#`tem_measure_flag±#dmeasure_state±#hmeasure_flag±#lmeasure_state_keep1±#pmeasure_state_keep2±#tmeasure_state_keep3±#xcheck_flow¤#|check_pre¤#PDATA_FILTER_Tæ¢)ý    calculate_gas_struct_t&delay_AB1_time6#delay_AB2_time6#delay_AB1_low_time6#delay_AB2_low_time6#delay_AB1_high_time6#delay_AB2_high_time6#pipe_r¤#pipe_area¤#
ë    ¤triglevelâ#PCALCULATE_GAS_STRUCT_T¹qcal_gas_para_gÊqcal_gas_struct_gýqdata_filter_array_gðqwork_flow_average_gÊÔPRE_TEM_SAMPLE_STOPPRE_POWER_ONPRE_SAMPLETEM_POWER_ONTEM_SAMPLE)¹calculate_gas_v_tuvol#cvol#fanuvol#fancvol#utotal# ctotal#(fanutotal#0fanctotal#8calibration_utotal#@calibration_ctotal#Herror_utotal#Perror_ctotal#Xerror_fan_utotal#`error_fan_ctotal#huvol_m3h¤#pcvol_m3h¤#tfanuvol_m3h¤#xfancvol_m3h¤#|residual_amount#unit_price±#signed_uvol¤#signed_cvol¤#average_uvol¤#corrected_medium_tem¤#corrected_medium_pre¤#compress_tableÍ# standcompressibilityfactor¤#¡gas_get_factor¤#¥C_coe¤#©K_coe¤#ambient_temperature¤#±synthetic_sound_velocity¤#µsynthetic_flow_velocity¤#¹replace_cvol#½replace_ctotal#Åflow_min¤#Íflow_max¤#Ñflow_total#Õfan_flow_total#Ýufg_typeÍ#åcal_paraÍ#æA1_work_flow¤#çA2_work_flow¤#ëA3_work_flow¤#ïB1_para_flow¤#óB2_para_flow¤#÷B3_para_flow¤#ûtem_para_flow¤#ÿpre_para_flow¤#flow_directionÍ#PRE_sensor_modelÍ#calibration_modeÍ#¨ ..\v20\core\..\USER\..\HARDWARE\ADC\calculate.hdatatype.htypedefdata.hstm32f10x.hpara.hadc.hmodule_config.h__CALCULATE_H "D_PIPE 0.10#PI 3.1415$PIPE_AREA PI*D_PIPE*D_PIPE/45A_TRIG_1 06B_TRIG_1 57A_TRIG_2 18B_TRIG_2 49MID_TRIG_A 2:MID_TRIG_B 3<MID_PAIR_TRIG_ERROR 0x01=A_PAIR_TRIG_ERROR 0x02>B_PAIR_TRIG_ERROR 0x04AM3_1_PLUSE 0BM3_01_PLUSE 1CM3_10_PLUSE 2DM3_100_PLUSE 3IINSIDE_GAS_TYPE 0JSET_GAS_TYPE 1NPRESSURE_SET 101.325RWORK_FLOW_AVERAGE_LENGTH 20VDATA_AVERAGE_LENGTH 10[NATURAL_GAS_SOUND_VELOCITY_LOW_LIMIT 375\NATURAL_GAS_SOUND_VELOCITY_HIGH_LIMIT 500]AIR_GAS_SOUND_VELOCITY_LOW_LIMIT 300jUFG_CHANNEL_NUM2 0kUFG_CHANNEL_NUM3 1üMEASURE_ONE 1ýMEASURE_MANY 2þMEASURE_SLOW 3TEMMEASURE_30S 30TEMMEASURE_60S 60TEMMEASURE_120S 120PREMEASURE_20S 30PREMEASURE_60S 60PREMEASURE_120S 120FILTERING_NUM 7CHECKARRAY_NUM 3f<
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..\v20\core\data_interaction_DTU.hComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USER*ÅDataHeadÍ#ÆÍSerialNumber»#åÍDataReserveÚ#    DataLength¿#ControlCodeÍ#CheckSumÍ#DataEndÍ#PJk_SP_DATA_HEAD¥)þdata_interaction_DTU_paraDT_modeÍ#DT_start_flagÍ#DT_in_pro_flagÍ#DT_in_pro_cnt¿#DT_stateÍ#DT_WakeupReasonÍ#PDATA_INTERACTION_DTU_PARA]*÷year6#month6#day6#hour6#min6#sec6#PsJkSpClock ª,  ..\v20\core\..\USER\..\HARDWARE\DELAY\D:\keil\ARM\ARMCC\Bin\..\include\..\HARDWARE\RTC\..\HARDWARE\RS232\data_interaction_DTU.hdatatype.htypedefdata.hdelay.hdevicegpioinit.hstring.hmem_pro.hRTC.hgprs.hrs232.hcalculate.h__DATA_INTERACTION_DTU_H     
    
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..\v20\core\data_interaction_DTU.cComponent: ARM Compiler 5.06 update 1 (build 61) Tool: ArmCC [4d35ad]E:\zw\ZW_\SZV10X_FM33A0XX\SZV10X\USERfloatdoubleunsigned charcharE"É"Í"¿l` ..\v20\core\..\v20\core\data_interaction_DTU.cdata_interaction_DTU.h¸!/!I$>%%%%    %C
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