forked from SZV10X_Software/SZV103_FM33A0xxEV_SiZhu

jinlicong
2024-04-23 678cda82efa03c875db392b738943f30812f0d55
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
#include "adc.h"
#include "gpio.h"
 
 
//ÄÚ²¿ÀÛ¼Ó  Î¶ÈбÂÊ
//float  const_TmpeK    = 4.5295;  //0X640 ADCбÂÊ
//float  const_30_top    = 30.0;    
 
 
//ÍⲿÀÛ¼Ó  Î¶ÈбÂÊ
float  const_TmpeK_14BIT    = 23.0247;                  //14BIT ADCбÂÊ
float  const_30_top    = 30.0;    
 
 
void ADC_LithIO_Init(void)
{
    CMU_PERCLK_SetableEx(PADCLK, ENABLE);  //PADʱÖÓ£¨GPIO£©Ê¹Äܺ¯Êý    
//    AnalogIO(LIT_PWR_UNDER_PORT,LIT_PWR_UNDER_PIN);//ADC_5
//    GPIOx_ANEN_Setable(LIT_PWR_UNDER_PORT,LIT_PWR_UNDER_PIN,ENABLE);
    AnalogIO(LIT_ADC_PORT,LIT_ADC_PIN);//ADC_IN4
    GPIOx_ANEN_Setable(LIT_ADC_PORT,LIT_ADC_PIN,ENABLE);
 
}
 
void ADC_AlkaIO_Init(void)
{
    CMU_PERCLK_SetableEx(PADCLK, ENABLE);  //PADʱÖÓ£¨GPIO£©Ê¹Äܺ¯Êý
    AnalogIO(ALK_ADC_PORT,ALK_ADC_PIN);//ADC_IN8
    GPIOx_ANEN_Setable(ALK_ADC_PORT,ALK_ADC_PIN,ENABLE);
}
 
void ADC_IN5_Init(void)
{
    CDIF_CR_INTF_EN_Setable(ENABLE);                        //¿çµçÔ´Óò½Ó¿ÚʹÄÜ
    VRTC_Init_RCMF_Trim();
    VRTC_RCMFCR_EN_Setable(ENABLE);
    VRTC_ADCCR_CKS_Set(VRTC_ADCCR_CKS_RCMF_2);                //ADC¹¤×÷ʱÖÓÑ¡Ôñ
    VRTC_ADCCR_CKE_Setable(ENABLE);                            //ADC¹¤×÷ʱÖÓʹÄÜ
    ADC_CFGR_BUFSEL_Set(ADC_CFGR_BUFSEL_ADC_IN5);            //ADCÊäÈëͨµÀÑ¡Ôñ
  
    ADC_CFGR_BUFEN_Setable(ENABLE);                            //ADCÊäÈëͨµÀbufferʹÄÜ/½ûÖ¹
    ADC_CR_MODE_Set(ADC_CR_MODE_EXTERNAL);                    //ADC¹¤×÷ģʽѡÔñÍⲿÀÛ¼ÓÆ÷
    ADC_CR_RSTCTRL_EN_Setable(ENABLE);                        //ÔÊÐí»ý·ÖÆ÷Íⲿ¸´Î»
    ADC_CFGR_ACC_PERIOD_Set(ADC_CFGR_ACC_PERIOD_14BITS);    //ÍⲿÀÛ¼ÓÆ÷ÀÛ¼ÓÖÜÆÚÅäÖÃ
    ADC_CR_HPEN_Set(ADC_CR_HPEN_1MHZ);
    
  ADC_TRIM_Write(0X7FF);                                    //adcƵÂÊ1M Ê± ¼ÆËãʱ¼ä4ms
//    ADC_TRIM_Write(0X3FF);                                    //adcƵÂÊ1M Ê± ¼ÆËãʱ¼ä2ms
//    ADC_TRIM_Write(0X1FF);                                    //adcƵÂÊ1M Ê± ¼ÆËãʱ¼ä1ms
  
    ADC_CR_ACC_IE_Setable(DISABLE);                            //ÍⲿÀÛ¼ÓģʽÖжϽûÖ¹
    ADC_CR_EN_Setable(DISABLE);                                //ADC¹Ø±Õ
}
 
void ADC_IN4_Init(void)
{
    
    CDIF_CR_INTF_EN_Setable(ENABLE);                        //¿çµçÔ´Óò½Ó¿ÚʹÄÜ
    VRTC_Init_RCMF_Trim();
    VRTC_RCMFCR_EN_Setable(ENABLE);
    VRTC_ADCCR_CKS_Set(VRTC_ADCCR_CKS_RCMF_2);                //ADC¹¤×÷ʱÖÓÑ¡Ôñ
    VRTC_ADCCR_CKE_Setable(ENABLE);                            //ADC¹¤×÷ʱÖÓʹÄÜ
    ADC_CFGR_BUFSEL_Set(ADC_CFGR_BUFSEL_ADC_IN4);            //ADCÊäÈëͨµÀÑ¡Ôñ
  
    ADC_CFGR_BUFEN_Setable(ENABLE);                            //ADCÊäÈëͨµÀbufferʹÄÜ/½ûÖ¹
    ADC_CR_MODE_Set(ADC_CR_MODE_EXTERNAL);                    //ADC¹¤×÷ģʽѡÔñÍⲿÀÛ¼ÓÆ÷
    ADC_CR_RSTCTRL_EN_Setable(ENABLE);                        //ÔÊÐí»ý·ÖÆ÷Íⲿ¸´Î»
    ADC_CFGR_ACC_PERIOD_Set(ADC_CFGR_ACC_PERIOD_14BITS);    //ÍⲿÀÛ¼ÓÆ÷ÀÛ¼ÓÖÜÆÚÅäÖÃ
    ADC_CR_HPEN_Set(ADC_CR_HPEN_1MHZ);
    
  ADC_TRIM_Write(0X7FF);                                    //adcƵÂÊ1M Ê± ¼ÆËãʱ¼ä4ms
//    ADC_TRIM_Write(0X3FF);                                    //adcƵÂÊ1M Ê± ¼ÆËãʱ¼ä2ms
//    ADC_TRIM_Write(0X1FF);                                    //adcƵÂÊ1M Ê± ¼ÆËãʱ¼ä1ms
  
    ADC_CR_ACC_IE_Setable(DISABLE);                            //ÍⲿÀÛ¼ÓģʽÖжϽûÖ¹
    ADC_CR_EN_Setable(DISABLE);                                //ADC¹Ø±Õ
}
 
void ADC_IN8_Init(void)
{
    
    CDIF_CR_INTF_EN_Setable(ENABLE);                        //¿çµçÔ´Óò½Ó¿ÚʹÄÜ
    VRTC_Init_RCMF_Trim();
    VRTC_RCMFCR_EN_Setable(ENABLE);
    VRTC_ADCCR_CKS_Set(VRTC_ADCCR_CKS_RCMF_2);                //ADC¹¤×÷ʱÖÓÑ¡Ôñ
    VRTC_ADCCR_CKE_Setable(ENABLE);                            //ADC¹¤×÷ʱÖÓʹÄÜ
    ADC_CFGR_BUFSEL_Set(ADC_CFGR_BUFSEL_ADC_IN8);            //ADCÊäÈëͨµÀÑ¡Ôñ
  
    ADC_CFGR_BUFEN_Setable(ENABLE);                            //ADCÊäÈëͨµÀbufferʹÄÜ/½ûÖ¹
    ADC_CR_MODE_Set(ADC_CR_MODE_EXTERNAL);                    //ADC¹¤×÷ģʽѡÔñÍⲿÀÛ¼ÓÆ÷
    ADC_CR_RSTCTRL_EN_Setable(ENABLE);                        //ÔÊÐí»ý·ÖÆ÷Íⲿ¸´Î»
    ADC_CFGR_ACC_PERIOD_Set(ADC_CFGR_ACC_PERIOD_14BITS);    //ÍⲿÀÛ¼ÓÆ÷ÀÛ¼ÓÖÜÆÚÅäÖÃ
    ADC_CR_HPEN_Set(ADC_CR_HPEN_1MHZ);
    
  ADC_TRIM_Write(0X7FF);                                    //adcƵÂÊ1M Ê± ¼ÆËãʱ¼ä4ms
//    ADC_TRIM_Write(0X3FF);                                    //adcƵÂÊ1M Ê± ¼ÆËãʱ¼ä2ms
//    ADC_TRIM_Write(0X1FF);                                    //adcƵÂÊ1M Ê± ¼ÆËãʱ¼ä1ms
  
    ADC_CR_ACC_IE_Setable(DISABLE);                            //ÍⲿÀÛ¼ÓģʽÖжϽûÖ¹
    ADC_CR_EN_Setable(DISABLE);                                //ADC¹Ø±Õ
}
 
void ADC_Temp_Init(void)
{
    CDIF_CR_INTF_EN_Setable(ENABLE);                        //¿çµçÔ´Óò½Ó¿ÚʹÄÜ
    VRTC_Init_RCMF_Trim();
    VRTC_RCMFCR_EN_Setable(ENABLE);
    VRTC_ADCCR_CKS_Set(VRTC_ADCCR_CKS_RCMF_2);                //ADC¹¤×÷ʱÖÓÑ¡Ôñ
    VRTC_ADCCR_CKE_Setable(ENABLE);                            //ADC¹¤×÷ʱÖÓʹÄÜ
    ADC_CFGR_BUFSEL_Set(ADC_CFGR_BUFSEL_TS);                //ADCÊäÈëͨµÀÑ¡Ôñ
  
    ADC_CFGR_BUFEN_Setable(ENABLE);                            //ADCÊäÈëͨµÀbufferʹÄÜ/½ûÖ¹
    
    ADC_CR_MODE_Set(ADC_CR_MODE_EXTERNAL);                                //ADC¹¤×÷ģʽѡÔñÍⲿÀÛ¼ÓÆ÷
    
    ADC_CR_RSTCTRL_EN_Setable(ENABLE);                        //ÔÊÐí»ý·ÖÆ÷Íⲿ¸´Î»  ÄÚ²¿Ä£Ê½disable  Íⲿģʽenable
    
    ADC_TRIM_Write(0x7FF);                      //ÍⲿÀۼƠ  ±ØÐëд0x7FF
 
    ADC_CFGR_ACC_PERIOD_Set(ADC_CFGR_ACC_PERIOD_14BITS);  //ÍⲿÀÛ¼ÓÆ÷ÀÛ¼ÓÖÜÆÚÅäÖàÄÚ²¿ÀÛ¼Ó¿É×¢ÊÍ
    
    ADC_CR_ACC_IE_Setable(DISABLE);                                        //ÍⲿÀÛ¼ÓģʽÖжϽûÖ¹
 
    ADC_CR_EN_Setable(DISABLE);                                //ADC¹Ø±Õ    
}
 
 
uint32_t adc_vol_cal(uint32_t adc_data)
{
    int32_t Volt = 0;
    Volt = (adc_data*const_adc_Slope/1000.0)+const_adc_Offset/100.0;    
 
    if(Volt<0) //VoltΪ¸ºÖµ
    {
            Volt=0;
    }
    return Volt;
}
 
float adc_tem_cal(uint32_t adc_data)
{
    float T = 0;
//ÄÚ²¿ÀÛ¼Ó¼ÆËã
//    if(adc_data >const_T_30 )
//    {
//        T=(adc_data-const_T_30)/const_TmpeK+const_30_top;
//    }
//    else
//    {
//        T=const_30_top-(const_T_30-adc_data)/const_TmpeK;
//    }
    
//ÍⲿÀۼƼÆËã
    if(adc_data >const_T_30_14BIT )
    {
        T=(adc_data-const_T_30_14BIT)/const_TmpeK_14BIT+const_30_top-0.5;
    }
    else
    {
        T=const_30_top-(const_T_30_14BIT-adc_data)/const_TmpeK_14BIT-0.5;
    }
  return T;    
}
 
uint08 adc_wait_finish(void)
{
    uint32 timeout=0;
    do
    {
    if(SET == ADC_ISR_ACC_IF_Chk()) return 0;//ÍⲿÀÛ¼Ó
    }while(timeout++ < 0xFFFFFFFFU);
    return 1;//³¬Ê±
}
 
uint32_t Get_AdcValue(void)
{
    volatile int32_t fVlotage = 0;
    uint32 fTempADC = 0;
    ADC_CR_EN_Setable(ENABLE);           //ADCÆô¶¯
 
    ADC_ISR_ACC_IF_Clr();                //ÍⲿÀÛ¼ÓÇå³ýÖжϱêÖ¾
    if(0 == adc_wait_finish())        //µÈ´ýת»»Íê³É
        fTempADC = ADC_DR_Read();    //¶ÁÈ¡ADÖµ
    else
        return 0;
    fVlotage = adc_vol_cal(fTempADC);//ADֵת»»Îªµçѹ,µçÔ´µçѹΪ5V
 
    return fVlotage;
}
 
float Get_AdcTempValue(void)
{
    float Temperature = 0;
    uint32 fTempADC = 0;
    ADC_CR_EN_Setable(ENABLE);           //ADCÆô¶¯
 
    ADC_ISR_ACC_IF_Clr();                //ÍⲿÀÛ¼ÓÇå³ýÖжϱêÖ¾
    if(0 == adc_wait_finish())        //µÈ´ýת»»Íê³É
        fTempADC = ADC_DR_Read();    //¶ÁÈ¡ADÖµ
    else
        return 0;
    Temperature = adc_tem_cal(fTempADC);
    
    return Temperature;
}