/**
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******************************************************************************
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* @file fm33a0xxev_bt.c
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* @author FM33A0XXEV Application Team
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* @version V1.0.0
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* @date 16-April-2020
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* @brief This file provides firmware functions to manage the following
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* functionalities of....:
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*
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "fm33a0xxev_bt.h"
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/** @addtogroup fm33a0xxev_StdPeriph_Driver
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* @{
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*/
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/** @defgroup BT
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* @brief BT driver modules
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* @{
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*/
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/* ¸ß8λ¼ÆÊýÆ÷£¨BT1H»òBT2H£©Æô¶¯¿ØÖÆ Ïà¹Øº¯Êý */
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void BTx_CR1_CHEN_Setable(BT_Type* BTx, FunState NewState)
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{
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if (NewState == ENABLE)
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{
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BTx->CR1 |= (BTx_CR1_CHEN_Msk);
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}
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else
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{
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BTx->CR1 &= ~(BTx_CR1_CHEN_Msk);
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}
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}
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FunState BTx_CR1_CHEN_Getable(BT_Type* BTx)
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{
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if (BTx->CR1 & (BTx_CR1_CHEN_Msk))
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{
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return ENABLE;
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}
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else
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{
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return DISABLE;
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}
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}
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/* µÍ8λ¼ÆÊýÆ÷£¨BT1L»òBT2L£©Æô¶¯¿ØÖÆ
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(Counter-Lowend enable)
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1£ºÆô¶¯µÍ8bit¼ÆÊýÆ÷£¬ÔÚ¼ÆÊýÆ÷ģʽÏÂÆô¶¯Ê±½«Ô¤ÖÃÊýÖµºÍ¼ÓÔØÖµ·Ö±ð¼ÓÔØÖÁ¼ÆÊýÆ÷ºÍ±È½Ï¼Ä´æÆ÷£»²¶×½Ä£Ê½ÏÂÆô¶¯Ê±¼ÆÊýÆ÷ÓÉÁ㿪ʼ×ÔÓɼÆÊý£¬¼ÆÊýµ½0xFFFFºó²úÉúÒç³öÐźÅÈ»ºóÓÉÁ㿪ʼÖØмÆÊý£¬²¶×½¹¦ÄÜÖ»¹¤×÷ÔÚ16λģʽ£»ÔÚ16λµÄ¶¨Ê±/¼ÆÊýºÍ²¶×½Ä£Ê½ÏÂCHEN×÷Ϊ¼ÆÊýÆ÷µÄÆô¶¯¿ØÖÆ£¬CLEN×Ô¶¯Ê§Ð§
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0£ºÍ£Ö¹µÍ8bit¼ÆÊýÆ÷¼ÆÊý Ïà¹Øº¯Êý */
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void BTx_CR1_CLEN_Setable(BT_Type* BTx, FunState NewState)
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{
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if (NewState == ENABLE)
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{
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BTx->CR1 |= (BTx_CR1_CLEN_Msk);
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}
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else
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{
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BTx->CR1 &= ~(BTx_CR1_CLEN_Msk);
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}
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}
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FunState BTx_CR1_CLEN_Getable(BT_Type* BTx)
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{
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if (BTx->CR1 & (BTx_CR1_CLEN_Msk))
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{
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return ENABLE;
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}
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else
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{
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return DISABLE;
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}
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}
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/* ¹¤×÷ģʽѡÔñ (work mode)
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1£º16λ²¶×½Ä£Ê½
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0£º8λ¶¨Ê±/¼ÆÊýģʽ£¬Èô¸ßλ¼ÆÊýÆ÷¼ÆÊýÔ´Ñ¡ÔñΪµÍλ¼ÆÊýÆ÷µÄÒç³öÐźţ¬Ôò¿ÉʵÏÖ16λ¶¨Ê±/¼ÆÊýģʽ Ïà¹Øº¯Êý */
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void BTx_CR1_MODE_Set(BT_Type* BTx, uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = BTx->CR1 ;
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tmpreg &= ~(BTx_CR1_MODE_Msk);
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tmpreg |= (SetValue & BTx_CR1_MODE_Msk);
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BTx->CR1 = tmpreg;
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}
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uint32_t BTx_CR1_MODE_Get(BT_Type* BTx)
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{
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return (BTx->CR1 & BTx_CR1_MODE_Msk);
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}
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/* ¼ÆÊýģʽϵļÆÊýÑغÍÖÜÆÚ²¶×½Ê±µÄ²¶×½ÑØÑ¡Ôñλ (edge select)
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1£º¼ÆÊýģʽ²ÉÑù¼ÆÊýԴϽµÑØ£¬ÖÜÆÚ²¶×½Ä£Ê½Ê±ÏÂÑز¶×½
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0£º¼ÆÊýģʽ²ÉÑù¼ÆÊýÔ´ÉÏÉýÑØ£¬ÖÜÆÚ²¶×½Ä£Ê½Ê±ÉÏÑز¶×½
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×¢£º²»Ö§³ÖϵͳʱÖÓµÄϽµÑؼÆÊý£¬²¶×½Ô´ºÍ¼ÆÊýԴΪϵͳʱÖÓʱѡÔñϽµÑؽ«²»»áÓÐЧ¼ÆÊý¡£ Ïà¹Øº¯Êý */
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void BTx_CR1_EDGESEL_Set(BT_Type* BTx, uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = BTx->CR1 ;
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tmpreg &= ~(BTx_CR1_EDGESEL_Msk);
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tmpreg |= (SetValue & BTx_CR1_EDGESEL_Msk);
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BTx->CR1 = tmpreg;
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}
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uint32_t BTx_CR1_EDGESEL_Get(BT_Type* BTx)
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{
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return (BTx->CR1 & BTx_CR1_EDGESEL_Msk);
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}
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/* ²¶×½Ä£Ê½¿ØÖÆ£¨Ö»ÔÚ²¶×½Ä£Ê½ÏÂÓÐЧ£©(capture mode)
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1£ºÂö³å¿í¶È²¶×½
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0£ºÂö³åÖÜÆÚ²¶×½ Ïà¹Øº¯Êý */
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void BTx_CR1_CAPMOD_Set(BT_Type* BTx, uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = BTx->CR1 ;
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tmpreg &= ~(BTx_CR1_CAPMOD_Msk);
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tmpreg |= (SetValue & BTx_CR1_CAPMOD_Msk);
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BTx->CR1 = tmpreg;
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}
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uint32_t BTx_CR1_CAPMOD_Get(BT_Type* BTx)
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{
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return (BTx->CR1 & BTx_CR1_CAPMOD_Msk);
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}
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/* ´øÇåÁ㲶׽ģʽ¿ØÖÆ (capture clear)
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1£º²»ÂÛÔÚÂö³å¿í¶È»¹ÊÇÖÜÆÚ²¶×½Çé¿öÏ£¬²¶×½µ½µÚÒ»¸öÑغ󽫼ÆÊýÆ÷ÇåÁã²úÉúÖжϣ¬²¶×½µ½µÚ¶þ¸öÑغóËø´æ£¨Ëø´æµ½¸ßµÍλԤÖÃÊý¼Ä´æÆ÷£©¼ÆÊýÖµ²¢Í¬Ê±ÇåÁã¼ÆÊýÆ÷
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0£º²¶×½²»ÇåÁ㣬¼ÆÊýÆ÷Ò»Ö±×ÔÓɼÆÊý Ïà¹Øº¯Êý */
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void BTx_CR1_CAPCLR_Setable(BT_Type* BTx, FunState NewState)
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{
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if (NewState == ENABLE)
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{
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BTx->CR1 |= (BTx_CR1_CAPCLR_Msk);
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}
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else
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{
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BTx->CR1 &= ~(BTx_CR1_CAPCLR_Msk);
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}
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}
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FunState BTx_CR1_CAPCLR_Getable(BT_Type* BTx)
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{
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if (BTx->CR1 & (BTx_CR1_CAPCLR_Msk))
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{
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return ENABLE;
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}
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else
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{
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return DISABLE;
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}
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}
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/* µ¥´Î²¶×½¿ØÖÆ (capture once)
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1£ºµ¥´Î²¶×½ÓÐЧ£¬ÔÚ²¶×½µ½Ò»´ÎÂö³å¿í¶È»òÂö³åÖÜÆÚºó¼ÆÊýÆ÷Í£Ö¹£¬ÈôÐèÒªÔٴβ¶×½ÐèÖØÐÂÆô¶¯
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0£ºÁ¬Ðø²¶×½ Ïà¹Øº¯Êý */
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void BTx_CR1_CAPONCE_Set(BT_Type* BTx, uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = BTx->CR1 ;
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tmpreg &= ~(BTx_CR1_CAPONCE_Msk);
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tmpreg |= (SetValue & BTx_CR1_CAPONCE_Msk);
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BTx->CR1 = tmpreg;
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}
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uint32_t BTx_CR1_CAPONCE_Get(BT_Type* BTx)
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{
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return (BTx->CR1 & BTx_CR1_CAPONCE_Msk);
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}
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/* PWMģʽÊä³ö (pulse width modulation)
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1£ºPWMÊä³öʹÄÜ
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0£ºPWM Êä³ö²»Ê¹ÄÜ Ïà¹Øº¯Êý */
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void BTx_CR1_PWM_Setable(BT_Type* BTx, FunState NewState)
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{
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if (NewState == ENABLE)
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{
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BTx->CR1 |= (BTx_CR1_PWM_Msk);
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}
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else
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{
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BTx->CR1 &= ~(BTx_CR1_PWM_Msk);
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}
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}
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FunState BTx_CR1_PWM_Getable(BT_Type* BTx)
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{
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if (BTx->CR1 & (BTx_CR1_PWM_Msk))
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{
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return ENABLE;
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}
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else
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{
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return DISABLE;
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}
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}
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/* ¼ÆÊýÆ÷ÄÚ²¿¼ÆÊýÔ´ÐźÅÑ¡Ôñ (signal group2 select)
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1£ºÄÚ²¿¼ÆÊýÔ´ÐźÅÑ¡ÔñGroup2
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0£ºÄÚ²¿¼ÆÊýÔ´ÐźÅÑ¡ÔñGroup1 Ïà¹Øº¯Êý */
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void BTx_CR2_SIG2SEL_Set(BT_Type* BTx, uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = BTx->CR2 ;
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tmpreg &= ~(BTx_CR2_SIG2SEL_Msk);
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tmpreg |= (SetValue & BTx_CR2_SIG2SEL_Msk);
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BTx->CR2 = tmpreg;
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}
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uint32_t BTx_CR2_SIG2SEL_Get(BT_Type* BTx)
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{
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return (BTx->CR2 & BTx_CR2_SIG2SEL_Msk);
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}
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/* ¼ÆÊýÆ÷ÄÚ²¿²¶×½Ô´ÐźÅÑ¡Ôñ (signal group1 select)
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1£ºÄÚ²¿²¶×½Ô´ÐźÅÑ¡ÔñGroup1
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0£ºÄÚ²¿²¶×½Ô´ÐźÅÑ¡ÔñGroup2 Ïà¹Øº¯Êý */
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void BTx_CR2_SIG1SEL_Set(BT_Type* BTx, uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = BTx->CR2 ;
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tmpreg &= ~(BTx_CR2_SIG1SEL_Msk);
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tmpreg |= (SetValue & BTx_CR2_SIG1SEL_Msk);
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BTx->CR2 = tmpreg;
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}
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uint32_t BTx_CR2_SIG1SEL_Get(BT_Type* BTx)
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{
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return (BTx->CR2 & BTx_CR2_SIG1SEL_Msk);
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}
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/* ¸ß8λ¼ÆÊýÆ÷¼ÆÊýÔ´Ñ¡Ôñ (Counter Highend source select)
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00/11£ºÑ¡ÔñET1µÄµÍλ¼ÆÊýÆ÷µÄÒç³öÐźţ¬ÓëµÍλ¼ÆÊýÆ÷×é³É16λ¼ÆÊýÆ÷
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01£ºÑ¡ÔñÄÚ²¿²¶×½Ô´ÐźÅ
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10£ºÑ¡ÔñÄÚ²¿¼ÆÊýÔ´ÐźŻòÍⲿDIRÊäÈë×éºÏÐźŠÏà¹Øº¯Êý */
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void BTx_CR2_CNTHSEL_Set(BT_Type* BTx, uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = BTx->CR2 ;
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tmpreg &= ~(BTx_CR2_CNTHSEL_Msk);
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tmpreg |= (SetValue & BTx_CR2_CNTHSEL_Msk);
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BTx->CR2 = tmpreg;
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}
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uint32_t BTx_CR2_CNTHSEL_Get(BT_Type* BTx)
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{
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return (BTx->CR2 & BTx_CR2_CNTHSEL_Msk);
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}
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/* ÍⲿÊäÈëDIR¿ØÖÆʹÄÜ¡£Í¨³£µçÁ¿Âö³åÊä³öʱͬʱ»áÊä³öÒ»¸öÓɸߵ͵çƽָʾÕý·´ÏòµÄ·½ÏòÐźÅDIR¡£µç·½«Í¨¹ýDIRÐźŵçƽµÄ¸ßµÍ£¬·Ö±ð¿ØÖƸßλ¼ÆÊýÆ÷ºÍµÍλ¼ÆÊýÆ÷¼ÆÊýʹÄÜ£¬ÒÔʵÏÖÕë¶ÔÕýÏò¡¢·´ÏòÂö³åµÄ¸÷ÖÖ¼ÆÊý¹¦ÄÜ (direction bit enable)
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1£ºÍⲿÊäÈëµÄDIRÐźÅÓÐЧ£¬´Ëʱ¸ßµÍλ¼ÆÊýÆ÷ÊÇ·ñ¼ÆÊý¿ÉÓÉÍⲿÊäÈëµÄDIRÐźſØÖÆ¡£
|
0£ºÍⲿÊäÈëµÄDIRÐźÅÎÞЧ£¬´Ëʱ¸ßµÍλ¼ÆÊýÆ÷ÊÇ·ñ¼ÆÊý½«ÓÉÄÚ²¿¿ØÖÆÐźſØÖÆ¡£ Ïà¹Øº¯Êý */
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void BTx_CR2_DIREN_Setable(BT_Type* BTx, FunState NewState)
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{
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if (NewState == ENABLE)
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{
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BTx->CR2 |= (BTx_CR2_DIREN_Msk);
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}
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else
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{
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BTx->CR2 &= ~(BTx_CR2_DIREN_Msk);
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}
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}
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FunState BTx_CR2_DIREN_Getable(BT_Type* BTx)
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{
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if (BTx->CR2 & (BTx_CR2_DIREN_Msk))
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{
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return ENABLE;
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}
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else
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{
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return DISABLE;
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}
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}
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/* ÄÚ²¿DIR¿ØÖÆÐźţ¬µ±DIRENΪ0£¬¼´ÍⲿÊäÈëDIR¿ØÖÆÎÞЧʱ£¬¿ÉÓɸÃÐźŴúÌæDIRÊäÈ룬ֱ½Ó¿ØÖÆÄÚ²¿¼ÆÊýÆ÷µÄ¼ÆÊý¡£µ±ÐèÒªÍⲿDIRÊäÈ룬¼´DIRENΪ1ʱ£¬¸ÃλӦÉèÖÃΪ0 (set direction)
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1£ºÄÚ²¿DIRÐźÅΪ¸ßµçƽ£¬Ôò¸ß8λ¼ÆÊýÆ÷¼ÆÊý Ïà¹Øº¯Êý */
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void BTx_CR2_STDIR_Setable(BT_Type* BTx, FunState NewState)
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{
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if (NewState == ENABLE)
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{
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BTx->CR2 |= (BTx_CR2_STDIR_Msk);
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}
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else
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{
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BTx->CR2 &= ~(BTx_CR2_STDIR_Msk);
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}
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}
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FunState BTx_CR2_STDIR_Getable(BT_Type* BTx)
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{
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if (BTx->CR2 & (BTx_CR2_STDIR_Msk))
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{
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return ENABLE;
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}
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else
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{
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return DISABLE;
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}
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}
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/* µÍλ¼ÆÊýÆ÷¼ÆÊýʹÄÜ¿ØÖÆÑ¡ÔñÐźŠ(source select)
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1µÍλ¼ÆÊýÆ÷¼ÆÊýʹÄܶËÑ¡Ôò³£Ê¹ÄÜ¡£´ËʱµÍλ¼ÆÊýÆ÷¼ÆÊý²»ÊÜDIR¿ØÖÆ£¬¿É½«Õý·´ÏòËùÓÐÂö³åÒ»²¢¼ÆÊý
|
0£ºµÍλ¼ÆÊýÆ÷¼ÆÊýʹÄܶËÑ¡ÔòÓɼĴæÆ÷STDIR»òÍⲿEX_SIG2ÊäÈë¿ØÖÆ¡£ Ïà¹Øº¯Êý */
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void BTx_CR2_SRCSEL_Setable(BT_Type* BTx, FunState NewState)
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{
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if (NewState == ENABLE)
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{
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BTx->CR2 |= (BTx_CR2_SRCSEL_Msk);
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}
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else
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{
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BTx->CR2 &= ~(BTx_CR2_SRCSEL_Msk);
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}
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}
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FunState BTx_CR2_SRCSEL_Getable(BT_Type* BTx)
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{
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if (BTx->CR2 & (BTx_CR2_SRCSEL_Msk))
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{
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return ENABLE;
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}
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else
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{
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return DISABLE;
|
}
|
}
|
|
/* ÊäÈëÐźÅ2¼«ÐÔÑ¡Ôñ (direction polarity)
|
1£º¶ÔÍⲿÊäÈëDIRÐźÅEX_SIG2·´Ïò
|
0£º¶ÔÍⲿÊäÈëDIRÐźÅEX_SIG2²»·´Ïò Ïà¹Øº¯Êý */
|
void BTx_CR2_DIRPO_Set(BT_Type* BTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
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tmpreg = BTx->CR2 ;
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tmpreg &= ~(BTx_CR2_DIRPO_Msk);
|
tmpreg |= (SetValue & BTx_CR2_DIRPO_Msk);
|
BTx->CR2 = tmpreg;
|
}
|
|
uint32_t BTx_CR2_DIRPO_Get(BT_Type* BTx)
|
{
|
return (BTx->CR2 & BTx_CR2_DIRPO_Msk);
|
}
|
|
/* RTCOUT2ÐźÅÑ¡Ôñ¿ØÖÆ2 (RTCOUT2 source select)
|
00 = 32768Hz£¬XTLFʱÖÓÊä³ö
|
01 = RTCSec£¬ÓÉRTCÄ£¿éÊä³öµÄÃëÐźÅ
|
10 = RTCMin£¬ÓÉRTCÄ£¿éÊä³öµÄ·ÖÖÓÐźÅ
|
11 = RFU Ïà¹Øº¯Êý */
|
void BTx_CFGR1_RTCSEL2_Set(BT_Type* BTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = BTx->CFGR1 ;
|
tmpreg &= ~(BTx_CFGR1_RTCSEL2_Msk);
|
tmpreg |= (SetValue & BTx_CFGR1_RTCSEL2_Msk);
|
BTx->CFGR1 = tmpreg;
|
}
|
|
uint32_t BTx_CFGR1_RTCSEL2_Get(BT_Type* BTx)
|
{
|
return (BTx->CFGR1 & BTx_CFGR1_RTCSEL2_Msk);
|
}
|
|
/* RTCOUT1ÐźÅÑ¡Ôñ¿ØÖÆ1 (RTCOUT1 source select)
|
00 = 32768Hz£¬XTLFʱÖÓÊä³ö
|
01 = RTCSec£¬ÓÉRTCÄ£¿éÊä³öµÄÃëÐźÅ
|
10 = RTCMin£¬ÓÉRTCÄ£¿éÊä³öµÄ·ÖÖÓÐźÅ
|
11 = RFU Ïà¹Øº¯Êý */
|
void BTx_CFGR1_RTCSEL1_Set(BT_Type* BTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = BTx->CFGR1 ;
|
tmpreg &= ~(BTx_CFGR1_RTCSEL1_Msk);
|
tmpreg |= (SetValue & BTx_CFGR1_RTCSEL1_Msk);
|
BTx->CFGR1 = tmpreg;
|
}
|
|
uint32_t BTx_CFGR1_RTCSEL1_Get(BT_Type* BTx)
|
{
|
return (BTx->CFGR1 & BTx_CFGR1_RTCSEL1_Msk);
|
}
|
|
/* Group2ÐźÅÑ¡Ôñ¿ØÖÆ (Group2 source select)
|
00 = APBCLK
|
01 = RTCOUT2
|
10 = IN_SIG2£¬ÄÚ²¿ÊäÈëÐźÅ2
|
11 = EX_SIG2£¬ÍⲿÊäÈëÐźÅ2
|
×¢£º²»Ö§³ÖAPBCLKµÄϽµÑز¶×½ºÍ¼ÆÊý£¬²¶×½Ô´ºÍ¼ÆÊýԴΪAPBCLKʱѡÔñϽµÑؽ«²»»áÓÐЧ²¶×½ºÍ¼ÆÊý¡£ Ïà¹Øº¯Êý */
|
void BTx_CFGR1_GRP2SEL_Set(BT_Type* BTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = BTx->CFGR1 ;
|
tmpreg &= ~(BTx_CFGR1_GRP2SEL_Msk);
|
tmpreg |= (SetValue & BTx_CFGR1_GRP2SEL_Msk);
|
BTx->CFGR1 = tmpreg;
|
}
|
|
uint32_t BTx_CFGR1_GRP2SEL_Get(BT_Type* BTx)
|
{
|
return (BTx->CFGR1 & BTx_CFGR1_GRP2SEL_Msk);
|
}
|
|
/* Group1ÐźÅÑ¡Ôñ¿ØÖÆ£¨¿É×÷Ϊ²¶×½Ä£Ê½Ï²ÉÑùʱÖÓÑ¡Ôñ£¬Í¬Ê±¿É×÷ΪÐźŲ¶×½Ô´£©(Group1 source select)
|
00 = APBCLK
|
01 = RTCOUT1
|
10 = IN_SIG1£¬ÄÚ²¿ÊäÈëÐźÅ1
|
11 = EX_SIG1£¬ÍⲿÊäÈëÐźÅ1
|
×¢£º²»Ö§³ÖAPBCLKµÄϽµÑز¶×½ºÍ¼ÆÊý£¬²¶×½Ô´ºÍ¼ÆÊýԴΪAPBCLKʱѡÔñϽµÑؽ«²»»áÓÐЧ²¶×½ºÍ¼ÆÊý¡£ Ïà¹Øº¯Êý */
|
void BTx_CFGR1_GRP1SEL_Set(BT_Type* BTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = BTx->CFGR1 ;
|
tmpreg &= ~(BTx_CFGR1_GRP1SEL_Msk);
|
tmpreg |= (SetValue & BTx_CFGR1_GRP1SEL_Msk);
|
BTx->CFGR1 = tmpreg;
|
}
|
|
uint32_t BTx_CFGR1_GRP1SEL_Get(BT_Type* BTx)
|
{
|
return (BTx->CFGR1 & BTx_CFGR1_GRP1SEL_Msk);
|
}
|
|
/* ÍⲿÊäÈëÐźÅÑ¡Ôñ¿ØÖÆ2 (external source select2)
|
00 = BT1_IN0/BT2_IN0
|
01 = BT1_IN1/BT2_IN1
|
10 = BT1_IN2/BT2_IN2
|
11 = BT1_IN3/BT2_IN3 Ïà¹Øº¯Êý */
|
void BTx_CFGR2_EXSEL2_Set(BT_Type* BTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = BTx->CFGR2 ;
|
tmpreg &= ~(BTx_CFGR2_EXSEL2_Msk);
|
tmpreg |= (SetValue & BTx_CFGR2_EXSEL2_Msk);
|
BTx->CFGR2 = tmpreg;
|
}
|
|
uint32_t BTx_CFGR2_EXSEL2_Get(BT_Type* BTx)
|
{
|
return (BTx->CFGR2 & BTx_CFGR2_EXSEL2_Msk);
|
}
|
|
/* ÍⲿÊäÈëÐźÅÑ¡Ôñ¿ØÖÆ1 (external source select1)
|
00 = BT1_IN0/BT2_IN0
|
01 = BT1_IN1/BT2_IN1
|
10 = BT1_IN2/BT2_IN2
|
11 = BT1_IN3/BT2_IN3 Ïà¹Øº¯Êý */
|
void BTx_CFGR2_EXSEL1_Set(BT_Type* BTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = BTx->CFGR2 ;
|
tmpreg &= ~(BTx_CFGR2_EXSEL1_Msk);
|
tmpreg |= (SetValue & BTx_CFGR2_EXSEL1_Msk);
|
BTx->CFGR2 = tmpreg;
|
}
|
|
uint32_t BTx_CFGR2_EXSEL1_Get(BT_Type* BTx)
|
{
|
return (BTx->CFGR2 & BTx_CFGR2_EXSEL1_Msk);
|
}
|
|
/* ÄÚ²¿ÊäÈëÐźÅÑ¡Ôñ¿ØÖÆ2 (internal source select 2)
|
00 = UART_RX3/UART_RX3
|
01 = UART_RX4/UART_RX4
|
10 = UART_RX5/UART_RX5
|
11 = RCLP/BT1_OUT Ïà¹Øº¯Êý */
|
void BTx_CFGR2_INSEL2_Set(BT_Type* BTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = BTx->CFGR2 ;
|
tmpreg &= ~(BTx_CFGR2_INSEL2_Msk);
|
tmpreg |= (SetValue & BTx_CFGR2_INSEL2_Msk);
|
BTx->CFGR2 = tmpreg;
|
}
|
|
uint32_t BTx_CFGR2_INSEL2_Get(BT_Type* BTx)
|
{
|
return (BTx->CFGR2 & BTx_CFGR2_INSEL2_Msk);
|
}
|
|
/* ÄÚ²¿ÊäÈëÐźÅÑ¡Ôñ¿ØÖÆ1 (internal source select 1)
|
00 = UART_RX0/UART_RX0
|
01 = UART_RX1/UART_RX1
|
10 = UART_RX2/UART_RX2
|
11 = RCLP/RCLP Ïà¹Øº¯Êý */
|
void BTx_CFGR2_INSEL1_Set(BT_Type* BTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = BTx->CFGR2 ;
|
tmpreg &= ~(BTx_CFGR2_INSEL1_Msk);
|
tmpreg |= (SetValue & BTx_CFGR2_INSEL1_Msk);
|
BTx->CFGR2 = tmpreg;
|
}
|
|
uint32_t BTx_CFGR2_INSEL1_Get(BT_Type* BTx)
|
{
|
return (BTx->CFGR2 & BTx_CFGR2_INSEL1_Msk);
|
}
|
|
/* ÊäÈëGroup1µÄÔ¤·ÖƵ¼Ä´æÆ÷ (Group1 input signal prescaler)
|
·ÖƵÊý=£¨X+1£©£¬¼´00±íʾ1·ÖƵ£¬FF±íʾ256·ÖƵ¡£Ô¤·ÖƵºóµÄÐźŶ¼Îªµ¥ÖÜÆÚÂö³åµÄÐÎʽ£¬Õ¼¿Õ±È1:X Ïà¹Øº¯Êý */
|
void BTx_PRES_Write(BT_Type* BTx, uint32_t SetValue)
|
{
|
BTx->PRES = (SetValue & BTx_PRES_PRESCALE_Msk);
|
}
|
|
uint32_t BTx_PRES_Read(BT_Type* BTx)
|
{
|
return (BTx->PRES & BTx_PRES_PRESCALE_Msk);
|
}
|
|
/* ¸ßλ¼ÓÔØ¿ØÖÆ (Counter highend load enable)
|
д1½«Ô¤ÖÃÊý¼Ä´æÆ÷ET1PRESETHºÍ¼ÓÔؼĴæÆ÷ET1LOADH·Ö±ð¼ÓÔص½¼ÆÊýÖµ¼Ä´æÆ÷ET1CNTHºÍ±È½Ï¼Ä´æÆ÷ET1CMPH£¬Ð´0ÎÞЧ£¬¸ÃλӲ¼þ×Ô¶¯Çå0¡£ÔÚ16λµÄ¶¨Ê±/¼ÆÊýÏÂLHEN×÷Ϊ¼ÆÊýÆ÷µÄ¼ÓÔØ¿ØÖÆ£¬LLEN×Ô¶¯Ê§Ð§ Ïà¹Øº¯Êý */
|
void BTx_LOADCR_LHEN_Setable(BT_Type* BTx, FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
BTx->LOADCR |= (BTx_LOADCR_LHEN_Msk);
|
}
|
else
|
{
|
BTx->LOADCR &= ~(BTx_LOADCR_LHEN_Msk);
|
}
|
}
|
|
FunState BTx_LOADCR_LHEN_Getable(BT_Type* BTx)
|
{
|
if (BTx->LOADCR & (BTx_LOADCR_LHEN_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* µÍλ¼ÓÔØ¿ØÖÆ (Counter lowend load enable)
|
д1½«Ô¤ÖÃÊý¼Ä´æÆ÷PRESETLºÍ¼ÓÔؼĴæÆ÷LOADL·Ö±ð¼ÓÔص½¼ÆÊýÖµ¼Ä´æÆ÷ET1CNTLºÍ±È½Ï¼Ä´æÆ÷ET1CMPL£¬Ð´0ÎÞЧ£¬¸ÃλӲ¼þ×Ô¶¯Çå0¡£ÔÚ16λµÄ¶¨Ê±/¼ÆÊýÏÂLHEN×÷Ϊ¼ÆÊýÆ÷µÄ¼ÓÔØ¿ØÖÆ£¬LLEN×Ô¶¯Ê§Ð§ Ïà¹Øº¯Êý */
|
void BTx_LOADCR_LLEN_Setable(BT_Type* BTx, FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
BTx->LOADCR |= (BTx_LOADCR_LLEN_Msk);
|
}
|
else
|
{
|
BTx->LOADCR &= ~(BTx_LOADCR_LLEN_Msk);
|
}
|
}
|
|
FunState BTx_LOADCR_LLEN_Getable(BT_Type* BTx)
|
{
|
if (BTx->LOADCR & (BTx_LOADCR_LLEN_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* ¼ÆÊýÆ÷µÍλ¼ÆÊýÖµ¼Ä´æÆ÷ (counter lowend)
|
LLENÓÐЧʱ¼ÓÔØÔ¤ÖÃÊýµ½¸Ã¼Ä´æÆ÷¡£ Ïà¹Øº¯Êý */
|
uint32_t BTx_CNTL_Read(BT_Type* BTx)
|
{
|
return (BTx->CNTL & BTx_CNTL_CNTL_Msk);
|
}
|
|
/* ¼ÆÊýÆ÷¸ßλ¼ÆÊýÖµ¼Ä´æÆ÷ (counter highend)
|
LHENÓÐЧʱ¼ÓÔØÔ¤ÖÃÊýµ½¸Ã¼Ä´æÆ÷¡£ Ïà¹Øº¯Êý */
|
uint32_t BTx_CNTH_Read(BT_Type* BTx)
|
{
|
return (BTx->CNTH & BTx_CNTH_CNTH_Msk);
|
}
|
|
/* ¼ÆÊýÆ÷¸ßλԤÖÃÊý¼Ä´æÆ÷ (preset highend)
|
ÓÃÓÚ±£´æ¸ßλ¼ÆÊýÆ÷³õÖµ£¬»ò±£´æ²¶×½½á¹û¸ß8bit Ïà¹Øº¯Êý */
|
void BTx_PRESET_PRESETH_Set(BT_Type* BTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = BTx->PRESET ;
|
tmpreg &= ~(BTx_PRESET_PRESETH_Msk);
|
tmpreg |= (SetValue & BTx_PRESET_PRESETH_Msk);
|
BTx->PRESET = tmpreg;
|
}
|
|
uint32_t BTx_PRESET_PRESETH_Get(BT_Type* BTx)
|
{
|
return (BTx->PRESET & BTx_PRESET_PRESETH_Msk);
|
}
|
|
/* ¼ÆÊýÆ÷µÍλԤÖÃÊý¼Ä´æÆ÷ (preset lowend)
|
ÓÃÓÚ±£´æµÍλ¼ÆÊýÆ÷³õÖµ£¬»ò±£´æ²¶×½½á¹ûµÍ8bit Ïà¹Øº¯Êý */
|
void BTx_PRESET_PRESETL_Set(BT_Type* BTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = BTx->PRESET ;
|
tmpreg &= ~(BTx_PRESET_PRESETL_Msk);
|
tmpreg |= (SetValue & BTx_PRESET_PRESETL_Msk);
|
BTx->PRESET = tmpreg;
|
}
|
|
uint32_t BTx_PRESET_PRESETL_Get(BT_Type* BTx)
|
{
|
return (BTx->PRESET & BTx_PRESET_PRESETL_Msk);
|
}
|
|
/* ¼ÆÊýÆ÷µÍλ¼ÓÔؼĴæÆ÷ (load lowend counter)
|
ÔÚ¼ÆÊýÆ¥Åä»òÖ´ÐмÓÔØÃüÁîʱ½«¼ÓÔؼĴæÆ÷µÄÖµ¼ÓÔØÖÁ±È½Ï¹¤×÷¼Ä´æÆ÷¡£ Ïà¹Øº¯Êý */
|
void BTx_LOADL_Write(BT_Type* BTx, uint32_t SetValue)
|
{
|
BTx->LOADL = (SetValue & BTx_LOADL_LOADL_Msk);
|
}
|
|
uint32_t BTx_LOADL_Read(BT_Type* BTx)
|
{
|
return (BTx->LOADL & BTx_LOADL_LOADL_Msk);
|
}
|
|
/* ¼ÆÊýÆ÷¸ßλ¼ÓÔؼĴæÆ÷ (load highend counter)
|
ÔÚ¼ÆÊýÆ¥Åä»òÖ´ÐмÓÔØÃüÁîʱ½«¼ÓÔؼĴæÆ÷µÄÖµ¼ÓÔØÖÁ±È½Ï¹¤×÷¼Ä´æÆ÷¡£µ±¹¤×÷ÔÚ8λ¶¨Ê±/¼ÆÊýÆ÷ģʽʱ£¬¸Ã¸ßλ¼ÓÔؼĴæÆ÷²»Ö§³Ö¼ÓÔØֵΪ0x00µÄÉèÖᣠÏà¹Øº¯Êý */
|
void BTx_LOADH_Write(BT_Type* BTx, uint32_t SetValue)
|
{
|
BTx->LOADH = (SetValue & BTx_LOADH_LOADH_Msk);
|
}
|
|
uint32_t BTx_LOADH_Read(BT_Type* BTx)
|
{
|
return (BTx->LOADH & BTx_LOADH_LOADH_Msk);
|
}
|
|
/* ¼ÆÊýÆ÷µÍλ±È½Ï¼Ä´æÆ÷ (compare lowend )
|
¼ÓÔؼĴæÆ÷µÄÖµ¼ÓÔغó½«Ð´Èë¸Ã¼Ä´æÆ÷£¬¸Ã¼Ä´æÆ÷Óë¼ÆÊýÆ÷±È½Ï£¬Èô¼ÆÊýÖµ´óÓÚµÈÓڸüĴæÆ÷µÄÖµ£¬Ôò²úÉú¼ÆÊýÆ¥ÅäÐźÅÖÁÊä³ö¿ØÖÆÄ£¿é£¬²¢²úÉúÏàÓ¦Öжϡ£ Ïà¹Øº¯Êý */
|
void BTx_CMPL_Write(BT_Type* BTx, uint32_t SetValue)
|
{
|
BTx->CMPL = (SetValue & BTx_CMPL_CMPL_Msk);
|
}
|
|
uint32_t BTx_CMPL_Read(BT_Type* BTx)
|
{
|
return (BTx->CMPL & BTx_CMPL_CMPL_Msk);
|
}
|
|
/* ¼ÆÊýÆ÷¸ßλ±È½Ï¼Ä´æÆ÷ (compare highend)
|
¼ÓÔؼĴæÆ÷µÄÖµ¼ÓÔغó½«Ð´Èë¸Ã¼Ä´æÆ÷£¬¸Ã¼Ä´æÆ÷Óë¼ÆÊýÆ÷±È½Ï£¬Èô¼ÆÊýÖµ´óÓÚµÈÓڸüĴæÆ÷µÄÖµ£¬Ôò²úÉú¼ÆÊýÆ¥ÅäÐźÅÖÁÊä³ö¿ØÖÆÄ£¿é£¬²¢²úÉúÏàÓ¦Öжϡ£ Ïà¹Øº¯Êý */
|
void BTx_CMPH_Write(BT_Type* BTx, uint32_t SetValue)
|
{
|
BTx->CMPH = (SetValue & BTx_CMPH_CMPH_Msk);
|
}
|
|
uint32_t BTx_CMPH_Read(BT_Type* BTx)
|
{
|
return (BTx->CMPH & BTx_CMPH_CMPH_Msk);
|
}
|
|
/* ¼ÆÊýÆ÷Êä³öÂö³å¿í¶È¼ÆÊýÆ÷ (output pulse width counter)
|
¸Ã¼Ä´æÆ÷ÓÃÓÚµ÷ÕûÊä³öÂö³å¿í¶È¡£¼ÆÊýʱÖÓΪ32768Hz£¬¶ÔÓ¦µÄÊä³öÂö³å¿í¶È·¶Î§Îª30.5uS~125mS¡£Êä³öÂö³å¿í¶È=(OUTCNT+1)/32768Ãë Ïà¹Øº¯Êý */
|
void BTx_OUTCNT_Write(BT_Type* BTx, uint32_t SetValue)
|
{
|
BTx->OUTCNT = (SetValue & BTx_OUTCNT_OUTCNT_Msk);
|
}
|
|
uint32_t BTx_OUTCNT_Read(BT_Type* BTx)
|
{
|
return (BTx->OUTCNT & BTx_OUTCNT_OUTCNT_Msk);
|
}
|
|
void BTx_OCR_OUTCLR_Set(BT_Type* BTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = BTx->OCR;
|
tmpreg &= ~(BTx_OCR_OUTCLR_Msk);
|
tmpreg |= (SetValue & BTx_OCR_OUTCLR_Msk);
|
BTx->OCR = tmpreg;
|
}
|
|
uint32_t BTx_OCR_OUTCLR_Get(BT_Type* BTx)
|
{
|
return (BTx->OCR & BTx_OCR_OUTCLR_Msk);
|
}
|
|
void BTx_OCR_OUTINV_Set(BT_Type* BTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = BTx->OCR;
|
tmpreg &= ~(BTx_OCR_OUTINV_Msk);
|
tmpreg |= (SetValue & BTx_OCR_OUTINV_Msk);
|
BTx->OCR = tmpreg;
|
}
|
|
uint32_t BTx_OCR_OUTINV_Get(BT_Type* BTx)
|
{
|
return (BTx->OCR & BTx_OCR_OUTINV_Msk);
|
}
|
|
void BTx_OCR_OUTMOD_Set(BT_Type* BTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = BTx->OCR;
|
tmpreg &= ~(BTx_OCR_OUTMOD_Msk);
|
tmpreg |= (SetValue & BTx_OCR_OUTMOD_Msk);
|
BTx->OCR = tmpreg;
|
}
|
|
uint32_t BTx_OCR_OUTMOD_Get(BT_Type* BTx)
|
{
|
return (BTx->OCR & BTx_OCR_OUTMOD_Msk);
|
}
|
|
void BTx_OCR_OUTSEL_Set(BT_Type* BTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = BTx->OCR;
|
tmpreg &= ~(BTx_OCR_OUTSEL_Msk);
|
tmpreg |= (SetValue & BTx_OCR_OUTSEL_Msk);
|
BTx->OCR = tmpreg;
|
}
|
|
uint32_t BTx_OCR_OUTSEL_Get(BT_Type* BTx)
|
{
|
return (BTx->OCR & BTx_OCR_OUTSEL_Msk);
|
}
|
|
/* À©Õ¹¶¨Ê±Æ÷¸ßλ±È½Ï·¢ÉúÐźŠ(compare highend interrupt enable)
|
1 = ÖжÏʹÄÜ
|
0 = ÖжϽûÖ¹ Ïà¹Øº¯Êý */
|
void BTx_IER_CMPHIE_Setable(BT_Type* BTx, FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
BTx->IER |= (BTx_IER_CMPHIE_Msk);
|
}
|
else
|
{
|
BTx->IER &= ~(BTx_IER_CMPHIE_Msk);
|
}
|
}
|
|
FunState BTx_IER_CMPHIE_Getable(BT_Type* BTx)
|
{
|
if (BTx->IER & (BTx_IER_CMPHIE_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* À©Õ¹¶¨Ê±Æ÷µÍλ±È½Ï·¢ÉúÐźŠ(compare lowend interrupt enable)
|
1 = ÖжÏʹÄÜ
|
0 = ÖжϽûÖ¹ Ïà¹Øº¯Êý */
|
void BTx_IER_CMPLIE_Setable(BT_Type* BTx, FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
BTx->IER |= (BTx_IER_CMPLIE_Msk);
|
}
|
else
|
{
|
BTx->IER &= ~(BTx_IER_CMPLIE_Msk);
|
}
|
}
|
|
FunState BTx_IER_CMPLIE_Getable(BT_Type* BTx)
|
{
|
if (BTx->IER & (BTx_IER_CMPLIE_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* ¶¨Ê±Æ÷¸ßλÒç³öÐźŠ(highend overflow interrupt enable)
|
1 = ÖжÏʹÄÜ
|
0 = ÖжϽûÖ¹ Ïà¹Øº¯Êý */
|
void BTx_IER_OVHIE_Setable(BT_Type* BTx, FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
BTx->IER |= (BTx_IER_OVHIE_Msk);
|
}
|
else
|
{
|
BTx->IER &= ~(BTx_IER_OVHIE_Msk);
|
}
|
}
|
|
FunState BTx_IER_OVHIE_Getable(BT_Type* BTx)
|
{
|
if (BTx->IER & (BTx_IER_OVHIE_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* ¶¨Ê±Æ÷µÍλÒç³öÐźŠ(lowend overflow interrupt enable)
|
1 = ÖжÏʹÄÜ
|
0 = ÖжϽûÖ¹ Ïà¹Øº¯Êý */
|
void BTx_IER_OVLIE_Setable(BT_Type* BTx, FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
BTx->IER |= (BTx_IER_OVLIE_Msk);
|
}
|
else
|
{
|
BTx->IER &= ~(BTx_IER_OVLIE_Msk);
|
}
|
}
|
|
FunState BTx_IER_OVLIE_Getable(BT_Type* BTx)
|
{
|
if (BTx->IER & (BTx_IER_OVLIE_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* ¶¨Ê±Æ÷²¶×½²úÉúÐźŠ(capture interrupt enable)
|
1 = ÖжÏʹÄÜ
|
0 = ÖжϽûÖ¹ Ïà¹Øº¯Êý */
|
void BTx_IER_CAPIE_Setable(BT_Type* BTx, FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
BTx->IER |= (BTx_IER_CAPIE_Msk);
|
}
|
else
|
{
|
BTx->IER &= ~(BTx_IER_CAPIE_Msk);
|
}
|
}
|
|
FunState BTx_IER_CAPIE_Getable(BT_Type* BTx)
|
{
|
if (BTx->IER & (BTx_IER_CAPIE_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* ²¶×½ÑØ״̬
|
1 = ²¶×½µ½ÏÂÑØ
|
0 = ²¶×½µ½ÉÏÑØ */
|
FlagStatus BTx_ISR_EDGESTA_Chk(BT_Type* BTx)
|
{
|
if (BTx->ISR & BTx_ISR_EDGESTA_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* ¶¨Ê±Æ÷¸ßλ±È½Ï·¢ÉúÐźŠ(compare highend interrupt flag)
|
1 = µ±Ç°¼ÆÊýÆ÷µÄÖµ´óÓÚµÈÓڱȽϼĴæÆ÷µÄÖµ£¬¸ÃÐźŽ«ÖØмÓÔØеļÓÔؼĴæÆ÷µÄÖµµ½¹¤×÷¼Ä´æÆ÷¡£
|
0 = µ±Ç°¼ÆÊýÆ÷µÄֵСÓڱȽϼĴæÆ÷µÄÖµ Ïà¹Øº¯Êý */
|
void BTx_ISR_CMPHIF_Clr(BT_Type* BTx)
|
{
|
BTx->ISR = BTx_ISR_CMPHIF_Msk;
|
}
|
|
FlagStatus BTx_ISR_CMPHIF_Chk(BT_Type* BTx)
|
{
|
if (BTx->ISR & BTx_ISR_CMPHIF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* ¶¨Ê±Æ÷µÍλ±È½Ï·¢ÉúÐźŠ(compare lowend interrupt flag)
|
1 = µ±Ç°¼ÆÊýÆ÷µÄÖµ´óÓÚµÈÓڱȽϼĴæÆ÷µÄÖµ£¬¸ÃÐźŽ«ÖØмÓÔØеļÓÔؼĴæÆ÷µÄÖµµ½¹¤×÷¼Ä´æÆ÷¡£
|
0 = µ±Ç°¼ÆÊýÆ÷µÄֵСÓڱȽϼĴæÆ÷µÄÖµ Ïà¹Øº¯Êý */
|
void BTx_ISR_CMPLIF_Clr(BT_Type* BTx)
|
{
|
BTx->ISR = BTx_ISR_CMPLIF_Msk;
|
}
|
|
FlagStatus BTx_ISR_CMPLIF_Chk(BT_Type* BTx)
|
{
|
if (BTx->ISR & BTx_ISR_CMPLIF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* ¶¨Ê±Æ÷¸ßλÒç³öÐźŠ(highend overflow interrupt flag)
|
1 = ²úÉú¼ÆÊýÒç³ö
|
0 = δ²úÉúÒç³ö Ïà¹Øº¯Êý */
|
void BTx_ISR_OVHIF_Clr(BT_Type* BTx)
|
{
|
BTx->ISR = BTx_ISR_OVHIF_Msk;
|
}
|
|
FlagStatus BTx_ISR_OVHIF_Chk(BT_Type* BTx)
|
{
|
if (BTx->ISR & BTx_ISR_OVHIF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* ¶¨Ê±Æ÷µÍλÒç³öÐźŠ(lowend overflow interrupt flag)
|
1 = ²úÉú¼ÆÊýÒç³ö
|
0 = δ²úÉúÒç³ö Ïà¹Øº¯Êý */
|
void BTx_ISR_OVLIF_Clr(BT_Type* BTx)
|
{
|
BTx->ISR = BTx_ISR_OVLIF_Msk;
|
}
|
|
FlagStatus BTx_ISR_OVLIF_Chk(BT_Type* BTx)
|
{
|
if (BTx->ISR & BTx_ISR_OVLIF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* ¶¨Ê±Æ÷²¶×½²úÉúÐźŠ(capture interrupt flag)
|
1 = ²¶×½µ½Ö¸¶¨µÄÑØ
|
0 = δ²¶×½µ½Ö¸¶¨µÄÑØ Ïà¹Øº¯Êý */
|
void BTx_ISR_CAPIF_Clr(BT_Type* BTx)
|
{
|
BTx->ISR = BTx_ISR_CAPIF_Msk;
|
}
|
|
FlagStatus BTx_ISR_CAPIF_Chk(BT_Type* BTx)
|
{
|
if (BTx->ISR & BTx_ISR_CAPIF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
|
void BTx_Deinit(BT_Type* BTx)
|
{
|
//BTx->CR1 = 0x00000000;
|
//BTx->CR2 = 0x00000000;
|
//BTx->CFGR1 = 0x00000000;
|
//BTx->CFGR2 = 0x00000000;
|
//BTx->PRES = 0x00000000;
|
//BTx->LOADCR = 0x00000000;
|
//BTx->CNTL = 0x00000000;
|
//BTx->CNTH = 0x00000000;
|
//BTx->PRESET = 0x00000000;
|
//BTx->LOADL = 0x00000000;
|
//BTx->LOADH = 0x00000000;
|
//BTx->CMPL = 0x00000000;
|
//BTx->CMPH = 0x00000000;
|
//BTx->OUTCNT = 0x00000000;
|
//BTx->OCR = ;
|
//BTx->IER = 0x00000000;
|
//BTx->ISR = 0x00000000;
|
}
|
/******END OF FILE****/
|
