/**
|
******************************************************************************
|
* @file fm33a0xxev_pmu.c
|
* @author FM33A0XXEV Application Team
|
* @version V1.0.0
|
* @date 16-April-2020
|
* @brief This file provides firmware functions to manage the following
|
* functionalities of....:
|
*
|
*/
|
|
/* Includes ------------------------------------------------------------------*/
|
|
#include "fm33a0xxev_pmu.h"
|
|
/** @addtogroup fm33a0xxev_StdPeriph_Driver
|
* @{
|
*/
|
|
/** @defgroup PMU
|
* @brief PMU driver modules
|
* @{
|
*/
|
|
/* LDO15ʹÄܱê־λ
|
1£ºLDO15´¦ÓÚ¹¤×÷״̬
|
0£ºLDO15±»¹Ø±Õ Ïà¹Øº¯Êý */
|
FlagStatus PMU_CR_LDO15EN_Chk(void)
|
{
|
if (PMU->CR & PMU_CR_LDO15EN_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* LDO15ʹÄܱêÖ¾·´ÂëУÑéλ Ïà¹Øº¯Êý */
|
FlagStatus PMU_CR_LDO15EN_B_Chk(void)
|
{
|
if (PMU->CR & PMU_CR_LDO15EN_B_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* Sleep/DeepSleep»½ÐѺóµÄϵͳƵÂÊ
|
00£ºRCHF-8MHz
|
01£ºRCHF-16MHz
|
10£ºRCHF-24MHz
|
11£ºRCHF-32MHz Ïà¹Øº¯Êý */
|
void PMU_CR_WKFSEL_Set(uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = PMU->CR;
|
tmpreg &= ~(PMU_CR_WKFSEL_Msk);
|
tmpreg |= (SetValue & PMU_CR_WKFSEL_Msk);
|
PMU->CR = tmpreg;
|
}
|
|
uint32_t PMU_CR_WKFSEL_Get(void)
|
{
|
return (PMU->CR & PMU_CR_WKFSEL_Msk);
|
}
|
|
/* DeepSleep¿ØÖƼĴæÆ÷
|
1£ºDeepSleepģʽʹÄÜ£¬Ï¹رջù×¼µçѹԴ
|
0£º³£¹æSleepģʽ
|
ÔÚSleepÏ£¬Èç¹ûÖÃλÁËSLPDPλ¼´ÎªDeepSleepģʽ£»
|
¸Ãλ½öÔÚSleepÏÂÓÐЧ Ïà¹Øº¯Êý */
|
void PMU_CR_SLPDP_Set(uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = PMU->CR;
|
tmpreg &= ~(PMU_CR_SLPDP_Msk);
|
tmpreg |= (SetValue & PMU_CR_SLPDP_Msk);
|
PMU->CR = tmpreg;
|
}
|
|
uint32_t PMU_CR_SLPDP_Get(void)
|
{
|
return (PMU->CR & PMU_CR_SLPDP_Msk);
|
}
|
|
/* CoreVoltageScalingÅäÖÃ
|
0£ºµÍ¹¦ºÄģʽϲ»Ê¹ÄÜÄں˵çѹµ÷Õû
|
1£ºµÍ¹¦ºÄģʽϽµµÍÄں˵çѹ
|
¸Ãλ½öÔÚSleep/DeepSleep/RTCBKPģʽÏÂÆð×÷Óà Ïà¹Øº¯Êý */
|
void PMU_CR_CVS_Set(uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = PMU->CR;
|
tmpreg &= ~(PMU_CR_CVS_Msk);
|
tmpreg |= (SetValue & PMU_CR_CVS_Msk);
|
PMU->CR = tmpreg;
|
}
|
|
uint32_t PMU_CR_CVS_Get(void)
|
{
|
return (PMU->CR & PMU_CR_CVS_Msk);
|
}
|
|
/* µÍ¹¦ºÄģʽÅäÖüĴæÆ÷
|
00£ºActive mode / LP Active mode
|
01£ºLPRUN mode
|
10£ºSleep mode / DeepSleep mode
|
11£ºRTCBKP mode Ïà¹Øº¯Êý */
|
void PMU_CR_PMOD_Set(uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = PMU->CR;
|
tmpreg &= ~(PMU_CR_PMOD_Msk);
|
tmpreg |= (SetValue & PMU_CR_PMOD_Msk);
|
PMU->CR = tmpreg;
|
}
|
|
uint32_t PMU_CR_PMOD_Get(void)
|
{
|
return (PMU->CR & PMU_CR_PMOD_Msk);
|
}
|
|
/* Flash Stop»½ÐÑ¿ØÖÆ
|
0£ºStopÐźŵȴýʱÖÓ½¨Á¢ºóͬ²½ÇåÁã
|
1£ºStopÐźÅÒì²½ÇåÁã Ïà¹Øº¯Êý */
|
void PMU_WKTR_STPCLR_Set(uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = PMU->WKTR;
|
tmpreg &= ~(PMU_WKTR_STPCLR_Msk);
|
tmpreg |= (SetValue & PMU_WKTR_STPCLR_Msk);
|
PMU->WKTR = tmpreg;
|
}
|
|
uint32_t PMU_WKTR_STPCLR_Get(void)
|
{
|
return (PMU->WKTR & PMU_WKTR_STPCLR_Msk);
|
}
|
|
/* ¿É±à³Ì¶îÍ⻽ÐÑÑÓ³Ù
|
ÔÚDeepSleepģʽÏ£¬RCHFʱÖÓµ½À´ºó£¬¸ù¾Ý´Ë¼Ä´æÆ÷ÅäÖõȴý¶îÍâÑÓ³Ùʱ¼äºó£¬ÔÙ¶ÁÈ¡FlashУÑé×Ö
|
00£º0us
|
01£º2us
|
10£º4us
|
11£º8us Ïà¹Øº¯Êý */
|
void PMU_WKTR_T1A_Set(uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = PMU->WKTR;
|
tmpreg &= ~(PMU_WKTR_T1A_Msk);
|
tmpreg |= (SetValue & PMU_WKTR_T1A_Msk);
|
PMU->WKTR = tmpreg;
|
}
|
|
uint32_t PMU_WKTR_T1A_Get(void)
|
{
|
return (PMU->WKTR & PMU_WKTR_T1A_Msk);
|
}
|
|
/* ADCÖжϻ½ÐѱêÖ¾£¬Öжϳ·ÏúʱӲ¼þ×Ô¶¯ÇåÁã Ïà¹Øº¯Êý */
|
FlagStatus PMU_WKFR_ADCWKF_Chk(void)
|
{
|
if (PMU->WKFR & PMU_WKFR_ADCWKF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* RTCÖжϻ½ÐѱêÖ¾£¬Öжϳ·ÏúʱӲ¼þ×Ô¶¯ÇåÁã Ïà¹Øº¯Êý */
|
FlagStatus PMU_WKFR_RTCWKF_Chk(void)
|
{
|
if (PMU->WKFR & PMU_WKFR_RTCWKF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* SVDÖжϻ½ÐѱêÖ¾£¬Öжϳ·ÏúʱӲ¼þ×Ô¶¯ÇåÁã Ïà¹Øº¯Êý */
|
FlagStatus PMU_WKFR_SVDWKF_Chk(void)
|
{
|
if (PMU->WKFR & PMU_WKFR_SVDWKF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* 32768Hz¾§ÌåÍ£ÕñÖжϻ½ÐѱêÖ¾£¬Öжϳ·ÏúʱӲ¼þ×Ô¶¯ÇåÁã Ïà¹Øº¯Êý */
|
FlagStatus PMU_WKFR_LFDETWKF_Chk(void)
|
{
|
if (PMU->WKFR & PMU_WKFR_LFDETWKF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* IOÖжϻ½ÐѱêÖ¾£¬Öжϳ·ÏúʱӲ¼þ×Ô¶¯ÇåÁã Ïà¹Øº¯Êý */
|
FlagStatus PMU_WKFR_IOWKF_Chk(void)
|
{
|
if (PMU->WKFR & PMU_WKFR_IOWKF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* LPUART1Öжϻ½ÐѱêÖ¾£¬Öжϳ·ÏúʱӲ¼þ×Ô¶¯ÇåÁã Ïà¹Øº¯Êý */
|
FlagStatus PMU_WKFR_LPU1WKF_Chk(void)
|
{
|
if (PMU->WKFR & PMU_WKFR_LPU1WKF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* LPUART0Öжϻ½ÐѱêÖ¾£¬Öжϳ·ÏúʱӲ¼þ×Ô¶¯ÇåÁã Ïà¹Øº¯Êý */
|
FlagStatus PMU_WKFR_LPU0WKF_Chk(void)
|
{
|
if (PMU->WKFR & PMU_WKFR_LPU0WKF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* ±È½ÏÆ÷out-of-window»½ÐѱêÖ¾£¬Öжϳ·ÏúʱӲ¼þ×Ô¶¯ÇåÁã Ïà¹Øº¯Êý */
|
FlagStatus PMU_WKFR_COMP_OOWF_Chk(void)
|
{
|
if (PMU->WKFR & PMU_WKFR_COMP_OOWF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* ±È½ÏÆ÷window»½ÐѱêÖ¾£¬Öжϳ·ÏúʱӲ¼þ×Ô¶¯ÇåÁã Ïà¹Øº¯Êý */
|
FlagStatus PMU_WKFR_COMP_WINF_Chk(void)
|
{
|
if (PMU->WKFR & PMU_WKFR_COMP_WINF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* ±È½ÏÆ÷2Öжϻ½ÐѱêÖ¾£¬Öжϳ·ÏúʱӲ¼þ×Ô¶¯ÇåÁã Ïà¹Øº¯Êý */
|
FlagStatus PMU_WKFR_COMP2WKF_Chk(void)
|
{
|
if (PMU->WKFR & PMU_WKFR_COMP2WKF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* ±È½ÏÆ÷1Öжϻ½ÐѱêÖ¾£¬Öжϳ·ÏúʱӲ¼þ×Ô¶¯ÇåÁã Ïà¹Øº¯Êý */
|
FlagStatus PMU_WKFR_COMP1WKF_Chk(void)
|
{
|
if (PMU->WKFR & PMU_WKFR_COMP1WKF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* _32Öжϻ½ÐѱêÖ¾£¬Öжϳ·ÏúʱӲ¼þ×Ô¶¯ÇåÁã Ïà¹Øº¯Êý */
|
FlagStatus PMU_WKFR_LPTWKF_Chk(void)
|
{
|
if (PMU->WKFR & PMU_WKFR_LPTWKF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* BSTIM32Öжϻ½ÐѱêÖ¾£¬Öжϳ·ÏúʱӲ¼þ×Ô¶¯ÇåÁã Ïà¹Øº¯Êý */
|
FlagStatus PMU_WKFR_BSTWKF_Chk(void)
|
{
|
if (PMU->WKFR & PMU_WKFR_BSTWKF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* CPU Debugger»½ÐѱêÖ¾£¬Èí¼þд1ÇåÁã Ïà¹Øº¯Êý */
|
void PMU_WKFR_DBGWKF_Clr(void)
|
{
|
PMU->WKFR = PMU_WKFR_DBGWKF_Msk;
|
}
|
|
FlagStatus PMU_WKFR_DBGWKF_Chk(void)
|
{
|
if (PMU->WKFR & PMU_WKFR_DBGWKF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
|
/* SLEEP´íÎóÖжÏʹÄÜ (Sleep mode Error Interrupt Enable)
|
1£ºÊ¹ÄÜSLEEP´íÎóÖжÏ
|
0£º½ûÖ¹SLEEP´íÎóÖÐ¶Ï Ïà¹Øº¯Êý */
|
void PMU_IER_SLPEIE_Setable(FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
PMU->IER |= (PMU_IER_SLPEIE_Msk);
|
}
|
else
|
{
|
PMU->IER &= ~(PMU_IER_SLPEIE_Msk);
|
}
|
}
|
|
FunState PMU_IER_SLPEIE_Getable(void)
|
{
|
if (PMU->IER & (PMU_IER_SLPEIE_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* RTCBKP´íÎóÖжÏʹÄÜ(RTCBKP mode Error Interrupt Enable)
|
1£ºÊ¹ÄÜRTCBKP´íÎóÖжÏ
|
0£º½ûÖ¹RTCBKP´íÎóÖÐ¶Ï Ïà¹Øº¯Êý */
|
void PMU_IER_RTCEIE_Setable(FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
PMU->IER |= (PMU_IER_RTCEIE_Msk);
|
}
|
else
|
{
|
PMU->IER &= ~(PMU_IER_RTCEIE_Msk);
|
}
|
}
|
|
FunState PMU_IER_RTCEIE_Getable(void)
|
{
|
if (PMU->IER & (PMU_IER_RTCEIE_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* SLEEP´íÎóÖжϱêÖ¾£¬Ó²¼þÖÃ룬Èí¼þд1ÇåÁã (Sleep Error Interrupt Flag, write 1 to clear)
|
1£ºÔÚPMOD=2¡¯h2ºó£¬CPUÖ´ÐÐWFI/WFEÖ¸ÁîÇ°ÖÃλÁËSLEEPDEEP¼Ä´æÆ÷ʱÖÃλ
|
0£ºÔÚPMOD=2¡¯h2ºó£¬CPUÕýÈ·½øÈëSLEEP Ïà¹Øº¯Êý */
|
void PMU_ISR_SLPEIF_Clr(void)
|
{
|
PMU->ISR = PMU_ISR_SLPEIF_Msk;
|
}
|
|
FlagStatus PMU_ISR_SLPEIF_Chk(void)
|
{
|
if (PMU->ISR & PMU_ISR_SLPEIF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* RTCBKP´íÎóÖжϱêÖ¾£¬Ó²¼þÖÃ룬Èí¼þд1ÇåÁã(RTC Error Interrupt Flag, write 1 to clear)
|
1£ºÔÚPMOD=2¡¯h3ºó£¬Î´¸ÄдCPUÄÚ²¿¼Ä´æÆ÷SLEEPDEEP=1£¬È»ºóÖ´ÐÐWFI/WFEÖ¸Á»òÕßϵͳʱÖÓÀ´×ÔUSB PHY£¬ÊÔͼ½øÈëRTCBKPģʽ
|
0£ºÔÚPMOD=2¡¯h3ºó£¬CPU×ÔÉíÕýÈ·½øÈëDEEP SLEEP Ïà¹Øº¯Êý */
|
void PMU_ISR_RTCEIF_Clr(void)
|
{
|
PMU->ISR = PMU_ISR_RTCEIF_Msk;
|
}
|
|
FlagStatus PMU_ISR_RTCEIF_Chk(void)
|
{
|
if (PMU->ISR & PMU_ISR_RTCEIF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
|
void PMU_Deinit(void)
|
{
|
//PMU->CR = 0x00020000;
|
//PMU->WKTR = 0x00000001;
|
//PMU->WKFR = 0x00000000;
|
//PMU->IER = ;
|
//PMU->ISR = ;
|
}
|
|
/********************************
|
Çå³ýNWKUPx Pin»½ÐѱêÖ¾º¯Êý
|
¹¦ÄÜ:Çå³ýNWKUPx Pin»½ÐѱêÖ¾£¬½öSleep/DeepSleepģʽÏÂÓÐЧ¡£
|
ÊäÈ룺ÉèÖÃNWKUPx Pin»½ÐѱêÖ¾µÄÉèÖÃÖµ£¬Ð´1.
|
********************************/
|
void PMU_WKFR_WKPxF_Clr(uint32_t NWKPinDef)
|
{
|
PMU->WKFR = NWKPinDef;
|
}
|
/********************************
|
¶ÁÈ¡NWKUPx Pin»½ÐѱêÖ¾º¯Êý
|
¹¦ÄÜ:¶ÁÈ¡NWKUPx Pin»½ÐѱêÖ¾¡£
|
Êä³ö£ºNWKUPx Pin»½ÐѱêÖ¾µÄÖµ
|
********************************/
|
FlagStatus PMU_WKFR_WKPxF_Chk(uint32_t NWKPinDef)
|
{
|
if (PMU->WKFR & NWKPinDef)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/********************************
|
µÍ¹¦ºÄģʽµÄ³õʼ»¯º¯Êý
|
¹¦ÄÜ:µÍ¹¦ºÄģʽϸ÷ÖÖÉèÖã¬SLEEPģʽ£¬RAM±£³ÖÉèÖã¬Äں˵çѹ£¬¾§Õñµç·µÈ¡£
|
ÊäÈ룺µÍ¹¦ºÄ¹¦ÄÜ¿ªÆôÇ°µÄÉèÖÃ.
|
********************************/
|
void PMU_SleepCfg_Init(PMU_SleepCfg_InitTypeDef* SleepCfg_InitStruct)
|
{
|
PMU_CR_SLPDP_Set(SleepCfg_InitStruct->SLPDP); /*!<DeepSleep¿ØÖƼĴæÆ÷ */
|
PMU_CR_CVS_Set(SleepCfg_InitStruct->CVS); /*!<Äں˵çѹ½µµÍʹÄÜ¿ØÖÆ */
|
if(SleepCfg_InitStruct->SLPDP == PMU_CR_SLPDP_DEEPSLEEP)
|
{
|
PMU_WKTR_T1A_Set(SleepCfg_InitStruct->TIA);
|
}
|
SCB->SCR = SleepCfg_InitStruct->SCR; /*!<M0ϵͳ¿ØÖƼĴæÆ÷£¬Ò»°ãÅäÖÃΪ0¼´¿É */
|
PMU_CR_PMOD_Set(SleepCfg_InitStruct->PMOD); /*!<µÍ¹¦ºÄģʽÅäÖà */
|
|
}
|
|
/******END OF FILE****/
|
