/**
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******************************************************************************
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* @file fm33a0xxev_uart.c
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* @author FM33A0XXEV Application Team
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* @version V1.0.0
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* @date 16-April-2020
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* @brief This file provides firmware functions to manage the following
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* functionalities of....:
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*
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "fm33a0xxev_uart.h"
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#include "fm33a0xxev_cmu.h"
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/** @addtogroup fm33a0xxev_StdPeriph_Driver
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* @{
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*/
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/** @defgroup UART
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* @brief UART driver modules
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* @{
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*/
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/* ¿ØÖƺìÍâµ÷ÖÆ·¢ËÍÊý¾ÝʱµÄĬÈÏÊä³ö¼«ÐÔ (Infra Red Flag)
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0£ºÕý¼«ÐÔ
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1£º¸º¼«ÐÔ Ïà¹Øº¯Êý */
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void UARTIR_CR_IRFLAG_Set(uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = UARTIR->CR;
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tmpreg &= ~(UARTIR_CR_IRFLAG_Msk);
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tmpreg |= (SetValue & UARTIR_CR_IRFLAG_Msk);
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UARTIR->CR = tmpreg;
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}
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uint32_t UARTIR_CR_IRFLAG_Get(void)
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{
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return (UARTIR->CR & UARTIR_CR_IRFLAG_Msk);
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}
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/* ºìÍâÕ¼¿Õ±Èµ÷ÖƲÎÊý (Tranmission High Duty) Ïà¹Øº¯Êý */
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void UARTIR_CR_TH_Set(uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = UARTIR->CR;
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tmpreg &= ~(UARTIR_CR_TH_Msk);
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tmpreg |= (SetValue & UARTIR_CR_TH_Msk);
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UARTIR->CR = tmpreg;
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}
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uint32_t UARTIR_CR_TH_Get(void)
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{
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return (UARTIR->CR & UARTIR_CR_TH_Msk);
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}
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/* ºìÍâµ÷ÖÆƵÂÊ (Transmission Baud Rate) Ïà¹Øº¯Êý */
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void UARTIR_CR_TZBRG_Set(uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = UARTIR->CR;
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tmpreg &= ~(UARTIR_CR_TZBRG_Msk);
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tmpreg |= (SetValue & UARTIR_CR_TZBRG_Msk);
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UARTIR->CR = tmpreg;
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}
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uint32_t UARTIR_CR_TZBRG_Get(void)
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{
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return (UARTIR->CR & UARTIR_CR_TZBRG_Msk);
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}
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/* UARTͨÐűêÖ¾£¬Ö»¶Á
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1£ºUARTÕýÔÚͨÐÅÖÐ
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0£ºUART¿ÕÏÐ Ïà¹Øº¯Êý */
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FlagStatus UARTx_CSR_BUSY_Chk(UART_Type* UARTx)
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{
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if (UARTx->CSR & UARTx_CSR_BUSY_Msk)
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{
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return SET;
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}
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else
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{
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return RESET;
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}
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}
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/* ·¢ËͺìÍâµ÷ÖÆʹÄÜ
|
1£ºÊ¹ÄܺìÍâµ÷ÖÆ·¢ËÍ
|
0£º¹Ø±ÕºìÍâµ÷ÖÆ·¢ËÍ Ïà¹Øº¯Êý */
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void UARTx_CSR_TXIREN_Setable(UART_Type* UARTx, FunState NewState)
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{
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if (NewState == ENABLE)
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{
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UARTx->CSR |= (UARTx_CSR_TXIREN_Msk);
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}
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else
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{
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UARTx->CSR &= ~(UARTx_CSR_TXIREN_Msk);
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}
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}
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FunState UARTx_CSR_TXIREN_Getable(UART_Type* UARTx)
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{
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if (UARTx->CSR & (UARTx_CSR_TXIREN_Msk))
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{
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return ENABLE;
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}
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else
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{
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return DISABLE;
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}
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}
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/* ½ÓÊÕ³¬Ê±Ê¹ÄÜ
|
1£ºÊ¹ÄܽÓÊÕ³¬Ê±¹¦ÄÜ
|
0£º¹Ø±Õ½ÓÊÕ³¬Ê±¹¦ÄÜ Ïà¹Øº¯Êý */
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void UARTx_CSR_RXTOEN_Setable(UART_Type* UARTx, FunState NewState)
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{
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if (NewState == ENABLE)
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{
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UARTx->CSR |= (UARTx_CSR_RXTOEN_Msk);
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}
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else
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{
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UARTx->CSR &= ~(UARTx_CSR_RXTOEN_Msk);
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}
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}
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FunState UARTx_CSR_RXTOEN_Getable(UART_Type* UARTx)
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{
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if (UARTx->CSR & (UARTx_CSR_RXTOEN_Msk))
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{
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return ENABLE;
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}
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else
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{
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return DISABLE;
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}
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}
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/* RXºÍTXÒý½Å½»»»
|
0£ºÄ¬ÈÏÒý½Å˳Ðò£¨Óë·âװͼһÖ£©
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1£º½»»»Òý½Å˳Ðò Ïà¹Øº¯Êý */
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void UARTx_CSR_IOSWAP_Set(UART_Type* UARTx, uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = UARTx->CSR;
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tmpreg &= ~(UARTx_CSR_IOSWAP_Msk);
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tmpreg |= (SetValue & UARTx_CSR_IOSWAP_Msk);
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UARTx->CSR = tmpreg;
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}
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uint32_t UARTx_CSR_IOSWAP_Get(UART_Type* UARTx)
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{
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return (UARTx->CSR & UARTx_CSR_IOSWAP_Msk);
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}
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/* DMA·¢ËÍÍê³ÉÖжÏʹÄÜ£¬½öÔÚUARTͨ¹ýDMA½øÐз¢ËÍʱÓÐЧ
|
1£ºIE=1µÄÇé¿öÏ£¬DMAģʽÏ·¢ËÍÍê×îºóÒ»Ö¡ºó£¬ÔÊÐíÖжÏÐźÅÊä³ö£»×îºóһ֮֡ǰµÄÊý¾ÝÖ¡·¢ËÍÍê³Éºó²»ÔÊÐíÖжÏÐźÅÊä³ö
|
0£ºÊÇ·ñÔÊÐíÖжÏÐźÅÊä³ö½öÓÉIE¾ö¶¨ Ïà¹Øº¯Êý */
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void UARTx_CSR_DMATXIFCFG_Setable(UART_Type* UARTx, FunState NewState)
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{
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if (NewState == ENABLE)
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{
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UARTx->CSR |= (UARTx_CSR_DMATXIFCFG_Msk);
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}
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else
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{
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UARTx->CSR &= ~(UARTx_CSR_DMATXIFCFG_Msk);
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}
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}
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FunState UARTx_CSR_DMATXIFCFG_Getable(UART_Type* UARTx)
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{
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if (UARTx->CSR & (UARTx_CSR_DMATXIFCFG_Msk))
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{
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return ENABLE;
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}
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else
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{
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return DISABLE;
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}
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}
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/* Êý¾Ý·¢ËÍ/½ÓÊÕʱµÄλ˳Ðò
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0£ºLSB first
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1£ºMSB first Ïà¹Øº¯Êý */
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void UARTx_CSR_BITORD_Set(UART_Type* UARTx, uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = UARTx->CSR;
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tmpreg &= ~(UARTx_CSR_BITORD_Msk);
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tmpreg |= (SetValue & UARTx_CSR_BITORD_Msk);
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UARTx->CSR = tmpreg;
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}
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uint32_t UARTx_CSR_BITORD_Get(UART_Type* UARTx)
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{
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return (UARTx->CSR & UARTx_CSR_BITORD_Msk);
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}
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/* ֹͣλ¿í¶ÈÅäÖ㬽ö¶Ô·¢ËÍÖ¡¸ñʽÓÐЧ£¬½ÓÊÕʱ²»ÅжÏֹͣλ¸öÊý
|
0£º1λֹͣλ
|
1£º2λֹͣλ Ïà¹Øº¯Êý */
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void UARTx_CSR_STOPCFG_Set(UART_Type* UARTx, uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = UARTx->CSR;
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tmpreg &= ~(UARTx_CSR_STOPCFG_Msk);
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tmpreg |= (SetValue & UARTx_CSR_STOPCFG_Msk);
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UARTx->CSR = tmpreg;
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}
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uint32_t UARTx_CSR_STOPCFG_Get(UART_Type* UARTx)
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{
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return (UARTx->CSR & UARTx_CSR_STOPCFG_Msk);
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}
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/* ÿ֡µÄÊý¾Ý³¤¶ÈÑ¡Ôñ£»´Ë¼Ä´æÆ÷¶ÔÊý¾Ý·¢ËͺͽÓÊÕͬʱÓÐЧ
|
00£º7λÊý¾Ý
|
01£º8λÊý¾Ý
|
10£º9λÊý¾Ý
|
11£º6λÊý¾Ý Ïà¹Øº¯Êý */
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void UARTx_CSR_PDSEL_Set(UART_Type* UARTx, uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = UARTx->CSR;
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tmpreg &= ~(UARTx_CSR_PDSEL_Msk);
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tmpreg |= (SetValue & UARTx_CSR_PDSEL_Msk);
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UARTx->CSR = tmpreg;
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}
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uint32_t UARTx_CSR_PDSEL_Get(UART_Type* UARTx)
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{
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return (UARTx->CSR & UARTx_CSR_PDSEL_Msk);
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}
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/* УÑéλÅäÖ㻴˼ĴæÆ÷¶ÔÊý¾Ý·¢ËͺͽÓÊÕͬʱÓÐЧ
|
00£ºÎÞУÑéλ
|
01£ºÅ¼Ð£Ñé
|
10£ºÆæУÑé
|
11£ºRFU Ïà¹Øº¯Êý */
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void UARTx_CSR_PARITY_Set(UART_Type* UARTx, uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = UARTx->CSR;
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tmpreg &= ~(UARTx_CSR_PARITY_Msk);
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tmpreg |= (SetValue & UARTx_CSR_PARITY_Msk);
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UARTx->CSR = tmpreg;
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}
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uint32_t UARTx_CSR_PARITY_Get(UART_Type* UARTx)
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{
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return (UARTx->CSR & UARTx_CSR_PARITY_Msk);
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}
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/* ½ÓÊÕÊý¾Ý¼«ÐÔÅäÖÃ
|
0£ºÕýÏò
|
1£ºÈ¡·´ Ïà¹Øº¯Êý */
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void UARTx_CSR_RXPOL_Setable(UART_Type* UARTx, FunState NewState)
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{
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if (NewState == ENABLE)
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{
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UARTx->CSR |= (UARTx_CSR_RXPOL_Msk);
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}
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else
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{
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UARTx->CSR &= ~(UARTx_CSR_RXPOL_Msk);
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}
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}
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FunState UARTx_CSR_RXPOL_Getable(UART_Type* UARTx)
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{
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if (UARTx->CSR & (UARTx_CSR_RXPOL_Msk))
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{
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return ENABLE;
|
}
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else
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{
|
return DISABLE;
|
}
|
}
|
|
/* ·¢ËÍÊý¾Ý¼«ÐÔÅäÖÃ
|
0£ºÕýÏò
|
1£ºÈ¡·´ Ïà¹Øº¯Êý */
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void UARTx_CSR_TXPOL_Setable(UART_Type* UARTx, FunState NewState)
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{
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if (NewState == ENABLE)
|
{
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UARTx->CSR |= (UARTx_CSR_TXPOL_Msk);
|
}
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else
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{
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UARTx->CSR &= ~(UARTx_CSR_TXPOL_Msk);
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}
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}
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FunState UARTx_CSR_TXPOL_Getable(UART_Type* UARTx)
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{
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if (UARTx->CSR & (UARTx_CSR_TXPOL_Msk))
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{
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return ENABLE;
|
}
|
else
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{
|
return DISABLE;
|
}
|
}
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|
/* ½ÓÊÕʹÄÜ£¬1ÓÐЧ Ïà¹Øº¯Êý */
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void UARTx_CSR_RXEN_Setable(UART_Type* UARTx, FunState NewState)
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{
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if (NewState == ENABLE)
|
{
|
UARTx->CSR |= (UARTx_CSR_RXEN_Msk);
|
}
|
else
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{
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UARTx->CSR &= ~(UARTx_CSR_RXEN_Msk);
|
}
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}
|
|
FunState UARTx_CSR_RXEN_Getable(UART_Type* UARTx)
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{
|
if (UARTx->CSR & (UARTx_CSR_RXEN_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* ·¢ËÍʹÄÜ£¬1ÓÐЧ Ïà¹Øº¯Êý */
|
void UARTx_CSR_TXEN_Setable(UART_Type* UARTx, FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
UARTx->CSR |= (UARTx_CSR_TXEN_Msk);
|
}
|
else
|
{
|
UARTx->CSR &= ~(UARTx_CSR_TXEN_Msk);
|
}
|
}
|
|
FunState UARTx_CSR_TXEN_Getable(UART_Type* UARTx)
|
{
|
if (UARTx->CSR & (UARTx_CSR_TXEN_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* ½ÓÊÕ³¬Ê±ÖжÏʹÄÜ£¬1ÓÐЧ
|
£¨½öUART0ºÍUART1ÓÐЧ£© Ïà¹Øº¯Êý */
|
void UARTx_IER_RXTO_IE_Setable(UART_Type* UARTx, FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
UARTx->IER |= (UARTx_IER_RXTO_IE_Msk);
|
}
|
else
|
{
|
UARTx->IER &= ~(UARTx_IER_RXTO_IE_Msk);
|
}
|
}
|
|
FunState UARTx_IER_RXTO_IE_Getable(UART_Type* UARTx)
|
{
|
if (UARTx->IER & (UARTx_IER_RXTO_IE_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* ½ÓÊÕ´íÎóÖжÏʹÄÜ£¬1ÓÐЧ Ïà¹Øº¯Êý */
|
void UARTx_IER_RXERR_IE_Setable(UART_Type* UARTx, FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
UARTx->IER |= (UARTx_IER_RXERR_IE_Msk);
|
}
|
else
|
{
|
UARTx->IER &= ~(UARTx_IER_RXERR_IE_Msk);
|
}
|
}
|
|
FunState UARTx_IER_RXERR_IE_Getable(UART_Type* UARTx)
|
{
|
if (UARTx->IER & (UARTx_IER_RXERR_IE_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* ½ÓÊÕ»º´æÂúÖжÏʹÄÜ£¬1ÓÐЧ Ïà¹Øº¯Êý */
|
void UARTx_IER_RXBF_IE_Setable(UART_Type* UARTx, FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
UARTx->IER |= (UARTx_IER_RXBF_IE_Msk);
|
}
|
else
|
{
|
UARTx->IER &= ~(UARTx_IER_RXBF_IE_Msk);
|
}
|
}
|
|
FunState UARTx_IER_RXBF_IE_Getable(UART_Type* UARTx)
|
{
|
if (UARTx->IER & (UARTx_IER_RXBF_IE_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* ·¢ËÍ»º´æ¿ÕÖжÏʹÄÜ£¬1ÓÐЧ Ïà¹Øº¯Êý */
|
void UARTx_IER_TXBE_IE_Setable(UART_Type* UARTx, FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
UARTx->IER |= (UARTx_IER_TXBE_IE_Msk);
|
}
|
else
|
{
|
UARTx->IER &= ~(UARTx_IER_TXBE_IE_Msk);
|
}
|
}
|
|
FunState UARTx_IER_TXBE_IE_Getable(UART_Type* UARTx)
|
{
|
if (UARTx->IER & (UARTx_IER_TXBE_IE_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* ·¢ËÍ»º´æ¿ÕÇÒ·¢ËÍÒÆλ¼Ä´æÆ÷¿ÕÖжÏʹÄÜ£¬1ÓÐЧ Ïà¹Øº¯Êý */
|
void UARTx_IER_TXSE_IE_Setable(UART_Type* UARTx, FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
UARTx->IER |= (UARTx_IER_TXSE_IE_Msk);
|
}
|
else
|
{
|
UARTx->IER &= ~(UARTx_IER_TXSE_IE_Msk);
|
}
|
}
|
|
FunState UARTx_IER_TXSE_IE_Getable(UART_Type* UARTx)
|
{
|
if (UARTx->IER & (UARTx_IER_TXSE_IE_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* ÆæżУÑé´íÎóÖжϱêÖ¾£¬Ó²¼þÖÃ룬Èí¼þд1ÇåÁã Ïà¹Øº¯Êý */
|
void UARTx_ISR_PERR_Clr(UART_Type* UARTx)
|
{
|
UARTx->ISR = UARTx_ISR_PERR_Msk;
|
}
|
|
FlagStatus UARTx_ISR_PERR_Chk(UART_Type* UARTx)
|
{
|
if (UARTx->ISR & UARTx_ISR_PERR_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* Ö¡¸ñʽ´íÎóÖжϱêÖ¾£¬Ó²¼þÖÃ룬Èí¼þд1ÇåÁã Ïà¹Øº¯Êý */
|
void UARTx_ISR_FERR_Clr(UART_Type* UARTx)
|
{
|
UARTx->ISR = UARTx_ISR_FERR_Msk;
|
}
|
|
FlagStatus UARTx_ISR_FERR_Chk(UART_Type* UARTx)
|
{
|
if (UARTx->ISR & UARTx_ISR_FERR_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* ½ÓÊÕ»º´æÒç³ö´íÎóÖжϱêÖ¾£¬µ±½ÓÊÕ»º´æÂúµÄÇé¿öÏ£¬ÊÕµ½ÐµÄÊý¾ÝʱÖÃλ£»Ó²¼þÖÃ룬Èí¼þд1»òÕ߶ÁÈ¡RXBUFʱÇåÁã
|
½ÓÊÕÒç³öʱ£¬½ÓÊÕ»º³åÆ÷ÖÐÔÓеÄÊý¾Ý±»ÐÂÊý¾Ý¸²¸Ç¡£ Ïà¹Øº¯Êý */
|
void UARTx_ISR_OERR_Clr(UART_Type* UARTx)
|
{
|
UARTx->ISR = UARTx_ISR_OERR_Msk;
|
}
|
|
FlagStatus UARTx_ISR_OERR_Chk(UART_Type* UARTx)
|
{
|
if (UARTx->ISR & UARTx_ISR_OERR_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* ½ÓÊÕ³¬Ê±ÖжϱêÖ¾£¬Ó²¼þÖÃ룬Èí¼þд1ÇåÁã
|
£¨½öUART0ºÍUART1ÓÐЧ£© Ïà¹Øº¯Êý */
|
void UARTx_ISR_RXTO_Clr(UART_Type* UARTx)
|
{
|
UARTx->ISR = UARTx_ISR_RXTO_Msk;
|
}
|
|
FlagStatus UARTx_ISR_RXTO_Chk(UART_Type* UARTx)
|
{
|
if (UARTx->ISR & UARTx_ISR_RXTO_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* ½ÓÊÕ»º´æÂúÖжϱêÖ¾£¬Ó²¼þÖÃ룬Èí¼þд1»òÕ߶ÁÈ¡RXBUFʱÇåÁã Ïà¹Øº¯Êý */
|
void UARTx_ISR_RXBF_Clr(UART_Type* UARTx)
|
{
|
UARTx->ISR = UARTx_ISR_RXBF_Msk;
|
}
|
|
FlagStatus UARTx_ISR_RXBF_Chk(UART_Type* UARTx)
|
{
|
if (UARTx->ISR & UARTx_ISR_RXBF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
|
FlagStatus UARTx_ISR_TXBE_Chk(UART_Type* UARTx)
|
{
|
if (UARTx->ISR & UARTx_ISR_TXBE_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* ·¢ËÍ»º´æ¿ÕÇÒÒÆλ¼Ä´æÆ÷·¢ËÍÍê³ÉÖжϱêÖ¾£¬Ó²¼þÖÃ룬Èí¼þд1»òÕßÈí¼þд·¢ËÍ»º´æʱÇåÁã Ïà¹Øº¯Êý */
|
void UARTx_ISR_TXSE_Clr(UART_Type* UARTx)
|
{
|
UARTx->ISR = UARTx_ISR_TXSE_Msk;
|
}
|
|
FlagStatus UARTx_ISR_TXSE_Chk(UART_Type* UARTx)
|
{
|
if (UARTx->ISR & UARTx_ISR_TXSE_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
/* ·¢ËÍÑÓ³Ù£¬×î´ó255baud Ïà¹Øº¯Êý */
|
void UARTx_TODR_TXDLY_LEN_Set(UART_Type* UARTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = UARTx->TODR ;
|
tmpreg &= ~(UARTx_TODR_TXDLY_LEN_Msk);
|
tmpreg |= (SetValue & UARTx_TODR_TXDLY_LEN_Msk);
|
UARTx->TODR = tmpreg;
|
}
|
|
uint32_t UARTx_TODR_TXDLY_LEN_Get(UART_Type* UARTx)
|
{
|
return (UARTx->TODR & UARTx_TODR_TXDLY_LEN_Msk);
|
}
|
|
/* ½ÓÊÕ³¬Ê±Òç³ö³¤¶È£¬×î´ó255baud Ïà¹Øº¯Êý */
|
void UARTx_TODR_RXTO_LEN_Set(UART_Type* UARTx, uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = UARTx->TODR ;
|
tmpreg &= ~(UARTx_TODR_RXTO_LEN_Msk);
|
tmpreg |= (SetValue & UARTx_TODR_RXTO_LEN_Msk);
|
UARTx->TODR = tmpreg;
|
}
|
|
uint32_t UARTx_TODR_RXTO_LEN_Get(UART_Type* UARTx)
|
{
|
return (UARTx->TODR & UARTx_TODR_RXTO_LEN_Msk);
|
}
|
|
/* ½ÓÊÕÊý¾Ý»º³å¼Ä´æÆ÷Êý¾Ý Ïà¹Øº¯Êý */
|
uint32_t UARTx_RXBUF_Read(UART_Type* UARTx)
|
{
|
return (UARTx->RXBUF & UARTx_RXBUF_RXBUF_Msk);
|
}
|
|
/* ·¢ËÍÊý¾Ý»º³å¼Ä´æÆ÷Êý¾Ý Ïà¹Øº¯Êý */
|
void UARTx_TXBUF_Write(UART_Type* UARTx, uint32_t SetValue)
|
{
|
UARTx->TXBUF = (SetValue & UARTx_TXBUF_TXBUF_Msk);
|
}
|
|
uint32_t UARTx_TXBUF_Read(UART_Type* UARTx)
|
{
|
return (UARTx->TXBUF & UARTx_TXBUF_TXBUF_Msk);
|
}
|
|
/* ²¨ÌØÂʲúÉúÆ÷¼Ä´æÆ÷Öµ Ïà¹Øº¯Êý */
|
void UARTx_BGR_Write(UART_Type* UARTx, uint32_t SetValue)
|
{
|
UARTx->BGR = (SetValue & UARTx_BRG_SPBRG_Msk);
|
}
|
|
uint32_t UARTx_BGR_Read(UART_Type* UARTx)
|
{
|
return (UARTx->BGR & UARTx_BRG_SPBRG_Msk);
|
}
|
|
/*
|
ºìÍâµ÷ÖÆƵÂÊÕ¼¿Õ±ÈÅäÖú¯Êý
|
¹¦ÄÜ:ºìÍâµ÷ÖÆƵÂÊÕ¼¿Õ±ÈÅäÖú¯Êý
|
ÊäÈ룺ºìÍâµ÷ÖÆƵÂÊÕ¼¿Õ±ÈÅäÖÃ
|
*/
|
void UART_IRModulation_Init( uint32_t ModuFreq, uint8_t ModuDutyCycle, uint32_t Clk )
|
{
|
uint32_t tempTZBRG, tempTH;
|
|
if((ModuFreq > 0)&&(Clk >= ModuFreq)&&(ModuDutyCycle < 100))
|
{
|
tempTZBRG = (uint32_t)((float)Clk/(float)ModuFreq + 0.5) - 1;
|
UARTIR_CR_TZBRG_Set((tempTZBRG&UARTIR_CR_TZBRG_Msk)<<UARTIR_CR_TZBRG_Pos);//ºìÍâµ÷ÖÆƵÂÊÅäÖÃ
|
|
if((tempTZBRG>>4) != 0)
|
{
|
|
tempTH = (uint32_t)(((float)ModuDutyCycle/100.0)*((float)(tempTZBRG + 1)/(float)(tempTZBRG>>4)) + 0.5);
|
}
|
else
|
{
|
tempTH = (uint32_t)(((float)ModuDutyCycle/100.0)*(float)(tempTZBRG + 1) + 0.5);
|
|
}
|
UARTIR_CR_TH_Set((tempTH<<UARTIR_CR_TH_Pos)&UARTIR_CR_TH_Msk);//ºìÍâµ÷ÖÆÕ¼¿Õ±ÈÅäÖÃ
|
}
|
}
|
|
/*
|
UARTÍêÕû²ÎÊý³õʼ»¯º¯Êý
|
¹¦ÄÜ:UARTÍêÕû²ÎÊý³õʼ»¯
|
ÊäÈ룺´®¿ÚºÅ ²ÎÊý
|
*/
|
void UART_Init(UART_Type* UARTx, UART_InitTypeDef* para)
|
{
|
UARTx_BGR_Write(UARTx, para->SPBRG); //²¨ÌØÂʲúÉúÆ÷¼Ä´æÆ÷
|
UARTx_CSR_PDSEL_Set(UARTx, para->PDSEL); // Êý¾Ý³¤¶ÈÑ¡Ôñ
|
UARTx_CSR_PARITY_Set(UARTx, para->PARITY); // УÑéλÅäÖÃ
|
UARTx_CSR_STOPCFG_Set(UARTx, para->STOPSEL); //ֹͣλѡÔñ
|
UARTx_IER_RXERR_IE_Setable(UARTx, para->ERRIE); //´íÎóÖжÏʹÄÜ¿ØÖÆ
|
UARTx_IER_RXTO_IE_Setable(UARTx, para->RXTO_IE); //½ÓÊÕ³¬Ê±ÖжÏ
|
UARTx_IER_RXBF_IE_Setable(UARTx, para->RXBF_IE); //½ÓÊÕÖжÏ
|
UARTx_IER_TXBE_IE_Setable(UARTx, para->TXBE_IE); //·¢ËÍÖжÏ
|
UARTx_IER_TXSE_IE_Setable(UARTx, para->TXSE_IE); //·¢ËÍÖжÏ
|
UARTx_CSR_RXPOL_Setable(UARTx, para->RXDFLAG); //½ÓÊÕÊý¾ÝÈ¡·´¿ØÖÆλ
|
UARTx_CSR_TXPOL_Setable(UARTx, para->TXDFLAG); //·¢ËÍÊý¾ÝÈ¡·´¿ØÖÆλ
|
UARTx_CSR_RXEN_Setable(UARTx, para->RXEN); //½ÓÊÕÄ£¿éʹÄÜ¿ØÖÆ
|
UARTx_CSR_TXEN_Setable(UARTx, para->TXEN); //·¢ËÍÄ£¿éʹÄÜ¿ØÖÆ
|
UARTx_CSR_TXIREN_Setable(UARTx, para->IREN); //·¢ËͺìÍâµ÷ÖÆʹÄÜλ
|
}
|
|
/*
|
дÈ벨ÌØÂʲúÉúÆ÷¼Ä´æÆ÷º¯Êý
|
¹¦ÄÜ:дÈ벨ÌØÂÊ
|
ÊäÈë:ÒªÉèÖõIJ¨ÌØÂÊ
|
*/
|
uint32_t UART_BaudREGCalc(uint32_t BaudRate, uint32_t Clk)
|
{
|
uint32_t tmpSPBRG;
|
float tmpfloat;
|
|
tmpfloat = (float)Clk/(float)BaudRate;
|
|
if(tmpfloat > 1)
|
{
|
tmpSPBRG = (uint32_t)(tmpfloat - 1.0 + 0.5);
|
}
|
else
|
{
|
tmpSPBRG = 0;
|
}
|
|
return tmpSPBRG;
|
}
|
|
/*
|
UART¼òµ¥²ÎÊý³õʼ»¯º¯Êýº¯Êý
|
¹¦ÄÜ:UART¼òµ¥²ÎÊý³õʼ»¯
|
ÊäÈ룺´®¿ÚºÅ ²ÎÊý
|
*/
|
void UART_SInit(UART_Type* UARTx, UART_SInitTypeDef* para,CMU_ClocksType* CMU_Clocks)
|
{
|
UART_InitTypeDef para2 ;
|
|
if(UARTx == UART0)
|
{
|
CMU_OPCCR1_UART0CKS_Set(para->ClockSrc); //UART0¹¤×÷ʱÖÓÑ¡Ôñ
|
CMU_OPCCR1_UART0CKE_Setable(ENABLE); //UART0¹¤×÷ʱÖÓʹÄÜ
|
CMU_PERCLK_SetableEx(UART0CLK,ENABLE); //UART0×ÜÏßʱÖÓʹÄÜ
|
switch(para->ClockSrc)
|
{
|
case CMU_OPCCR1_UART0CKS_APBCLK:
|
para2.SPBRG = UART_BaudREGCalc(para->BaudRate, CMU_Clocks->APBCLK_Frequency);
|
break;
|
case CMU_OPCCR1_UART0CKS_RCHF:
|
CMU_RCHFCR_RCHFEN_Setable(ENABLE);
|
para2.SPBRG = UART_BaudREGCalc(para->BaudRate, CMU_Clocks->RCHF_Frequency);
|
break;
|
case CMU_OPCCR1_UART0CKS_SYSCLK:
|
para2.SPBRG = UART_BaudREGCalc(para->BaudRate, CMU_Clocks->SYSCLK_Frequency);
|
break;
|
default:
|
break;
|
}
|
}
|
else if(UARTx == UART1)
|
{
|
CMU_OPCCR1_UART1CKS_Set(para->ClockSrc); //UART1¹¤×÷ʱÖÓÑ¡Ôñ
|
CMU_OPCCR1_UART1CKE_Setable(ENABLE); //UART1¹¤×÷ʱÖÓʹÄÜ
|
CMU_PERCLK_SetableEx(UART1CLK,ENABLE); //UART1×ÜÏßʱÖÓʹÄÜ
|
switch(para->ClockSrc)
|
{
|
case CMU_OPCCR1_UART1CKS_APBCLK:
|
para2.SPBRG = UART_BaudREGCalc(para->BaudRate, CMU_Clocks->APBCLK_Frequency);
|
break;
|
case CMU_OPCCR1_UART1CKS_RCHF:
|
CMU_RCHFCR_RCHFEN_Setable(ENABLE);
|
para2.SPBRG = UART_BaudREGCalc(para->BaudRate, CMU_Clocks->RCHF_Frequency);
|
break;
|
case CMU_OPCCR1_UART1CKS_SYSCLK:
|
para2.SPBRG = UART_BaudREGCalc(para->BaudRate, CMU_Clocks->SYSCLK_Frequency);
|
break;
|
default:
|
break;
|
}
|
}
|
else if(UARTx == UART2)
|
{
|
CMU_PERCLK_SetableEx(UART2CLK,ENABLE); //UART2×ÜÏßʱÖÓʹÄÜ
|
para2.SPBRG = UART_BaudREGCalc(para->BaudRate, CMU_Clocks->APBCLK_Frequency);
|
}
|
else if(UARTx == UART3)
|
{
|
CMU_PERCLK_SetableEx(UART3CLK,ENABLE); //UART3×ÜÏßʱÖÓʹÄÜ
|
para2.SPBRG = UART_BaudREGCalc(para->BaudRate, CMU_Clocks->APBCLK_Frequency);
|
}
|
else if(UARTx == UART4)
|
{
|
CMU_PERCLK_SetableEx(UART4CLK,ENABLE); //UART4×ÜÏßʱÖÓʹÄÜ
|
para2.SPBRG = UART_BaudREGCalc(para->BaudRate, CMU_Clocks->APBCLK_Frequency);
|
}
|
else if(UARTx == UART5)
|
{
|
CMU_PERCLK_SetableEx(UART5CLK,ENABLE); //UART5×ÜÏßʱÖÓʹÄÜ
|
para2.SPBRG = UART_BaudREGCalc(para->BaudRate, CMU_Clocks->APBCLK_Frequency);
|
}
|
|
if(Eight8Bit == para->DataBit)
|
{
|
para2.PDSEL = UARTx_CSR_PDSEL_8BIT;
|
if(EVEN == para->ParityBit)
|
{
|
para2.PARITY= UARTx_CSR_PARITY_EVEN;//8bitżУÑé
|
}
|
else if(ODD == para->ParityBit)
|
{
|
para2.PARITY = UARTx_CSR_PARITY_ODD;//8bitÆæУÑé
|
}
|
else
|
{
|
para2.PARITY = UARTx_CSR_PARITY_NONE;//8bitÊý¾ÝÎÞУÑé
|
}
|
}
|
else if(Nine9Bit == para->DataBit)
|
{
|
para2.PDSEL = UARTx_CSR_PDSEL_9BIT;
|
if(EVEN == para->ParityBit)
|
{
|
para2.PARITY = UARTx_CSR_PARITY_EVEN;//9bitżУÑé
|
}
|
else if(ODD == para->ParityBit)
|
{
|
para2.PARITY = UARTx_CSR_PARITY_ODD;//9bitÆæУÑé
|
}
|
else
|
{
|
para2.PARITY = UARTx_CSR_PARITY_NONE;//9bitÊý¾ÝÎÞУÑé
|
}
|
}
|
else if(Seven7Bit == para->DataBit)
|
{
|
para2.PDSEL = UARTx_CSR_PDSEL_7BIT;
|
if(EVEN == para->ParityBit)
|
{
|
para2.PARITY = UARTx_CSR_PARITY_EVEN;//7bitżУÑé
|
}
|
else if(ODD == para->ParityBit)
|
{
|
para2.PARITY = UARTx_CSR_PARITY_ODD;//7bitÆæУÑé
|
}
|
else
|
{
|
para2.PARITY = UARTx_CSR_PARITY_NONE;//7bitÊý¾ÝÎÞУÑé
|
}
|
}
|
else
|
{
|
para2.PDSEL = UARTx_CSR_PDSEL_6BIT;
|
if(EVEN == para->ParityBit)
|
{
|
para2.PARITY = UARTx_CSR_PARITY_EVEN;//6bitżУÑé
|
}
|
else if(ODD == para->ParityBit)
|
{
|
para2.PARITY = UARTx_CSR_PARITY_ODD;//6bitÆæУÑé
|
}
|
else
|
{
|
para2.PARITY = UARTx_CSR_PARITY_NONE;//6bitÊý¾ÝÎÞУÑé
|
}
|
|
}
|
|
if(OneBit == para->StopBit)
|
{
|
para2.STOPSEL = UARTx_CSR_STOPCFG_1STOPBIT;
|
}
|
else
|
{
|
para2.STOPSEL = UARTx_CSR_STOPCFG_2STOPBIT;
|
}
|
|
para2.RXBF_IE = DISABLE; //¹Ø±Õ½ÓÊÕÖжÏ
|
para2.TXBE_IE = DISABLE; //¹Ø±Õ·¢ËÍÖжÏ
|
para2.TXSE_IE = DISABLE; //¹Ø±Õ·¢ËÍÖжÏ
|
para2.ERRIE = DISABLE; //¹Ø±Õ´íÎóÖжÏ
|
para2.RXTO_IE = DISABLE; //½ÓÊÕ³¬Ê±ÖжÏ
|
|
para2.RXDFLAG = DISABLE; //¹Ø±Õ½ÓÊÕÊý¾ÝÈ¡·´¿ØÖÆλ
|
para2.TXDFLAG = DISABLE; //¹Ø±Õ·¢ËÍÊý¾ÝÈ¡·´¿ØÖÆλ
|
|
para2.RXEN = DISABLE; //¹Ø±Õ½ÓÊÕÄ£¿éʹÄÜ¿ØÖÆ
|
para2.TXEN = DISABLE; //¹Ø±Õ·¢ËÍÄ£¿éʹÄÜ¿ØÖÆ
|
para2.IREN = DISABLE; //¹Ø±Õ·¢ËͺìÍâµ÷ÖÆʹÄÜλ
|
|
UART_Init(UARTx, ¶2);
|
}
|
|
void UART_Deinit(void)
|
{
|
//UART->IRCR = 0x00000000;
|
}
|
|
void UARTx_Deinit(UART_Type* UARTx)
|
{
|
//UARTx->CSR = 0x00000000;
|
//UARTx->IER = 0x00000000;
|
//UARTx->ISR = 0x00000000;
|
//UARTx->TODR = 0x00000000;
|
//UARTx->RXBUF = ;
|
//UARTx->TXBUF = ;
|
//UARTx->BRG = 0x00000341;
|
}
|
|
/******END OF FILE****/
|
