/**
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******************************************************************************
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* @file fm33a0xxev_adc.c
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* @author FM33A0XXEV Application Team
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* @version V1.0.0
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* @date 16-April-2020
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* @brief This file provides firmware functions to manage the following
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* functionalities of....:
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*
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "fm33a0xxev_adc.h"
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/** @addtogroup fm33a0xxev_StdPeriph_Driver
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* @{
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*/
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/** @defgroup ADC
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* @brief ADC driver modules
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* @{
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*/
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/* ADCÄÚ²¿ÀÛ¼ÓģʽÖжÏʹÄÜ Ïà¹Øº¯Êý */
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void ADC_CR_ADC_IE_Setable(FunState NewState)
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{
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if (NewState == ENABLE)
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{
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ADC->CR |= (ADC_CR_ADC_IE_Msk);
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}
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else
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{
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ADC->CR &= ~(ADC_CR_ADC_IE_Msk);
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}
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}
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FunState ADC_CR_ADC_IE_Getable(void)
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{
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if (ADC->CR & (ADC_CR_ADC_IE_Msk))
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{
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return ENABLE;
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}
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else
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{
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return DISABLE;
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}
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}
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/* ADCÍⲿÀÛ¼ÓģʽÖжÏʹÄÜ Ïà¹Øº¯Êý */
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void ADC_CR_ACC_IE_Setable(FunState NewState)
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{
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if (NewState == ENABLE)
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{
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ADC->CR |= (ADC_CR_ACC_IE_Msk);
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}
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else
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{
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ADC->CR &= ~(ADC_CR_ACC_IE_Msk);
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}
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}
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FunState ADC_CR_ACC_IE_Getable(void)
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{
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if (ADC->CR & (ADC_CR_ACC_IE_Msk))
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{
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return ENABLE;
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}
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else
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{
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return DISABLE;
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}
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}
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/* ADC¹¦ºÄģʽ
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0£ºµÍ¹¦ºÄģʽ£¬¹¤×÷ʱÖÓ×î¸ß1MHz
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1£º¸ß¹¦ºÄģʽ£¬¹¤×÷ʱÖÓ×î¸ß2MHz Ïà¹Øº¯Êý */
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void ADC_CR_HPEN_Set(uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = ADC->CR;
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tmpreg &= ~(ADC_CR_HPEN_Msk);
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tmpreg |= (SetValue & ADC_CR_HPEN_Msk);
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ADC->CR = tmpreg;
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}
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uint32_t ADC_CR_HPEN_Get(void)
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{
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return (ADC->CR & ADC_CR_HPEN_Msk);
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}
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/* ADC¹¤×÷ģʽ
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0£ºÄÚ²¿ÀÛ¼ÓÆ÷ģʽ
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1£ºÍⲿÀÛ¼ÓÆ÷»òCICģʽ Ïà¹Øº¯Êý */
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void ADC_CR_MODE_Set(uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = ADC->CR;
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tmpreg &= ~(ADC_CR_MODE_Msk);
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tmpreg |= (SetValue & ADC_CR_MODE_Msk);
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ADC->CR = tmpreg;
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}
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uint32_t ADC_CR_MODE_Get(void)
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{
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return (ADC->CR & ADC_CR_MODE_Msk);
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}
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/* »ý·ÖÆ÷¸´Î»Ê¹ÄÜ£¬ÔÚMODE=1²¢ÇÒʹÓÃÍⲿÀÛ¼ÓÆ÷ʱ£¬±ØÐëÖÃ룬ÆäËûÌõ¼þϱØÐë±£³ÖΪ0
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0£º½ûÖ¹»ý·ÖÆ÷Íⲿ¸´Î»
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1£ºÔÊÐí»ý·ÖÆ÷Íⲿ¸´Î» Ïà¹Øº¯Êý */
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void ADC_CR_RSTCTRL_EN_Setable(FunState NewState)
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{
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if (NewState == ENABLE)
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{
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ADC->CR |= (ADC_CR_RSTCTRL_EN_Msk);
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}
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else
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{
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ADC->CR &= ~(ADC_CR_RSTCTRL_EN_Msk);
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}
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}
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FunState ADC_CR_RSTCTRL_EN_Getable(void)
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{
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if (ADC->CR & (ADC_CR_RSTCTRL_EN_Msk))
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{
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return ENABLE;
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}
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else
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{
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return DISABLE;
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}
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}
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/* ADCʹÄÜÐźÅ
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0£ºADC²»Ê¹ÄÜ
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1£ºADCʹÄÜ
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×¢Ò⣺RTCÖ´ÐÐ×Ô¶¯Î²¹Ê±£¬Ó²¼þ»áÖÜÆÚÐÔ×Ô¶¯Ê¹ÄÜADC Ïà¹Øº¯Êý */
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void ADC_CR_EN_Setable(FunState NewState)
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{
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if (NewState == ENABLE)
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{
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ADC->CR |= (ADC_CR_EN_Msk);
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}
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else
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{
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ADC->CR &= ~(ADC_CR_EN_Msk);
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}
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}
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FunState ADC_CR_EN_Getable(void)
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{
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if (ADC->CR & (ADC_CR_EN_Msk))
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{
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return ENABLE;
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}
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else
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{
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return DISABLE;
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}
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}
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/* ADC TRIMÖµ£¬½öÕë¶ÔÄÚ²¿ÀÛ¼ÓÆ÷ģʽÊä³ö
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ÄÚ²¿ÀÛ¼ÓÆ÷ÀÛ¼ÓÖÜÆÚ£ºPeriod = TRIM*2*TADC_CLK
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ÀÛ¼ÓÖÜÆÚ¾ö¶¨ÁËÊä³öÊý¾Ýλ¿í£¬µ±TRIM=0x7FF×î´óֵʱ£¬Êµ¼ÊÀÛ¼ÓÖÜÆÚΪ4095 cycle£¬¼´ADCÊä³öÊý¾Ý×î´óÓÐЧλ¿íÊÇ12bit Ïà¹Øº¯Êý */
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void ADC_TRIM_Write(uint32_t SetValue)
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{
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ADC->TRIM = (SetValue & ADC_TRIM_ADC_TRIM_Msk);
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}
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uint32_t ADC_TRIM_Read(void)
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{
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return (ADC->TRIM & ADC_TRIM_ADC_TRIM_Msk);
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}
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/* ADCÊä³öÊý¾Ý£¬ÎªÂëÁ÷ÀÛ¼Ó½á¹û£¬Î´¾½µ²ÉÑùÂ˲¨Æ÷´¦Àí
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µ±MODE=0ʱ£¬Êä³öΪADCÄÚ²¿ÀÛ¼Ó½á¹û£¬×î¸ß12bit£¬Î»ÊýÓÉADC_TRIM¾ö¶¨
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µ±MODE=1ʱ£¬Êä³öλADCÍⲿÀÛ¼Ó½á¹û£¬×î¸ß14bit£¬Î»ÊýÓÉACC_PERIOD¾ö¶¨ Ïà¹Øº¯Êý */
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uint32_t ADC_DR_Read(void)
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{
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return (ADC->DR & ADC_DR_ADC_DATA_Msk);
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}
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/* ADC³õʼ»¯Íê³É±êÖ¾£¬½öMODE=1ʱÓÐЧ£¨²»²úÉúÖжϣ©
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0£ºADC»¹Î´Íê³É³õʼ»¯
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1£ºADCÍê³É³õʼ»¯
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×¢£ºMODE=1£¬ADC_ENÖÃλºó£¬µÈ´ýMODE_CTRL_DELAYʱ¼äÖ®ºó£¬´Ë±êÖ¾ÖÃ룬±íʾADCÄÚ²¿»ý·ÖÆ÷½¨Á¢Íê³É¡£MODE=0ʱ£¬¹¤×÷ʱÐòÓÉADCÄÚ²¿×ÔÐпØÖÆ£¬´Ë±êÖ¾ÎÞЧ¡£ Ïà¹Øº¯Êý */
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FlagStatus ADC_ISR_INIT_RDY_Chk(void)
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{
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if (ADC->ISR & ADC_ISR_INIT_RDY_Msk)
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{
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return SET;
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}
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else
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{
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return RESET;
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}
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}
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/* ÀÛ¼ÓÆ÷Íê³ÉÖжϱêÖ¾£¬Ó²¼þÖÃ룬Èí¼þд1ÇåÁ㣬д0ÎÞЧ Ïà¹Øº¯Êý */
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void ADC_ISR_ACC_IF_Clr(void)
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{
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ADC->ISR = ADC_ISR_ACC_IF_Msk;
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}
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FlagStatus ADC_ISR_ACC_IF_Chk(void)
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{
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if (ADC->ISR & ADC_ISR_ACC_IF_Msk)
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{
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return SET;
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}
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else
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{
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return RESET;
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}
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}
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/* ADCת»»Íê³ÉÊä³ö£¬Èí¼þÖ»¶Á£¨²»²úÉúÖжϣ©
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ת»»Íê³Éºó´ËÐźű£³ÖΪ¸ßµçƽ£¬Ö»ÓйرÕADC²Å»áÇå0 Ïà¹Øº¯Êý */
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FlagStatus ADC_ISR_ADC_DONE_Chk(void)
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{
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if (ADC->ISR & ADC_ISR_ADC_DONE_Msk)
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{
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return SET;
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}
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else
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{
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return RESET;
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}
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}
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/* ADCת»»Íê³ÉÖжϱêÖ¾£¬Ó²¼þÖÃ룬Èí¼þд1ÇåÁ㣬д0ÎÞЧ Ïà¹Øº¯Êý */
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void ADC_ISR_ADC_IF_Clr(void)
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{
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ADC->ISR = ADC_ISR_ADC_IF_Msk;
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}
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FlagStatus ADC_ISR_ADC_IF_Chk(void)
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{
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if (ADC->ISR & ADC_ISR_ADC_IF_Msk)
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{
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return SET;
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}
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else
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{
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return RESET;
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}
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}
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/* ÍⲿÀÛ¼ÓÆ÷ÀÛ¼ÓÖÜÆÚÅäÖ㬵¥Î»ADC_CLK
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000£º1023£¨¶ÔÓ¦½á¹û10bit£©
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001£º2047£¨¶ÔÓ¦½á¹û11bit£©
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010£º4095£¨¶ÔÓ¦½á¹û12bit£©
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011£º8191£¨¶ÔÓ¦½á¹û13bit£©
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100£º16383£¨¶ÔÓ¦½á¹û14bit£©
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Others£º4095 Ïà¹Øº¯Êý */
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void ADC_CFGR_ACC_PERIOD_Set(uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = ADC->CFGR;
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tmpreg &= ~(ADC_CFGR_ACC_PERIOD_Msk);
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tmpreg |= (SetValue & ADC_CFGR_ACC_PERIOD_Msk);
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ADC->CFGR = tmpreg;
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}
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uint32_t ADC_CFGR_ACC_PERIOD_Get(void)
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{
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return (ADC->CFGR & ADC_CFGR_ACC_PERIOD_Msk);
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}
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/* SDADCʹÄܺómode_ctrlÑÓ³Ù³¤¶ÈÅäÖ㬵¥Î»ÊÇADC_CLKÖÜÆÚ
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0x00£º²»ÑÓ³Ù
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0xFF£ºÑÓ³Ù255¸öADC_CLK
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×¢Ò⣺¸´Î»ÖµÎª16¸öʱÖÓÖÜÆÚ£¬²»µÃÐÞ¸ÄΪСÓÚ16µÄÊýÖµ Ïà¹Øº¯Êý */
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void ADC_CFGR_RST_CTRL_DELAY_Set(uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = ADC->CFGR;
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tmpreg &= ~(ADC_CFGR_RST_CTRL_DELAY_Msk);
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tmpreg |= (SetValue & ADC_CFGR_RST_CTRL_DELAY_Msk);
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ADC->CFGR = tmpreg;
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}
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uint32_t ADC_CFGR_RST_CTRL_DELAY_Get(void)
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{
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return (ADC->CFGR & ADC_CFGR_RST_CTRL_DELAY_Msk);
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}
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/* ADCÊäÈëͨµÀBufferʹÄÜ Ïà¹Øº¯Êý */
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void ADC_CFGR_BUFEN_Setable(FunState NewState)
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{
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if (NewState == ENABLE)
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{
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ADC->CFGR |= (ADC_CFGR_BUFEN_Msk);
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}
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else
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{
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ADC->CFGR &= ~(ADC_CFGR_BUFEN_Msk);
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}
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}
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FunState ADC_CFGR_BUFEN_Getable(void)
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{
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if (ADC->CFGR & (ADC_CFGR_BUFEN_Msk))
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{
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return ENABLE;
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}
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else
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{
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return DISABLE;
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}
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}
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/* ADCÊäÈëͨµÀÑ¡Ôñ
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0001£ºADC_IN1
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0010£ºADC_IN2
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0011£ºADC_IN3
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0100£ºADC_IN4
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0101£ºADC_IN5
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0110£ºADC_IN6
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0111£ºADC_IN7
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1000£ºADC_IN8
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1001£ºADC_IN9
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1010£ºADC_IN10
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1011£ºADC_IN11
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1100£ºADC_IN12
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1110£ºVBAT
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1111£ºTS Ïà¹Øº¯Êý */
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void ADC_CFGR_BUFSEL_Set(uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = ADC->CFGR;
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tmpreg &= ~(ADC_CFGR_BUFSEL_Msk);
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tmpreg |= (SetValue & ADC_CFGR_BUFSEL_Msk);
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ADC->CFGR = tmpreg;
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}
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uint32_t ADC_CFGR_BUFSEL_Get(void)
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{
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return (ADC->CFGR & ADC_CFGR_BUFSEL_Msk);
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}
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/* CICÂ˲¨Æ÷Êä³öÊý¾Ý£¬¸üÐÂƵÂÊÓÉADC¹¤×÷ʱÖÓºÍOSR¹²Í¬¾ö¶¨£»×¢ÒâÕâ¸öÊý¾ÝÊÇÓзûºÏÊý£¬¸ñʽΪ¶þ½øÖƲ¹Âë¡£Ïà¹Øº¯Êý */
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uint32_t CIC_DR_Read(void)
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{
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return (CIC->DR & CIC_DR_ADC_CIC_DATA_Msk);
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}
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/* CICÂ˲¨Æ÷Êä³öÊý¾Ý offsetµ÷ÖƼĴæÆ÷£¬Èí¼þдÈëoffsetÖµ£¬Ó²¼þ½«CIC_DR¼ÓÉÏOSºó¿ÉÒԵõ½ÎÞ·ûºÏ½á¹û£¬Ïà¹Øº¯Êý */
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void CIC_OS_Write(uint32_t SetValue)
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{
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CIC ->OS = (SetValue & CIC_OS_ADC_CIC_OS_Msk);
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}
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uint32_t CIC_OS_Read(void)
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{
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return (CIC ->OS & CIC_OS_ADC_CIC_OS_Msk);
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}
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/* CIC_DR + CIC_OSµÃµ½µÄÎÞ·ûºÏÊý½á¹û Ïà¹Øº¯Êý */
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uint32_t CIC_USDR_Read(void)
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{
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return (CIC ->USDR & CIC_USDR_ADC_CIC_USDR_Msk);
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}
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/* CICÂ˲¨Æ÷ʹÄÜ (CIC enable)
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0:¹Ø±ÕCIC
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1:ʹÄÜCIC Ïà¹Øº¯Êý */
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void CIC_CR_CIC_EN_Setable(FunState NewState)
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{
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if (NewState == ENABLE)
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{
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CIC ->CR |= (CIC_CR_CIC_EN_Msk);
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}
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else
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{
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CIC ->CR &= ~(CIC_CR_CIC_EN_Msk);
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}
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}
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FunState CIC_CR_CIC_EN_Getable(void)
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{
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if (CIC ->CR & (CIC_CR_CIC_EN_Msk))
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{
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return ENABLE;
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}
|
else
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{
|
return DISABLE;
|
}
|
}
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/* CICʹÄܺó¶ªÆúµÄÊä³öµãÊý (Number of Samples to be Discarded)
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¿ÉÒÔ¶ªÆúADCʹÄܺó¿ªÍ·Êä³öµÄ0~255¸ö²ÉÑùµã
|
Ïà¹Øº¯Êý */
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void CIC_CR_NS_DISC_Set(uint32_t SetValue)
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{
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uint32_t tmpreg;
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tmpreg = CIC->CR;
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tmpreg &= ~(CIC_CR_NS_DISC_Msk);
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tmpreg |= (SetValue & CIC_CR_NS_DISC_Msk);
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CIC ->CR = tmpreg;
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}
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uint32_t CIC_CR_NS_DISC_Get(void)
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{
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return (CIC ->CR & CIC_CR_NS_DISC_Msk);
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}
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/* CIC Overrun Interrupt enable
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0:½ûÖ¹CICÒç³öÖжÏ
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1:ÔÊÐíCICÒç³öÖÐ¶Ï Ïà¹Øº¯Êý */
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void CIC_CR_OVR_IE_Setable(FunState NewState)
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{
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if (NewState == ENABLE)
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{
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CIC ->CR |= (CIC_CR_OVR_IE_Msk);
|
}
|
else
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{
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CIC ->CR &= ~(CIC_CR_OVR_IE_Msk);
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}
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}
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|
FunState CIC_CR_OVR_IE_Getable(void)
|
{
|
if (CIC ->CR & (CIC_CR_OVR_IE_Msk))
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{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* CICÖжÏʹÄÜ(CIC interrupt enable)
|
0:½ûÖ¹CICÖжÏ
|
1:ÔÊÐíCICÖжÏ,µ±CIC_IFÖÃλʱ²úÉúÖжÏʼþ Ïà¹Øº¯Êý */
|
void CIC_CR_CIC_IE_Setable(FunState NewState)
|
{
|
if (NewState == ENABLE)
|
{
|
CIC ->CR |= (CIC_CR_CIC_IE_Msk);
|
}
|
else
|
{
|
CIC ->CR &= ~(CIC_CR_CIC_IE_Msk);
|
}
|
}
|
|
FunState CIC_CR_CIC_IE_Getable(void)
|
{
|
if (CIC ->CR & (CIC_CR_CIC_IE_Msk))
|
{
|
return ENABLE;
|
}
|
else
|
{
|
return DISABLE;
|
}
|
}
|
|
/* Êä³öÊý¾Ý½ØÈ¡¿ØÖÆ (Truncate),ÅäÖÃ×îÖÕ½á¹ûÖжªÆú×îµÍλµÄλÊý;
|
Ïà¹Øº¯Êý */
|
void CIC_CR_TRUNC_Set(uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = CIC ->CR;
|
tmpreg &= ~(CIC_CR_TRUNC_Msk);
|
tmpreg |= (SetValue & CIC_CR_TRUNC_Msk);
|
CIC ->CR = tmpreg;
|
}
|
|
uint32_t CIC_CR_TRUNC_Get(void)
|
{
|
return (CIC ->CR & CIC_CR_TRUNC_Msk);
|
}
|
|
/* ¹ý²ÉÑùÂÊÅäÖà (Over Sampling Rate)
|
000:x8
|
001:x16
|
010:x32
|
011:x64
|
100:x128
|
101:x256
|
110:x512
|
111:x1024 Ïà¹Øº¯Êý */
|
void CIC_CR_OSR_Set(uint32_t SetValue)
|
{
|
uint32_t tmpreg;
|
tmpreg = CIC ->CR;
|
tmpreg &= ~(CIC_CR_OSR_Msk);
|
tmpreg |= (SetValue & CIC_CR_OSR_Msk);
|
CIC ->CR = tmpreg;
|
}
|
|
uint32_t CIC_CR_OSR_Get(void)
|
{
|
return (CIC ->CR & CIC_CR_OSR_Msk);
|
}
|
|
void CIC_ISR_CIC_OVR_Clr(void)
|
{
|
CIC ->ISR = CIC_ISR_CIC_OVR_Msk;
|
}
|
|
FlagStatus CIC_ISR_CIC_OVR_Chk(void)
|
{
|
if (CIC ->ISR & CIC_ISR_CIC_OVR_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
void CIC_ISR_CIC_IF_Clr(void)
|
{
|
CIC ->ISR = CIC_ISR_CIC_IF_Msk;
|
}
|
|
FlagStatus CIC_ISR_CIC_IF_Chk(void)
|
{
|
if (CIC ->ISR & CIC_ISR_CIC_IF_Msk)
|
{
|
return SET;
|
}
|
else
|
{
|
return RESET;
|
}
|
}
|
|
void ADC_Deinit(void)
|
{
|
//ADC->CR = 0x00000000;
|
//ADC->TRIM = 0x00000000;
|
//ADC->DR = 0x00000000;
|
//ADC->ISR = 0x00000000;
|
//ADC->CFGR = 0x00000000;
|
}
|
|
/******END OF FILE****/
|
